Lines Matching +full:0 +full:x00020003
49 memblock_add(0xa0000000, SZ_128M); in eseries_fixup()
51 memblock_add(0xa0000000, SZ_64M); in eseries_fixup()
78 gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_tmio_enable()
79 gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0); in eseries_tmio_enable()
85 return 0; in eseries_tmio_enable()
90 gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_tmio_disable()
91 gpio_set_value(GPIO_ESERIES_TMIO_PCLR, 0); in eseries_tmio_disable()
92 return 0; in eseries_tmio_disable()
97 gpio_set_value(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_tmio_suspend()
98 return 0; in eseries_tmio_suspend()
105 return 0; in eseries_tmio_resume()
112 gpio_direction_output(GPIO_ESERIES_TMIO_SUSPEND, 0); in eseries_get_tmio_gpios()
113 gpio_direction_output(GPIO_ESERIES_TMIO_PCLR, 0); in eseries_get_tmio_gpios()
118 [0] = {
120 .end = PXA_CS4_PHYS + 0x1fffff,
133 clk_register_fixed_rate(NULL, "CLK_CK32K", NULL, 0, 32768); in eseries_register_clks()
176 .atag_offset = 0x100,
228 .atag_offset = 0x100,
254 .sync = 0,
261 .lccr3 = 0,
292 .offset = 0,
296 static uint8_t scan_ff_pattern[] = { 0xff, 0xff };
299 .options = 0,
353 .atag_offset = 0x100,
369 .lcd_format = 0x00008023,
370 .lcdd_cntl1 = 0x0f000000,
371 .lcdd_cntl2 = 0x0003ffff,
372 .genlcd_cntl1 = 0x00ffff03,
373 .genlcd_cntl2 = 0x003c0f03,
374 .genlcd_cntl3 = 0x000143aa,
384 .crtc_ss = 0x80140013,
385 .crtc_ls = 0x81150110,
386 .crtc_gs = 0x80050005,
387 .crtc_vpos_gs = 0x000a0009,
388 .crtc_rev = 0x0040010a,
389 .crtc_dclk = 0xa906000a,
390 .crtc_gclk = 0x80050108,
391 .crtc_goe = 0x80050108,
398 .crtc_ps1_active = 0x41060010,
402 .init_data1 = 0x21002103,
403 .gpio_dir1 = 0xffffdeff,
404 .gpio_oe1 = 0x03c00643,
405 .init_data2 = 0x003f003f,
406 .gpio_dir2 = 0xffffffff,
407 .gpio_oe2 = 0x000000ff,
420 [0] = {
421 .start = 0x0c000000,
422 .end = 0x0cffffff,
550 .atag_offset = 0x100,
566 .lcd_format = 0x00008003,
567 .lcdd_cntl1 = 0x00000000,
568 .lcdd_cntl2 = 0x0003ffff,
569 .genlcd_cntl1 = 0x00fff003,
570 .genlcd_cntl2 = 0x003c0f03,
571 .genlcd_cntl3 = 0x000143aa,
581 .crtc_ss = 0x80150014,
582 .crtc_ls = 0x8014000d,
583 .crtc_gs = 0xc1000005,
584 .crtc_vpos_gs = 0x00020147,
585 .crtc_rev = 0x0040010a,
586 .crtc_dclk = 0xa1700030,
587 .crtc_gclk = 0x80cc0015,
588 .crtc_goe = 0x80cc0015,
589 .crtc_ps1_active = 0x61060017,
599 .init_data1 = 0x01192f1b,
600 .gpio_dir1 = 0xd5ffdeff,
601 .gpio_oe1 = 0x000020bf,
602 .init_data2 = 0x010f010f,
603 .gpio_dir2 = 0xffffffff,
604 .gpio_oe2 = 0x000001cf,
617 [0] = {
618 .start = 0x0c000000,
619 .end = 0x0cffffff,
700 .scr_pll2cr = 0x0cc1,
701 .scr_gper = 0,
750 .atag_offset = 0x100,
777 .lcd_format = 0x00008003,
778 .lcdd_cntl1 = 0x02a00000,
779 .lcdd_cntl2 = 0x0003ffff,
780 .genlcd_cntl1 = 0x000ff2a3,
781 .genlcd_cntl2 = 0x000002a3,
782 .genlcd_cntl3 = 0x000102aa,
786 [0] = {
793 .crtc_ss = 0x80350034,
794 .crtc_ls = 0x802b0026,
795 .crtc_gs = 0x80160016,
796 .crtc_vpos_gs = 0x00020003,
797 .crtc_rev = 0x0040001d,
798 .crtc_dclk = 0xe0000000,
799 .crtc_gclk = 0x82a50049,
800 .crtc_goe = 0x80ee001c,
801 .crtc_ps1_active = 0x00000000,
806 .sysclk_divider = 0,
814 .upper_margin = 0,
816 .crtc_ss = 0xd010000f,
817 .crtc_ls = 0x80070003,
818 .crtc_gs = 0x80000000,
819 .crtc_vpos_gs = 0x01460147,
820 .crtc_rev = 0x00400003,
821 .crtc_dclk = 0xa1700030,
822 .crtc_gclk = 0x814b0008,
823 .crtc_goe = 0x80cc0015,
824 .crtc_ps1_active = 0x00000000,
829 .sysclk_divider = 0,
836 .init_data1 = 0xc13fc019,
837 .gpio_dir1 = 0x3e40df7f,
838 .gpio_oe1 = 0x003c3000,
839 .init_data2 = 0x00000000,
840 .gpio_dir2 = 0x00000000,
841 .gpio_oe2 = 0x00000000,
845 .ext_cntl = 0x09640011,
846 .sdram_mode_reg = 0x00600021,
847 .ext_timing_cntl = 0x10001545,
848 .io_cntl = 0x7ddd7333,
849 .size = 0x1fffff,
858 tmp |= 0x100; in e800_tg_change()
860 tmp &= ~0x100; in e800_tg_change()
879 [0] = {
880 .start = 0x0c000000,
881 .end = 0x0cffffff,
919 .scr_pll2cr = 0x0cc1,
920 .scr_gper = 0,
968 .atag_offset = 0x100,