Lines Matching +full:0 +full:x42c
30 { 249600000, 2000000000, 0 },
34 .offset = 0x42c,
51 { P_BI_TCXO, 0 },
61 F(19200000, P_BI_TCXO, 1, 0, 0),
62 F(150000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
63 F(270000000, P_VIDEO_PLL0_OUT_MAIN, 2.5, 0, 0),
64 F(340000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
65 F(434000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
66 F(500000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
71 .cmd_rcgr = 0x7f0,
72 .mnd_width = 0,
86 .halt_reg = 0x9ec,
89 .enable_reg = 0x9ec,
90 .enable_mask = BIT(0),
99 .halt_reg = 0x890,
102 .enable_reg = 0x890,
103 .enable_mask = BIT(0),
117 .halt_reg = 0xa4c,
120 .enable_reg = 0xa4c,
121 .enable_mask = BIT(0),
130 .halt_reg = 0x9cc,
133 .enable_reg = 0x9cc,
134 .enable_mask = BIT(0),
143 .halt_reg = 0x850,
146 .enable_reg = 0x850,
147 .enable_mask = BIT(0),
161 .gdscr = 0x814,
169 .gdscr = 0x874,
196 .max_register = 0xb94,
223 video_pll0_config.l = 0x1f; in video_cc_sc7180_probe()
224 video_pll0_config.alpha = 0x4000; in video_cc_sc7180_probe()
225 video_pll0_config.user_ctl_val = 0x00000001; in video_cc_sc7180_probe()
226 video_pll0_config.user_ctl_hi_val = 0x00004805; in video_cc_sc7180_probe()
231 regmap_update_bits(regmap, 0x984, 0x1, 0x1); in video_cc_sc7180_probe()