Lines Matching +full:i2c +full:- +full:0
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
7 * S3C2410 I2C Controller
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
38 #define S3C2410_IICCON 0x00
39 #define S3C2410_IICSTAT 0x04
40 #define S3C2410_IICADD 0x08
41 #define S3C2410_IICDS 0x0C
42 #define S3C2440_IICLC 0x10
45 #define S3C2410_IICCON_TXDIV_16 (0 << 6)
49 #define S3C2410_IICCON_SCALE(x) ((x) & 0xf)
50 #define S3C2410_IICCON_SCALEMASK (0xf)
54 #define S3C2410_IICSTAT_SLAVE_RX (0 << 6)
64 #define S3C2410_IICSTAT_LASTBIT (1 << 0)
66 #define S3C2410_IICLC_SDA_DELAY0 (0 << 0)
67 #define S3C2410_IICLC_SDA_DELAY5 (1 << 0)
68 #define S3C2410_IICLC_SDA_DELAY10 (2 << 0)
69 #define S3C2410_IICLC_SDA_DELAY15 (3 << 0)
70 #define S3C2410_IICLC_SDA_DELAY_MASK (3 << 0)
75 #define QUIRK_S3C2440 (1 << 0)
84 #define EXYNOS5_SYS_I2C_CFG 0x0234
86 /* i2c controller state */
127 .name = "s3c2410-i2c",
128 .driver_data = 0,
130 .name = "s3c2440-i2c",
133 .name = "s3c2440-hdmiphy-i2c",
139 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat);
143 { .compatible = "samsung,s3c2410-i2c", .data = (void *)0 },
144 { .compatible = "samsung,s3c2440-i2c", .data = (void *)QUIRK_S3C2440 },
145 { .compatible = "samsung,s3c2440-hdmiphy-i2c",
147 { .compatible = "samsung,exynos5-sata-phy-i2c",
159 if (pdev->dev.of_node) { in s3c24xx_get_device_quirks()
162 match = of_match_node(s3c24xx_i2c_match, pdev->dev.of_node); in s3c24xx_get_device_quirks()
163 return (kernel_ulong_t)match->data; in s3c24xx_get_device_quirks()
166 return platform_get_device_id(pdev)->driver_data; in s3c24xx_get_device_quirks()
173 static inline void s3c24xx_i2c_master_complete(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_master_complete() argument
175 dev_dbg(i2c->dev, "master_complete %d\n", ret); in s3c24xx_i2c_master_complete()
177 i2c->msg_ptr = 0; in s3c24xx_i2c_master_complete()
178 i2c->msg = NULL; in s3c24xx_i2c_master_complete()
179 i2c->msg_idx++; in s3c24xx_i2c_master_complete()
180 i2c->msg_num = 0; in s3c24xx_i2c_master_complete()
182 i2c->msg_idx = ret; in s3c24xx_i2c_master_complete()
184 if (!(i2c->quirks & QUIRK_POLL)) in s3c24xx_i2c_master_complete()
185 wake_up(&i2c->wait); in s3c24xx_i2c_master_complete()
188 static inline void s3c24xx_i2c_disable_ack(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_ack() argument
192 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
193 writel(tmp & ~S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_ack()
196 static inline void s3c24xx_i2c_enable_ack(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_enable_ack() argument
200 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
201 writel(tmp | S3C2410_IICCON_ACKEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_ack()
205 static inline void s3c24xx_i2c_disable_irq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_irq() argument
209 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
210 writel(tmp & ~S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_irq()
213 static inline void s3c24xx_i2c_enable_irq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_enable_irq() argument
217 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
218 writel(tmp | S3C2410_IICCON_IRQEN, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_enable_irq()
221 static bool is_ack(struct s3c24xx_i2c *i2c) in is_ack() argument
225 for (tries = 50; tries; --tries) { in is_ack()
226 if (readl(i2c->regs + S3C2410_IICCON) in is_ack()
228 if (!(readl(i2c->regs + S3C2410_IICSTAT) in is_ack()
234 dev_err(i2c->dev, "ack was not received\n"); in is_ack()
241 static void s3c24xx_i2c_message_start(struct s3c24xx_i2c *i2c, in s3c24xx_i2c_message_start() argument
244 unsigned int addr = (msg->addr & 0x7f) << 1; in s3c24xx_i2c_message_start()
248 stat = 0; in s3c24xx_i2c_message_start()
251 if (msg->flags & I2C_M_RD) { in s3c24xx_i2c_message_start()
257 if (msg->flags & I2C_M_REV_DIR_ADDR) in s3c24xx_i2c_message_start()
260 /* todo - check for whether ack wanted or not */ in s3c24xx_i2c_message_start()
261 s3c24xx_i2c_enable_ack(i2c); in s3c24xx_i2c_message_start()
263 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
264 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
266 dev_dbg(i2c->dev, "START: %08lx to IICSTAT, %02x to DS\n", stat, addr); in s3c24xx_i2c_message_start()
267 writeb(addr, i2c->regs + S3C2410_IICDS); in s3c24xx_i2c_message_start()
273 ndelay(i2c->tx_setup); in s3c24xx_i2c_message_start()
275 dev_dbg(i2c->dev, "iiccon, %08lx\n", iiccon); in s3c24xx_i2c_message_start()
276 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_message_start()
279 writel(stat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
281 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_message_start()
282 while ((i2c->msg_num != 0) && is_ack(i2c)) { in s3c24xx_i2c_message_start()
283 i2c_s3c_irq_nextbyte(i2c, stat); in s3c24xx_i2c_message_start()
284 stat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_message_start()
287 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_message_start()
292 static inline void s3c24xx_i2c_stop(struct s3c24xx_i2c *i2c, int ret) in s3c24xx_i2c_stop() argument
294 unsigned long iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
296 dev_dbg(i2c->dev, "STOP\n"); in s3c24xx_i2c_stop()
300 * 1) I2CSTAT.5 = 0 - Clear BUSY (or 'generate STOP') in s3c24xx_i2c_stop()
301 * 2) I2CCON.4 = 0 - Clear IRQPEND in s3c24xx_i2c_stop()
303 * 4*) I2CSTAT.4 = 0 - Clear TXRXEN in s3c24xx_i2c_stop()
309 * Master->Slave when they complete generating a STOP condition. in s3c24xx_i2c_stop()
322 * To avoid these extra post-STOP transactions on HDMI phy devices, we in s3c24xx_i2c_stop()
323 * just disable Serial Output on the bus (I2CSTAT.4 = 0) directly, in s3c24xx_i2c_stop()
332 if (i2c->quirks & QUIRK_HDMIPHY) { in s3c24xx_i2c_stop()
333 /* Stop driving the I2C pins */ in s3c24xx_i2c_stop()
339 writel(iicstat, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_stop()
341 i2c->state = STATE_STOP; in s3c24xx_i2c_stop()
343 s3c24xx_i2c_master_complete(i2c, ret); in s3c24xx_i2c_stop()
344 s3c24xx_i2c_disable_irq(i2c); in s3c24xx_i2c_stop()
355 static inline int is_lastmsg(struct s3c24xx_i2c *i2c) in is_lastmsg() argument
357 return i2c->msg_idx >= (i2c->msg_num - 1); in is_lastmsg()
363 static inline int is_msglast(struct s3c24xx_i2c *i2c) in is_msglast() argument
366 * msg->len is always 1 for the first byte of smbus block read. in is_msglast()
370 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in is_msglast()
371 return 0; in is_msglast()
373 return i2c->msg_ptr == i2c->msg->len-1; in is_msglast()
379 static inline int is_msgend(struct s3c24xx_i2c *i2c) in is_msgend() argument
381 return i2c->msg_ptr >= i2c->msg->len; in is_msgend()
387 static int i2c_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) in i2c_s3c_irq_nextbyte() argument
391 int ret = 0; in i2c_s3c_irq_nextbyte()
393 switch (i2c->state) { in i2c_s3c_irq_nextbyte()
396 dev_err(i2c->dev, "%s: called in STATE_IDLE\n", __func__); in i2c_s3c_irq_nextbyte()
400 dev_err(i2c->dev, "%s: called in STATE_STOP\n", __func__); in i2c_s3c_irq_nextbyte()
401 s3c24xx_i2c_disable_irq(i2c); in i2c_s3c_irq_nextbyte()
407 * bus, or started a new i2c message in i2c_s3c_irq_nextbyte()
410 !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
412 dev_dbg(i2c->dev, "ack was not received\n"); in i2c_s3c_irq_nextbyte()
413 s3c24xx_i2c_stop(i2c, -ENXIO); in i2c_s3c_irq_nextbyte()
417 if (i2c->msg->flags & I2C_M_RD) in i2c_s3c_irq_nextbyte()
418 i2c->state = STATE_READ; in i2c_s3c_irq_nextbyte()
420 i2c->state = STATE_WRITE; in i2c_s3c_irq_nextbyte()
424 * as this is used by the i2c probe to find devices. in i2c_s3c_irq_nextbyte()
426 if (is_lastmsg(i2c) && i2c->msg->len == 0) { in i2c_s3c_irq_nextbyte()
427 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
431 if (i2c->state == STATE_READ) in i2c_s3c_irq_nextbyte()
444 if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { in i2c_s3c_irq_nextbyte()
446 dev_dbg(i2c->dev, "WRITE: No Ack\n"); in i2c_s3c_irq_nextbyte()
448 s3c24xx_i2c_stop(i2c, -ECONNREFUSED); in i2c_s3c_irq_nextbyte()
455 if (!is_msgend(i2c)) { in i2c_s3c_irq_nextbyte()
456 byte = i2c->msg->buf[i2c->msg_ptr++]; in i2c_s3c_irq_nextbyte()
457 writeb(byte, i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
466 ndelay(i2c->tx_setup); in i2c_s3c_irq_nextbyte()
468 } else if (!is_lastmsg(i2c)) { in i2c_s3c_irq_nextbyte()
469 /* we need to go to the next i2c message */ in i2c_s3c_irq_nextbyte()
471 dev_dbg(i2c->dev, "WRITE: Next Message\n"); in i2c_s3c_irq_nextbyte()
473 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
474 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
475 i2c->msg++; in i2c_s3c_irq_nextbyte()
478 if (i2c->msg->flags & I2C_M_NOSTART) { in i2c_s3c_irq_nextbyte()
480 if (i2c->msg->flags & I2C_M_RD) { in i2c_s3c_irq_nextbyte()
486 dev_dbg(i2c->dev, in i2c_s3c_irq_nextbyte()
487 "missing START before write->read\n"); in i2c_s3c_irq_nextbyte()
488 s3c24xx_i2c_stop(i2c, -EINVAL); in i2c_s3c_irq_nextbyte()
495 s3c24xx_i2c_message_start(i2c, i2c->msg); in i2c_s3c_irq_nextbyte()
496 i2c->state = STATE_START; in i2c_s3c_irq_nextbyte()
501 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
511 byte = readb(i2c->regs + S3C2410_IICDS); in i2c_s3c_irq_nextbyte()
512 i2c->msg->buf[i2c->msg_ptr++] = byte; in i2c_s3c_irq_nextbyte()
515 if (i2c->msg->flags & I2C_M_RECV_LEN && i2c->msg->len == 1) in i2c_s3c_irq_nextbyte()
516 i2c->msg->len += byte; in i2c_s3c_irq_nextbyte()
518 if (is_msglast(i2c)) { in i2c_s3c_irq_nextbyte()
521 if (is_lastmsg(i2c)) in i2c_s3c_irq_nextbyte()
522 s3c24xx_i2c_disable_ack(i2c); in i2c_s3c_irq_nextbyte()
524 } else if (is_msgend(i2c)) { in i2c_s3c_irq_nextbyte()
529 if (is_lastmsg(i2c)) { in i2c_s3c_irq_nextbyte()
531 dev_dbg(i2c->dev, "READ: Send Stop\n"); in i2c_s3c_irq_nextbyte()
533 s3c24xx_i2c_stop(i2c, 0); in i2c_s3c_irq_nextbyte()
536 dev_dbg(i2c->dev, "READ: Next Transfer\n"); in i2c_s3c_irq_nextbyte()
538 i2c->msg_ptr = 0; in i2c_s3c_irq_nextbyte()
539 i2c->msg_idx++; in i2c_s3c_irq_nextbyte()
540 i2c->msg++; in i2c_s3c_irq_nextbyte()
550 tmp = readl(i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
552 writel(tmp, i2c->regs + S3C2410_IICCON); in i2c_s3c_irq_nextbyte()
562 struct s3c24xx_i2c *i2c = dev_id; in s3c24xx_i2c_irq() local
566 status = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_irq()
570 dev_err(i2c->dev, "deal with arbitration loss\n"); in s3c24xx_i2c_irq()
573 if (i2c->state == STATE_IDLE) { in s3c24xx_i2c_irq()
574 dev_dbg(i2c->dev, "IRQ: error i2c->state == IDLE\n"); in s3c24xx_i2c_irq()
576 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
578 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_irq()
586 i2c_s3c_irq_nextbyte(i2c, status); in s3c24xx_i2c_irq()
597 * If there is an event on the bus, or we have a pre-existing event at
598 * kernel boot time, we may not notice the event and the I2C controller
599 * will lock the bus with the I2C clock line low indefinitely.
601 static inline void s3c24xx_i2c_disable_bus(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_disable_bus() argument
605 /* Stop driving the I2C pins */ in s3c24xx_i2c_disable_bus()
606 tmp = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
608 writel(tmp, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_disable_bus()
611 tmp = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
614 writel(tmp, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_disable_bus()
619 * get the i2c bus for a master transaction
621 static int s3c24xx_i2c_set_master(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_set_master() argument
626 while (timeout-- > 0) { in s3c24xx_i2c_set_master()
627 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_set_master()
630 return 0; in s3c24xx_i2c_set_master()
635 return -ETIMEDOUT; in s3c24xx_i2c_set_master()
639 * wait for the i2c bus to become idle.
641 static void s3c24xx_i2c_wait_idle(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_wait_idle() argument
650 dev_dbg(i2c->dev, "waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
656 * end of a transaction. However, really slow i2c devices can stretch in s3c24xx_i2c_wait_idle()
663 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
664 while ((iicstat & S3C2410_IICSTAT_START) && --spins) { in s3c24xx_i2c_wait_idle()
666 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
683 iicstat = readl(i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_wait_idle()
687 dev_warn(i2c->dev, "timeout waiting for bus idle\n"); in s3c24xx_i2c_wait_idle()
691 * this starts an i2c transfer
693 static int s3c24xx_i2c_doxfer(struct s3c24xx_i2c *i2c, in s3c24xx_i2c_doxfer() argument
699 ret = s3c24xx_i2c_set_master(i2c); in s3c24xx_i2c_doxfer()
700 if (ret != 0) { in s3c24xx_i2c_doxfer()
701 dev_err(i2c->dev, "cannot get bus (error %d)\n", ret); in s3c24xx_i2c_doxfer()
702 ret = -EAGAIN; in s3c24xx_i2c_doxfer()
706 i2c->msg = msgs; in s3c24xx_i2c_doxfer()
707 i2c->msg_num = num; in s3c24xx_i2c_doxfer()
708 i2c->msg_ptr = 0; in s3c24xx_i2c_doxfer()
709 i2c->msg_idx = 0; in s3c24xx_i2c_doxfer()
710 i2c->state = STATE_START; in s3c24xx_i2c_doxfer()
712 s3c24xx_i2c_enable_irq(i2c); in s3c24xx_i2c_doxfer()
713 s3c24xx_i2c_message_start(i2c, msgs); in s3c24xx_i2c_doxfer()
715 if (i2c->quirks & QUIRK_POLL) { in s3c24xx_i2c_doxfer()
716 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
719 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
724 timeout = wait_event_timeout(i2c->wait, i2c->msg_num == 0, HZ * 5); in s3c24xx_i2c_doxfer()
726 ret = i2c->msg_idx; in s3c24xx_i2c_doxfer()
732 if (timeout == 0) in s3c24xx_i2c_doxfer()
733 dev_dbg(i2c->dev, "timeout\n"); in s3c24xx_i2c_doxfer()
735 dev_dbg(i2c->dev, "incomplete xfer (%d)\n", ret); in s3c24xx_i2c_doxfer()
738 if (i2c->quirks & QUIRK_HDMIPHY) in s3c24xx_i2c_doxfer()
741 s3c24xx_i2c_wait_idle(i2c); in s3c24xx_i2c_doxfer()
743 s3c24xx_i2c_disable_bus(i2c); in s3c24xx_i2c_doxfer()
746 i2c->state = STATE_IDLE; in s3c24xx_i2c_doxfer()
752 * first port of call from the i2c bus code when an message needs
753 * transferring across the i2c bus.
758 struct s3c24xx_i2c *i2c = (struct s3c24xx_i2c *)adap->algo_data; in s3c24xx_i2c_xfer() local
762 ret = clk_enable(i2c->clk); in s3c24xx_i2c_xfer()
766 for (retry = 0; retry < adap->retries; retry++) { in s3c24xx_i2c_xfer()
768 ret = s3c24xx_i2c_doxfer(i2c, msgs, num); in s3c24xx_i2c_xfer()
770 if (ret != -EAGAIN) { in s3c24xx_i2c_xfer()
771 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
775 dev_dbg(i2c->dev, "Retrying transmission (%d)\n", retry); in s3c24xx_i2c_xfer()
780 clk_disable(i2c->clk); in s3c24xx_i2c_xfer()
781 return -EREMOTEIO; in s3c24xx_i2c_xfer()
784 /* declare our i2c functionality */
791 /* i2c bus registration info */
811 calc_divs += calc_div1-1; in s3c24xx_i2c_calcdivisor()
814 if (calc_divs == 0) in s3c24xx_i2c_calcdivisor()
830 static int s3c24xx_i2c_clockrate(struct s3c24xx_i2c *i2c, unsigned int *got) in s3c24xx_i2c_clockrate() argument
832 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_clockrate()
833 unsigned long clkin = clk_get_rate(i2c->clk); in s3c24xx_i2c_clockrate()
839 i2c->clkrate = clkin; in s3c24xx_i2c_clockrate()
842 dev_dbg(i2c->dev, "pdata desired frequency %lu\n", pdata->frequency); in s3c24xx_i2c_clockrate()
844 target_frequency = pdata->frequency ?: I2C_MAX_STANDARD_MODE_FREQ; in s3c24xx_i2c_clockrate()
851 dev_err(i2c->dev, in s3c24xx_i2c_clockrate()
854 return -EINVAL; in s3c24xx_i2c_clockrate()
859 iiccon = readl(i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
861 iiccon |= (divs-1); in s3c24xx_i2c_clockrate()
866 if (i2c->quirks & QUIRK_POLL) in s3c24xx_i2c_clockrate()
869 writel(iiccon, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_clockrate()
871 if (i2c->quirks & QUIRK_S3C2440) { in s3c24xx_i2c_clockrate()
874 if (pdata->sda_delay) { in s3c24xx_i2c_clockrate()
875 sda_delay = clkin * pdata->sda_delay; in s3c24xx_i2c_clockrate()
882 sda_delay = 0; in s3c24xx_i2c_clockrate()
884 dev_dbg(i2c->dev, "IICLC=%08lx\n", sda_delay); in s3c24xx_i2c_clockrate()
885 writel(sda_delay, i2c->regs + S3C2440_IICLC); in s3c24xx_i2c_clockrate()
888 return 0; in s3c24xx_i2c_clockrate()
898 struct s3c24xx_i2c *i2c = freq_to_i2c(nb); in s3c24xx_i2c_cpufreq_transition() local
903 delta_f = clk_get_rate(i2c->clk) - i2c->clkrate; in s3c24xx_i2c_cpufreq_transition()
905 /* if we're post-change and the input clock has slowed down in s3c24xx_i2c_cpufreq_transition()
906 * or at pre-change and the clock is about to speed up, then in s3c24xx_i2c_cpufreq_transition()
907 * adjust our clock rate. <0 is slow, >0 speedup. in s3c24xx_i2c_cpufreq_transition()
910 if ((val == CPUFREQ_POSTCHANGE && delta_f < 0) || in s3c24xx_i2c_cpufreq_transition()
911 (val == CPUFREQ_PRECHANGE && delta_f > 0)) { in s3c24xx_i2c_cpufreq_transition()
912 i2c_lock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); in s3c24xx_i2c_cpufreq_transition()
913 ret = s3c24xx_i2c_clockrate(i2c, &got); in s3c24xx_i2c_cpufreq_transition()
914 i2c_unlock_bus(&i2c->adap, I2C_LOCK_ROOT_ADAPTER); in s3c24xx_i2c_cpufreq_transition()
916 if (ret < 0) in s3c24xx_i2c_cpufreq_transition()
917 dev_err(i2c->dev, "cannot find frequency (%d)\n", ret); in s3c24xx_i2c_cpufreq_transition()
919 dev_info(i2c->dev, "setting freq %d\n", got); in s3c24xx_i2c_cpufreq_transition()
922 return 0; in s3c24xx_i2c_cpufreq_transition()
925 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_register_cpufreq() argument
927 i2c->freq_transition.notifier_call = s3c24xx_i2c_cpufreq_transition; in s3c24xx_i2c_register_cpufreq()
929 return cpufreq_register_notifier(&i2c->freq_transition, in s3c24xx_i2c_register_cpufreq()
933 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_deregister_cpufreq() argument
935 cpufreq_unregister_notifier(&i2c->freq_transition, in s3c24xx_i2c_deregister_cpufreq()
940 static inline int s3c24xx_i2c_register_cpufreq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_register_cpufreq() argument
942 return 0; in s3c24xx_i2c_register_cpufreq()
945 static inline void s3c24xx_i2c_deregister_cpufreq(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_deregister_cpufreq() argument
951 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt_gpio() argument
955 if (i2c->quirks & QUIRK_NO_GPIO) in s3c24xx_i2c_parse_dt_gpio()
956 return 0; in s3c24xx_i2c_parse_dt_gpio()
958 for (i = 0; i < 2; i++) { in s3c24xx_i2c_parse_dt_gpio()
959 i2c->gpios[i] = devm_gpiod_get_index(i2c->dev, NULL, in s3c24xx_i2c_parse_dt_gpio()
961 if (IS_ERR(i2c->gpios[i])) { in s3c24xx_i2c_parse_dt_gpio()
962 dev_err(i2c->dev, "i2c gpio invalid at index %d\n", i); in s3c24xx_i2c_parse_dt_gpio()
963 return -EINVAL; in s3c24xx_i2c_parse_dt_gpio()
966 return 0; in s3c24xx_i2c_parse_dt_gpio()
970 static int s3c24xx_i2c_parse_dt_gpio(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt_gpio() argument
972 return 0; in s3c24xx_i2c_parse_dt_gpio()
979 static int s3c24xx_i2c_init(struct s3c24xx_i2c *i2c) in s3c24xx_i2c_init() argument
986 pdata = i2c->pdata; in s3c24xx_i2c_init()
990 writeb(pdata->slave_addr, i2c->regs + S3C2410_IICADD); in s3c24xx_i2c_init()
992 dev_info(i2c->dev, "slave address 0x%02x\n", pdata->slave_addr); in s3c24xx_i2c_init()
994 writel(0, i2c->regs + S3C2410_IICCON); in s3c24xx_i2c_init()
995 writel(0, i2c->regs + S3C2410_IICSTAT); in s3c24xx_i2c_init()
999 if (s3c24xx_i2c_clockrate(i2c, &freq) != 0) { in s3c24xx_i2c_init()
1000 dev_err(i2c->dev, "cannot meet bus frequency required\n"); in s3c24xx_i2c_init()
1001 return -EINVAL; in s3c24xx_i2c_init()
1004 /* todo - check that the i2c lines aren't being dragged anywhere */ in s3c24xx_i2c_init()
1006 dev_info(i2c->dev, "bus frequency set to %d KHz\n", freq); in s3c24xx_i2c_init()
1007 dev_dbg(i2c->dev, "S3C2410_IICCON=0x%02x\n", in s3c24xx_i2c_init()
1008 readl(i2c->regs + S3C2410_IICCON)); in s3c24xx_i2c_init()
1010 return 0; in s3c24xx_i2c_init()
1018 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) in s3c24xx_i2c_parse_dt() argument
1020 struct s3c2410_platform_i2c *pdata = i2c->pdata; in s3c24xx_i2c_parse_dt()
1026 pdata->bus_num = -1; /* i2c bus number is dynamically assigned */ in s3c24xx_i2c_parse_dt()
1027 of_property_read_u32(np, "samsung,i2c-sda-delay", &pdata->sda_delay); in s3c24xx_i2c_parse_dt()
1028 of_property_read_u32(np, "samsung,i2c-slave-addr", &pdata->slave_addr); in s3c24xx_i2c_parse_dt()
1029 of_property_read_u32(np, "samsung,i2c-max-bus-freq", in s3c24xx_i2c_parse_dt()
1030 (u32 *)&pdata->frequency); in s3c24xx_i2c_parse_dt()
1032 * Exynos5's legacy i2c controller and new high speed i2c in s3c24xx_i2c_parse_dt()
1034 * interrupts for 4-channel HS-I2C controller are enabled. in s3c24xx_i2c_parse_dt()
1035 * If nodes for first four channels of legacy i2c controller in s3c24xx_i2c_parse_dt()
1036 * are available then re-configure the interrupts via the in s3c24xx_i2c_parse_dt()
1039 id = of_alias_get_id(np, "i2c"); in s3c24xx_i2c_parse_dt()
1040 i2c->sysreg = syscon_regmap_lookup_by_phandle(np, in s3c24xx_i2c_parse_dt()
1041 "samsung,sysreg-phandle"); in s3c24xx_i2c_parse_dt()
1042 if (IS_ERR(i2c->sysreg)) in s3c24xx_i2c_parse_dt()
1045 regmap_update_bits(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, BIT(id), 0); in s3c24xx_i2c_parse_dt()
1049 s3c24xx_i2c_parse_dt(struct device_node *np, struct s3c24xx_i2c *i2c) { } in s3c24xx_i2c_parse_dt() argument
1054 struct s3c24xx_i2c *i2c; in s3c24xx_i2c_probe() local
1059 if (!pdev->dev.of_node) { in s3c24xx_i2c_probe()
1060 pdata = dev_get_platdata(&pdev->dev); in s3c24xx_i2c_probe()
1062 dev_err(&pdev->dev, "no platform data\n"); in s3c24xx_i2c_probe()
1063 return -EINVAL; in s3c24xx_i2c_probe()
1067 i2c = devm_kzalloc(&pdev->dev, sizeof(struct s3c24xx_i2c), GFP_KERNEL); in s3c24xx_i2c_probe()
1068 if (!i2c) in s3c24xx_i2c_probe()
1069 return -ENOMEM; in s3c24xx_i2c_probe()
1071 i2c->pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); in s3c24xx_i2c_probe()
1072 if (!i2c->pdata) in s3c24xx_i2c_probe()
1073 return -ENOMEM; in s3c24xx_i2c_probe()
1075 i2c->quirks = s3c24xx_get_device_quirks(pdev); in s3c24xx_i2c_probe()
1076 i2c->sysreg = ERR_PTR(-ENOENT); in s3c24xx_i2c_probe()
1078 memcpy(i2c->pdata, pdata, sizeof(*pdata)); in s3c24xx_i2c_probe()
1080 s3c24xx_i2c_parse_dt(pdev->dev.of_node, i2c); in s3c24xx_i2c_probe()
1082 strlcpy(i2c->adap.name, "s3c2410-i2c", sizeof(i2c->adap.name)); in s3c24xx_i2c_probe()
1083 i2c->adap.owner = THIS_MODULE; in s3c24xx_i2c_probe()
1084 i2c->adap.algo = &s3c24xx_i2c_algorithm; in s3c24xx_i2c_probe()
1085 i2c->adap.retries = 2; in s3c24xx_i2c_probe()
1086 i2c->adap.class = I2C_CLASS_DEPRECATED; in s3c24xx_i2c_probe()
1087 i2c->tx_setup = 50; in s3c24xx_i2c_probe()
1089 init_waitqueue_head(&i2c->wait); in s3c24xx_i2c_probe()
1092 i2c->dev = &pdev->dev; in s3c24xx_i2c_probe()
1093 i2c->clk = devm_clk_get(&pdev->dev, "i2c"); in s3c24xx_i2c_probe()
1094 if (IS_ERR(i2c->clk)) { in s3c24xx_i2c_probe()
1095 dev_err(&pdev->dev, "cannot get clock\n"); in s3c24xx_i2c_probe()
1096 return -ENOENT; in s3c24xx_i2c_probe()
1099 dev_dbg(&pdev->dev, "clock source %p\n", i2c->clk); in s3c24xx_i2c_probe()
1102 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); in s3c24xx_i2c_probe()
1103 i2c->regs = devm_ioremap_resource(&pdev->dev, res); in s3c24xx_i2c_probe()
1105 if (IS_ERR(i2c->regs)) in s3c24xx_i2c_probe()
1106 return PTR_ERR(i2c->regs); in s3c24xx_i2c_probe()
1108 dev_dbg(&pdev->dev, "registers %p (%p)\n", in s3c24xx_i2c_probe()
1109 i2c->regs, res); in s3c24xx_i2c_probe()
1111 /* setup info block for the i2c core */ in s3c24xx_i2c_probe()
1112 i2c->adap.algo_data = i2c; in s3c24xx_i2c_probe()
1113 i2c->adap.dev.parent = &pdev->dev; in s3c24xx_i2c_probe()
1114 i2c->pctrl = devm_pinctrl_get_select_default(i2c->dev); in s3c24xx_i2c_probe()
1116 /* inititalise the i2c gpio lines */ in s3c24xx_i2c_probe()
1117 if (i2c->pdata->cfg_gpio) in s3c24xx_i2c_probe()
1118 i2c->pdata->cfg_gpio(to_platform_device(i2c->dev)); in s3c24xx_i2c_probe()
1119 else if (IS_ERR(i2c->pctrl) && s3c24xx_i2c_parse_dt_gpio(i2c)) in s3c24xx_i2c_probe()
1120 return -EINVAL; in s3c24xx_i2c_probe()
1122 /* initialise the i2c controller */ in s3c24xx_i2c_probe()
1123 ret = clk_prepare_enable(i2c->clk); in s3c24xx_i2c_probe()
1125 dev_err(&pdev->dev, "I2C clock enable failed\n"); in s3c24xx_i2c_probe()
1129 ret = s3c24xx_i2c_init(i2c); in s3c24xx_i2c_probe()
1130 clk_disable(i2c->clk); in s3c24xx_i2c_probe()
1131 if (ret != 0) { in s3c24xx_i2c_probe()
1132 dev_err(&pdev->dev, "I2C controller init failed\n"); in s3c24xx_i2c_probe()
1133 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1141 if (!(i2c->quirks & QUIRK_POLL)) { in s3c24xx_i2c_probe()
1142 i2c->irq = ret = platform_get_irq(pdev, 0); in s3c24xx_i2c_probe()
1143 if (ret < 0) { in s3c24xx_i2c_probe()
1144 dev_err(&pdev->dev, "cannot find IRQ\n"); in s3c24xx_i2c_probe()
1145 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1149 ret = devm_request_irq(&pdev->dev, i2c->irq, s3c24xx_i2c_irq, in s3c24xx_i2c_probe()
1150 0, dev_name(&pdev->dev), i2c); in s3c24xx_i2c_probe()
1151 if (ret != 0) { in s3c24xx_i2c_probe()
1152 dev_err(&pdev->dev, "cannot claim IRQ %d\n", i2c->irq); in s3c24xx_i2c_probe()
1153 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1158 ret = s3c24xx_i2c_register_cpufreq(i2c); in s3c24xx_i2c_probe()
1159 if (ret < 0) { in s3c24xx_i2c_probe()
1160 dev_err(&pdev->dev, "failed to register cpufreq notifier\n"); in s3c24xx_i2c_probe()
1161 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1169 * being bus 0. in s3c24xx_i2c_probe()
1171 i2c->adap.nr = i2c->pdata->bus_num; in s3c24xx_i2c_probe()
1172 i2c->adap.dev.of_node = pdev->dev.of_node; in s3c24xx_i2c_probe()
1174 platform_set_drvdata(pdev, i2c); in s3c24xx_i2c_probe()
1176 pm_runtime_enable(&pdev->dev); in s3c24xx_i2c_probe()
1178 ret = i2c_add_numbered_adapter(&i2c->adap); in s3c24xx_i2c_probe()
1179 if (ret < 0) { in s3c24xx_i2c_probe()
1180 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_probe()
1181 s3c24xx_i2c_deregister_cpufreq(i2c); in s3c24xx_i2c_probe()
1182 clk_unprepare(i2c->clk); in s3c24xx_i2c_probe()
1186 dev_info(&pdev->dev, "%s: S3C I2C adapter\n", dev_name(&i2c->adap.dev)); in s3c24xx_i2c_probe()
1187 return 0; in s3c24xx_i2c_probe()
1192 struct s3c24xx_i2c *i2c = platform_get_drvdata(pdev); in s3c24xx_i2c_remove() local
1194 clk_unprepare(i2c->clk); in s3c24xx_i2c_remove()
1196 pm_runtime_disable(&pdev->dev); in s3c24xx_i2c_remove()
1198 s3c24xx_i2c_deregister_cpufreq(i2c); in s3c24xx_i2c_remove()
1200 i2c_del_adapter(&i2c->adap); in s3c24xx_i2c_remove()
1202 return 0; in s3c24xx_i2c_remove()
1208 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev); in s3c24xx_i2c_suspend_noirq() local
1210 i2c_mark_adapter_suspended(&i2c->adap); in s3c24xx_i2c_suspend_noirq()
1212 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_suspend_noirq()
1213 regmap_read(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, &i2c->sys_i2c_cfg); in s3c24xx_i2c_suspend_noirq()
1215 return 0; in s3c24xx_i2c_suspend_noirq()
1220 struct s3c24xx_i2c *i2c = dev_get_drvdata(dev); in s3c24xx_i2c_resume_noirq() local
1223 if (!IS_ERR(i2c->sysreg)) in s3c24xx_i2c_resume_noirq()
1224 regmap_write(i2c->sysreg, EXYNOS5_SYS_I2C_CFG, i2c->sys_i2c_cfg); in s3c24xx_i2c_resume_noirq()
1226 ret = clk_enable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1229 s3c24xx_i2c_init(i2c); in s3c24xx_i2c_resume_noirq()
1230 clk_disable(i2c->clk); in s3c24xx_i2c_resume_noirq()
1231 i2c_mark_adapter_resumed(&i2c->adap); in s3c24xx_i2c_resume_noirq()
1233 return 0; in s3c24xx_i2c_resume_noirq()
1253 .name = "s3c-i2c",
1271 MODULE_DESCRIPTION("S3C24XX I2C Bus driver");