Lines Matching +full:80 +full:a
17 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
18 * for PIO 5, which is a nonstandard extension and UDMA6, which
30 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
33 { XFER_MW_DMA_4, 25, 0, 0, 0, 55, 20, 80, 0 },
36 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
43 { XFER_PIO_6, 10, 55, 20, 80, 55, 20, 80, 0 },
46 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
109 void ide_timing_merge(struct ide_timing *a, struct ide_timing *b, in ide_timing_merge() argument
113 m->setup = max(a->setup, b->setup); in ide_timing_merge()
115 m->act8b = max(a->act8b, b->act8b); in ide_timing_merge()
117 m->rec8b = max(a->rec8b, b->rec8b); in ide_timing_merge()
119 m->cyc8b = max(a->cyc8b, b->cyc8b); in ide_timing_merge()
121 m->active = max(a->active, b->active); in ide_timing_merge()
123 m->recover = max(a->recover, b->recover); in ide_timing_merge()
125 m->cycle = max(a->cycle, b->cycle); in ide_timing_merge()
127 m->udma = max(a->udma, b->udma); in ide_timing_merge()
175 * S.M.A.R.T and some other commands. We have to ensure that the in ide_timing_compute()