Lines Matching full:pcr
18 static u8 rts5261_get_ic_version(struct rtsx_pcr *pcr) in rts5261_get_ic_version() argument
22 rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val); in rts5261_get_ic_version()
26 static void rts5261_fill_driving(struct rtsx_pcr *pcr, u8 voltage) in rts5261_fill_driving() argument
44 drive_sel = pcr->sd30_drive_sel_3v3; in rts5261_fill_driving()
47 drive_sel = pcr->sd30_drive_sel_1v8; in rts5261_fill_driving()
50 rtsx_pci_write_register(pcr, SD30_CLK_DRIVE_SEL, in rts5261_fill_driving()
53 rtsx_pci_write_register(pcr, SD30_CMD_DRIVE_SEL, in rts5261_fill_driving()
56 rtsx_pci_write_register(pcr, SD30_DAT_DRIVE_SEL, in rts5261_fill_driving()
60 static void rtsx5261_fetch_vendor_settings(struct rtsx_pcr *pcr) in rtsx5261_fetch_vendor_settings() argument
62 struct pci_dev *pdev = pcr->pci; in rtsx5261_fetch_vendor_settings()
67 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg); in rtsx5261_fetch_vendor_settings()
70 pcr_dbg(pcr, "skip fetch vendor setting\n"); in rtsx5261_fetch_vendor_settings()
74 pcr->card_drive_sel &= 0x3F; in rtsx5261_fetch_vendor_settings()
75 pcr->card_drive_sel |= rts5261_reg_to_card_drive_sel(reg); in rtsx5261_fetch_vendor_settings()
78 pcr->flags |= PCR_REVERSE_SOCKET; in rtsx5261_fetch_vendor_settings()
82 pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg); in rtsx5261_fetch_vendor_settings()
84 pcr->aspm_en = rts5261_reg_to_aspm(reg); in rtsx5261_fetch_vendor_settings()
85 pcr->sd30_drive_sel_1v8 = rts5261_reg_to_sd30_drive_sel_1v8(reg); in rtsx5261_fetch_vendor_settings()
86 pcr->sd30_drive_sel_3v3 = rts5261_reg_to_sd30_drive_sel_3v3(reg); in rtsx5261_fetch_vendor_settings()
89 static void rts5261_force_power_down(struct rtsx_pcr *pcr, u8 pm_state) in rts5261_force_power_down() argument
92 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 1, MASK_8_BIT_DEF, 0); in rts5261_force_power_down()
93 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 2, MASK_8_BIT_DEF, 0); in rts5261_force_power_down()
94 rtsx_pci_write_register(pcr, AUTOLOAD_CFG_BASE + 3, in rts5261_force_power_down()
98 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, in rts5261_force_power_down()
101 rtsx_pci_write_register(pcr, RTS5261_REG_FPDCTL, in rts5261_force_power_down()
105 static int rts5261_enable_auto_blink(struct rtsx_pcr *pcr) in rts5261_enable_auto_blink() argument
107 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5261_enable_auto_blink()
111 static int rts5261_disable_auto_blink(struct rtsx_pcr *pcr) in rts5261_disable_auto_blink() argument
113 return rtsx_pci_write_register(pcr, OLT_LED_CTL, in rts5261_disable_auto_blink()
117 static int rts5261_turn_on_led(struct rtsx_pcr *pcr) in rts5261_turn_on_led() argument
119 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5261_turn_on_led()
123 static int rts5261_turn_off_led(struct rtsx_pcr *pcr) in rts5261_turn_off_led() argument
125 return rtsx_pci_write_register(pcr, GPIO_CTL, in rts5261_turn_off_led()
155 static int rts5261_sd_set_sample_push_timing_sd30(struct rtsx_pcr *pcr) in rts5261_sd_set_sample_push_timing_sd30() argument
157 rtsx_pci_write_register(pcr, SD_CFG1, SD_MODE_SELECT_MASK in rts5261_sd_set_sample_push_timing_sd30()
159 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, CLK_LOW_FREQ); in rts5261_sd_set_sample_push_timing_sd30()
160 rtsx_pci_write_register(pcr, CARD_CLK_SOURCE, 0xFF, in rts5261_sd_set_sample_push_timing_sd30()
162 rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5261_sd_set_sample_push_timing_sd30()
167 static int rts5261_card_power_on(struct rtsx_pcr *pcr, int card) in rts5261_card_power_on() argument
169 struct rtsx_cr_option *option = &pcr->option; in rts5261_card_power_on()
172 rtsx_pci_enable_ocp(pcr); in rts5261_card_power_on()
175 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG1, in rts5261_card_power_on()
177 rtsx_pci_write_register(pcr, RTS5261_LDO1233318_POW_CTL, in rts5261_card_power_on()
180 rtsx_pci_write_register(pcr, RTS5261_LDO1233318_POW_CTL, in rts5261_card_power_on()
185 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN); in rts5261_card_power_on()
188 rtsx_pci_write_register(pcr, SD_CFG1, 0xFF, in rts5261_card_power_on()
191 rtsx_pci_write_register(pcr, SD_SAMPLE_POINT_CTL, in rts5261_card_power_on()
193 rtsx_pci_write_register(pcr, SD_PUSH_POINT_CTL, 0xFF, 0); in rts5261_card_power_on()
194 rtsx_pci_write_register(pcr, CARD_STOP, SD_STOP | SD_CLR_ERR, in rts5261_card_power_on()
198 rtsx_pci_write_register(pcr, SD_CFG3, SD30_CLK_END_EN, 0); in rts5261_card_power_on()
199 rtsx_pci_write_register(pcr, REG_SD_STOP_SDCLK_CFG, in rts5261_card_power_on()
203 if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50 || in rts5261_card_power_on()
204 pcr->extra_caps & EXTRA_CAPS_SD_SDR104) in rts5261_card_power_on()
205 rts5261_sd_set_sample_push_timing_sd30(pcr); in rts5261_card_power_on()
210 static int rts5261_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage) in rts5261_switch_output_voltage() argument
215 rtsx_pci_write_register(pcr, RTS5261_CARD_PWR_CTL, in rts5261_switch_output_voltage()
220 rtsx_pci_read_phy_register(pcr, PHY_TUNE, &val); in rts5261_switch_output_voltage()
222 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, val); in rts5261_switch_output_voltage()
226 rtsx_pci_write_register(pcr, RTS5261_DV3318_CFG, in rts5261_switch_output_voltage()
228 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5261_switch_output_voltage()
232 rtsx_pci_read_phy_register(pcr, PHY_TUNE, &val); in rts5261_switch_output_voltage()
234 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, val); in rts5261_switch_output_voltage()
238 rtsx_pci_write_register(pcr, RTS5261_DV3318_CFG, in rts5261_switch_output_voltage()
240 rtsx_pci_write_register(pcr, SD_PAD_CTL, in rts5261_switch_output_voltage()
248 rts5261_fill_driving(pcr, voltage); in rts5261_switch_output_voltage()
253 static void rts5261_stop_cmd(struct rtsx_pcr *pcr) in rts5261_stop_cmd() argument
255 rtsx_pci_writel(pcr, RTSX_HCBCTLR, STOP_CMD); in rts5261_stop_cmd()
256 rtsx_pci_writel(pcr, RTSX_HDBCTLR, STOP_DMA); in rts5261_stop_cmd()
257 rtsx_pci_write_register(pcr, RTS5260_DMA_RST_CTL_0, in rts5261_stop_cmd()
260 rtsx_pci_write_register(pcr, RBCTL, RB_FLUSH, RB_FLUSH); in rts5261_stop_cmd()
263 static void rts5261_card_before_power_off(struct rtsx_pcr *pcr) in rts5261_card_before_power_off() argument
265 rts5261_stop_cmd(pcr); in rts5261_card_before_power_off()
266 rts5261_switch_output_voltage(pcr, OUTPUT_3V3); in rts5261_card_before_power_off()
270 static void rts5261_enable_ocp(struct rtsx_pcr *pcr) in rts5261_enable_ocp() argument
275 rtsx_pci_write_register(pcr, REG_OCPCTL, 0xFF, val); in rts5261_enable_ocp()
279 static void rts5261_disable_ocp(struct rtsx_pcr *pcr) in rts5261_disable_ocp() argument
284 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5261_disable_ocp()
285 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_disable_ocp()
290 static int rts5261_card_power_off(struct rtsx_pcr *pcr, int card) in rts5261_card_power_off() argument
294 rts5261_card_before_power_off(pcr); in rts5261_card_power_off()
295 err = rtsx_pci_write_register(pcr, RTS5261_LDO1233318_POW_CTL, in rts5261_card_power_off()
298 if (pcr->option.ocp_en) in rts5261_card_power_off()
299 rtsx_pci_disable_ocp(pcr); in rts5261_card_power_off()
304 static void rts5261_init_ocp(struct rtsx_pcr *pcr) in rts5261_init_ocp() argument
306 struct rtsx_cr_option *option = &pcr->option; in rts5261_init_ocp()
311 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
315 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
318 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
323 val = pcr->hw_param.ocp_glitch; in rts5261_init_ocp()
324 rtsx_pci_write_register(pcr, REG_OCPGLITCH, mask, val); in rts5261_init_ocp()
326 rts5261_enable_ocp(pcr); in rts5261_init_ocp()
328 rtsx_pci_write_register(pcr, RTS5261_LDO1_CFG0, in rts5261_init_ocp()
333 static void rts5261_clear_ocpstat(struct rtsx_pcr *pcr) in rts5261_clear_ocpstat() argument
341 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, val); in rts5261_clear_ocpstat()
344 rtsx_pci_write_register(pcr, REG_OCPCTL, mask, 0); in rts5261_clear_ocpstat()
348 static void rts5261_process_ocp(struct rtsx_pcr *pcr) in rts5261_process_ocp() argument
350 if (!pcr->option.ocp_en) in rts5261_process_ocp()
353 rtsx_pci_get_ocpstat(pcr, &pcr->ocp_stat); in rts5261_process_ocp()
355 if (pcr->ocp_stat & (SD_OC_NOW | SD_OC_EVER)) { in rts5261_process_ocp()
356 rts5261_card_power_off(pcr, RTSX_SD_CARD); in rts5261_process_ocp()
357 rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, 0); in rts5261_process_ocp()
358 rts5261_clear_ocpstat(pcr); in rts5261_process_ocp()
359 pcr->ocp_stat = 0; in rts5261_process_ocp()
364 static int rts5261_init_from_hw(struct rtsx_pcr *pcr) in rts5261_init_from_hw() argument
366 struct pci_dev *pdev = pcr->pci; in rts5261_init_from_hw()
371 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_init_from_hw()
375 rtsx_pci_write_register(pcr, RTS5261_EFUSE_ADDR, in rts5261_init_from_hw()
377 rtsx_pci_write_register(pcr, RTS5261_EFUSE_CTL, in rts5261_init_from_hw()
383 rtsx_pci_read_register(pcr, RTS5261_EFUSE_CTL, &tmp); in rts5261_init_from_hw()
387 rtsx_pci_read_register(pcr, RTS5261_EFUSE_READ_DATA, &tmp); in rts5261_init_from_hw()
389 pcr_dbg(pcr, "Load efuse valid: 0x%x\n", efuse_valid); in rts5261_init_from_hw()
394 pcr_dbg(pcr, "read 0x814 DW fail\n"); in rts5261_init_from_hw()
395 pcr_dbg(pcr, "DW from 0x814: 0x%x\n", lval); in rts5261_init_from_hw()
398 pcr_dbg(pcr, "0x816: %d\n", valid); in rts5261_init_from_hw()
400 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_init_from_hw()
402 pcr_dbg(pcr, "Disable efuse por!\n"); in rts5261_init_from_hw()
408 pcr_dbg(pcr, "write config fail\n"); in rts5261_init_from_hw()
413 static void rts5261_init_from_cfg(struct rtsx_pcr *pcr) in rts5261_init_from_cfg() argument
415 struct pci_dev *pdev = pcr->pci; in rts5261_init_from_cfg()
418 struct rtsx_cr_option *option = &pcr->option; in rts5261_init_from_cfg()
427 rtsx_set_dev_flag(pcr, ASPM_L1_1_EN); in rts5261_init_from_cfg()
429 rtsx_clear_dev_flag(pcr, ASPM_L1_1_EN); in rts5261_init_from_cfg()
432 rtsx_set_dev_flag(pcr, ASPM_L1_2_EN); in rts5261_init_from_cfg()
434 rtsx_clear_dev_flag(pcr, ASPM_L1_2_EN); in rts5261_init_from_cfg()
437 rtsx_set_dev_flag(pcr, PM_L1_1_EN); in rts5261_init_from_cfg()
439 rtsx_clear_dev_flag(pcr, PM_L1_1_EN); in rts5261_init_from_cfg()
442 rtsx_set_dev_flag(pcr, PM_L1_2_EN); in rts5261_init_from_cfg()
444 rtsx_clear_dev_flag(pcr, PM_L1_2_EN); in rts5261_init_from_cfg()
446 rtsx_pci_write_register(pcr, ASPM_FORCE_CTL, 0xFF, 0); in rts5261_init_from_cfg()
454 rtsx_set_ltr_latency(pcr, option->ltr_active_latency); in rts5261_init_from_cfg()
460 if (rtsx_check_dev_flag(pcr, ASPM_L1_1_EN | ASPM_L1_2_EN in rts5261_init_from_cfg()
467 static int rts5261_extra_init_hw(struct rtsx_pcr *pcr) in rts5261_extra_init_hw() argument
469 struct rtsx_cr_option *option = &pcr->option; in rts5261_extra_init_hw()
471 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG1, in rts5261_extra_init_hw()
474 rts5261_init_from_cfg(pcr); in rts5261_extra_init_hw()
475 rts5261_init_from_hw(pcr); in rts5261_extra_init_hw()
478 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_extra_init_hw()
480 rtsx_pci_write_register(pcr, L1SUB_CONFIG1, in rts5261_extra_init_hw()
482 rtsx_pci_write_register(pcr, L1SUB_CONFIG3, 0xFF, 0); in rts5261_extra_init_hw()
484 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG4, in rts5261_extra_init_hw()
488 rtsx_pci_write_register(pcr, RTS5261_AUTOLOAD_CFG4, in rts5261_extra_init_hw()
490 rtsx_pci_write_register(pcr, FUNC_FORCE_CTL, in rts5261_extra_init_hw()
493 rtsx_pci_write_register(pcr, PCLK_CTL, in rts5261_extra_init_hw()
496 rtsx_pci_write_register(pcr, PM_EVENT_DEBUG, PME_DEBUG_0, PME_DEBUG_0); in rts5261_extra_init_hw()
497 rtsx_pci_write_register(pcr, PM_CLK_FORCE_CTL, CLK_PM_EN, CLK_PM_EN); in rts5261_extra_init_hw()
500 rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x0F, 0x02); in rts5261_extra_init_hw()
503 rts5261_fill_driving(pcr, OUTPUT_3V3); in rts5261_extra_init_hw()
510 rtsx_pci_write_register(pcr, PETXCFG, in rts5261_extra_init_hw()
513 rtsx_pci_write_register(pcr, PETXCFG, in rts5261_extra_init_hw()
516 rtsx_pci_write_register(pcr, pcr->reg_pm_ctrl3, 0x10, 0x00); in rts5261_extra_init_hw()
517 rtsx_pci_write_register(pcr, RTS5261_REG_PME_FORCE_CTL, in rts5261_extra_init_hw()
521 rtsx_pci_write_register(pcr, RTS5261_FW_CTL, in rts5261_extra_init_hw()
527 static void rts5261_enable_aspm(struct rtsx_pcr *pcr, bool enable) in rts5261_enable_aspm() argument
529 if (pcr->aspm_enabled == enable) in rts5261_enable_aspm()
532 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rts5261_enable_aspm()
533 PCI_EXP_LNKCTL_ASPMC, pcr->aspm_en); in rts5261_enable_aspm()
534 pcr->aspm_enabled = enable; in rts5261_enable_aspm()
538 static void rts5261_disable_aspm(struct rtsx_pcr *pcr, bool enable) in rts5261_disable_aspm() argument
540 if (pcr->aspm_enabled == enable) in rts5261_disable_aspm()
543 pcie_capability_clear_and_set_word(pcr->pci, PCI_EXP_LNKCTL, in rts5261_disable_aspm()
545 rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); in rts5261_disable_aspm()
547 pcr->aspm_enabled = enable; in rts5261_disable_aspm()
550 static void rts5261_set_aspm(struct rtsx_pcr *pcr, bool enable) in rts5261_set_aspm() argument
553 rts5261_enable_aspm(pcr, true); in rts5261_set_aspm()
555 rts5261_disable_aspm(pcr, false); in rts5261_set_aspm()
558 static void rts5261_set_l1off_cfg_sub_d0(struct rtsx_pcr *pcr, int active) in rts5261_set_l1off_cfg_sub_d0() argument
560 struct rtsx_cr_option *option = &pcr->option; in rts5261_set_l1off_cfg_sub_d0()
564 aspm_L1_1 = rtsx_check_dev_flag(pcr, ASPM_L1_1_EN); in rts5261_set_l1off_cfg_sub_d0()
565 aspm_L1_2 = rtsx_check_dev_flag(pcr, ASPM_L1_2_EN); in rts5261_set_l1off_cfg_sub_d0()
577 rtsx_set_l1off_sub(pcr, val); in rts5261_set_l1off_cfg_sub_d0()
606 int rts5261_pci_switch_clock(struct rtsx_pcr *pcr, unsigned int card_clock, in rts5261_pci_switch_clock() argument
621 if (is_version(pcr, PID_5261, IC_VER_D)) { in rts5261_pci_switch_clock()
631 err = rtsx_pci_write_register(pcr, SD_CFG1, in rts5261_pci_switch_clock()
637 pcr_dbg(pcr, "Switch card clock to %dMHz\n", card_clock); in rts5261_pci_switch_clock()
642 pcr_dbg(pcr, "Internal SSC clock: %dMHz (cur_clock = %d)\n", in rts5261_pci_switch_clock()
643 clk, pcr->cur_clock); in rts5261_pci_switch_clock()
645 if (clk == pcr->cur_clock) in rts5261_pci_switch_clock()
648 if (pcr->ops->conv_clk_and_div_n) in rts5261_pci_switch_clock()
649 n = pcr->ops->conv_clk_and_div_n(clk, CLK_TO_DIV_N); in rts5261_pci_switch_clock()
661 if (pcr->ops->conv_clk_and_div_n) { in rts5261_pci_switch_clock()
662 int dbl_clk = pcr->ops->conv_clk_and_div_n(n, in rts5261_pci_switch_clock()
664 n = pcr->ops->conv_clk_and_div_n(dbl_clk, in rts5261_pci_switch_clock()
673 pcr_dbg(pcr, "n = %d, div = %d\n", n, div); in rts5261_pci_switch_clock()
699 pcr_dbg(pcr, "ssc_depth = %d\n", ssc_depth); in rts5261_pci_switch_clock()
701 rtsx_pci_init_cmd(pcr); in rts5261_pci_switch_clock()
702 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in rts5261_pci_switch_clock()
704 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_DIV, in rts5261_pci_switch_clock()
706 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, 0); in rts5261_pci_switch_clock()
707 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL2, in rts5261_pci_switch_clock()
709 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_DIV_N_0, 0xFF, n); in rts5261_pci_switch_clock()
710 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SSC_CTL1, SSC_RSTB, SSC_RSTB); in rts5261_pci_switch_clock()
712 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5261_pci_switch_clock()
714 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5261_pci_switch_clock()
716 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK0_CTL, in rts5261_pci_switch_clock()
718 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_VPCLK1_CTL, in rts5261_pci_switch_clock()
722 err = rtsx_pci_send_cmd(pcr, 2000); in rts5261_pci_switch_clock()
728 err = rtsx_pci_write_register(pcr, CLK_CTL, CLK_LOW_FREQ, 0); in rts5261_pci_switch_clock()
732 pcr->cur_clock = clk; in rts5261_pci_switch_clock()
737 void rts5261_init_params(struct rtsx_pcr *pcr) in rts5261_init_params() argument
739 struct rtsx_cr_option *option = &pcr->option; in rts5261_init_params()
740 struct rtsx_hw_param *hw_param = &pcr->hw_param; in rts5261_init_params()
742 pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104; in rts5261_init_params()
743 pcr->num_slots = 1; in rts5261_init_params()
744 pcr->ops = &rts5261_pcr_ops; in rts5261_init_params()
746 pcr->flags = 0; in rts5261_init_params()
747 pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT; in rts5261_init_params()
748 pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_B; in rts5261_init_params()
749 pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B; in rts5261_init_params()
750 pcr->aspm_en = ASPM_L1_EN; in rts5261_init_params()
751 pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 11); in rts5261_init_params()
752 pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5); in rts5261_init_params()
754 pcr->ic_version = rts5261_get_ic_version(pcr); in rts5261_init_params()
755 pcr->sd_pull_ctl_enable_tbl = rts5261_sd_pull_ctl_enable_tbl; in rts5261_init_params()
756 pcr->sd_pull_ctl_disable_tbl = rts5261_sd_pull_ctl_disable_tbl; in rts5261_init_params()
758 pcr->reg_pm_ctrl3 = RTS5261_AUTOLOAD_CFG3; in rts5261_init_params()