Lines Matching full:pcr
26 struct rtsx_pcr *pcr; member
54 rtsx_pci_write_register(host->pcr, CARD_STOP, in sd_clear_error()
71 rtsx_pci_read_register(host->pcr, start + i + j, in dump_reg_range()
89 return rtsx_pci_readl(host->pcr, RTSX_BIPR) & SD_EXIST; in sd_get_cd_int()
92 static void sd_cmd_set_sd_cmd(struct rtsx_pcr *pcr, struct mmc_command *cmd) in sd_cmd_set_sd_cmd() argument
94 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CMD0, 0xFF, in sd_cmd_set_sd_cmd()
96 rtsx_pci_write_be32(pcr, SD_CMD1, cmd->arg); in sd_cmd_set_sd_cmd()
99 static void sd_cmd_set_data_len(struct rtsx_pcr *pcr, u16 blocks, u16 blksz) in sd_cmd_set_data_len() argument
101 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, blocks); in sd_cmd_set_data_len()
102 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, blocks >> 8); in sd_cmd_set_data_len()
103 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, blksz); in sd_cmd_set_data_len()
104 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, blksz >> 8); in sd_cmd_set_data_len()
147 struct rtsx_pcr *pcr = host->pcr; in sd_pre_dma_transfer() local
160 count = rtsx_pci_dma_map_sg(pcr, data->sg, data->sg_len, read); in sd_pre_dma_transfer()
198 struct rtsx_pcr *pcr = host->pcr; in sdmmc_post_req() local
202 rtsx_pci_dma_unmap_sg(pcr, data->sg, data->sg_len, read); in sdmmc_post_req()
209 struct rtsx_pcr *pcr = host->pcr; in sd_send_cmd_get_rsp() local
233 err = rtsx_pci_write_register(pcr, SD_BUS_STAT, in sd_send_cmd_get_rsp()
241 rtsx_pci_init_cmd(pcr); in sd_send_cmd_get_rsp()
242 sd_cmd_set_sd_cmd(pcr, cmd); in sd_send_cmd_get_rsp()
243 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type); in sd_send_cmd_get_rsp()
244 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_send_cmd_get_rsp()
246 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_send_cmd_get_rsp()
248 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, in sd_send_cmd_get_rsp()
255 rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0); in sd_send_cmd_get_rsp()
259 rtsx_pci_add_cmd(pcr, READ_REG_CMD, (u16)i, 0, 0); in sd_send_cmd_get_rsp()
262 rtsx_pci_add_cmd(pcr, READ_REG_CMD, SD_STAT1, 0, 0); in sd_send_cmd_get_rsp()
264 err = rtsx_pci_send_cmd(pcr, timeout); in sd_send_cmd_get_rsp()
279 ptr = rtsx_pci_get_cmd_data(pcr) + 1; in sd_send_cmd_get_rsp()
320 rtsx_pci_write_register(pcr, SD_BUS_STAT, in sd_send_cmd_get_rsp()
327 struct rtsx_pcr *pcr = host->pcr; in sd_read_data() local
342 rtsx_pci_init_cmd(pcr); in sd_read_data()
343 sd_cmd_set_sd_cmd(pcr, cmd); in sd_read_data()
344 sd_cmd_set_data_len(pcr, 1, byte_cnt); in sd_read_data()
345 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_read_data()
349 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_read_data()
352 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, in sd_read_data()
354 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, in sd_read_data()
357 err = rtsx_pci_send_cmd(pcr, timeout); in sd_read_data()
366 err = rtsx_pci_read_ppbuf(pcr, buf, buf_len); in sd_read_data()
381 struct rtsx_pcr *pcr = host->pcr; in sd_write_data() local
395 err = rtsx_pci_write_ppbuf(pcr, buf, buf_len); in sd_write_data()
403 rtsx_pci_init_cmd(pcr); in sd_write_data()
404 sd_cmd_set_data_len(pcr, 1, byte_cnt); in sd_write_data()
405 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, in sd_write_data()
408 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_write_data()
410 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, in sd_write_data()
413 err = rtsx_pci_send_cmd(pcr, timeout); in sd_write_data()
427 struct rtsx_pcr *pcr = host->pcr; in sd_read_long_data() local
448 rtsx_pci_init_cmd(pcr); in sd_read_long_data()
449 sd_cmd_set_sd_cmd(pcr, cmd); in sd_read_long_data()
450 sd_cmd_set_data_len(pcr, data->blocks, data->blksz); in sd_read_long_data()
451 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in sd_read_long_data()
453 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, in sd_read_long_data()
455 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, in sd_read_long_data()
457 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, in sd_read_long_data()
459 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len); in sd_read_long_data()
460 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, in sd_read_long_data()
463 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_read_long_data()
465 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2 | resp_type); in sd_read_long_data()
466 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_read_long_data()
468 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, in sd_read_long_data()
470 rtsx_pci_send_cmd_no_wait(pcr); in sd_read_long_data()
472 err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 1, 10000); in sd_read_long_data()
485 struct rtsx_pcr *pcr = host->pcr; in sd_write_long_data() local
508 rtsx_pci_init_cmd(pcr); in sd_write_long_data()
509 sd_cmd_set_data_len(pcr, data->blocks, data->blksz); in sd_write_long_data()
510 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, IRQSTAT0, in sd_write_long_data()
512 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC3, in sd_write_long_data()
514 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC2, in sd_write_long_data()
516 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC1, in sd_write_long_data()
518 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMATC0, 0xFF, (u8)data_len); in sd_write_long_data()
519 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, DMACTL, in sd_write_long_data()
522 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_DATA_SOURCE, in sd_write_long_data()
524 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2); in sd_write_long_data()
525 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_TRANSFER, 0xFF, in sd_write_long_data()
527 rtsx_pci_add_cmd(pcr, CHECK_REG_CMD, SD_TRANSFER, in sd_write_long_data()
529 rtsx_pci_send_cmd_no_wait(pcr); in sd_write_long_data()
530 err = rtsx_pci_dma_transfer(pcr, data->sg, host->sg_count, 0, 10000); in sd_write_long_data()
541 rtsx_pci_write_register(host->pcr, SD_CFG1, in sd_enable_initial_mode()
547 rtsx_pci_write_register(host->pcr, SD_CFG1, in sd_disable_initial_mode()
615 struct rtsx_pcr *pcr = host->pcr; in sd_change_phase() local
620 rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, CHANGE_CLK); in sd_change_phase()
623 rtsx_pci_write_register(pcr, SD_VPRX_CTL, in sd_change_phase()
627 rtsx_pci_write_register(pcr, SD_VPTX_CTL, in sd_change_phase()
630 rtsx_pci_write_register(pcr, SD_VP_CTL, PHASE_NOT_RESET, 0); in sd_change_phase()
631 rtsx_pci_write_register(pcr, SD_VP_CTL, PHASE_NOT_RESET, in sd_change_phase()
633 rtsx_pci_write_register(pcr, CLK_CTL, CHANGE_CLK, 0); in sd_change_phase()
634 rtsx_pci_write_register(pcr, SD_CFG1, SD_ASYNC_FIFO_NOT_RST, 0); in sd_change_phase()
689 rtsx_pci_read_register(host->pcr, SD_DATA_STATE, &val); in sd_wait_data_idle()
702 struct rtsx_pcr *pcr = host->pcr; in sd_tuning_rx_cmd() local
706 rtsx_pci_write_register(pcr, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, in sd_tuning_rx_cmd()
715 rtsx_pci_write_register(pcr, SD_CFG3, in sd_tuning_rx_cmd()
720 rtsx_pci_write_register(pcr, SD_CFG3, SD_RSP_80CLK_TIMEOUT_EN, 0); in sd_tuning_rx_cmd()
797 struct rtsx_pcr *pcr = host->pcr; in sd_request() local
812 err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD); in sd_request()
818 mutex_lock(&pcr->pcr_mutex); in sd_request()
820 rtsx_pci_start_run(pcr); in sd_request()
822 rtsx_pci_switch_clock(pcr, host->clock, host->ssc_depth, in sd_request()
824 rtsx_pci_write_register(pcr, CARD_SELECT, 0x07, SD_MOD_SEL); in sd_request()
825 rtsx_pci_write_register(pcr, CARD_SHARE_MODE, in sd_request()
855 mutex_unlock(&pcr->pcr_mutex); in sd_request()
896 err = rtsx_pci_write_register(host->pcr, SD_CFG1, in sd_set_bus_width()
904 struct rtsx_pcr *pcr = host->pcr; in sd_power_on() local
911 rtsx_pci_write_register(pcr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, 0); in sd_power_on()
917 rtsx_pci_init_cmd(pcr); in sd_power_on()
918 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL); in sd_power_on()
919 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_SHARE_MODE, in sd_power_on()
921 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, in sd_power_on()
923 err = rtsx_pci_send_cmd(pcr, 100); in sd_power_on()
927 err = rtsx_pci_card_pull_ctl_enable(pcr, RTSX_SD_CARD); in sd_power_on()
931 err = rtsx_pci_card_power_on(pcr, RTSX_SD_CARD); in sd_power_on()
937 err = rtsx_pci_write_register(pcr, CARD_OE, SD_OUTPUT_EN, SD_OUTPUT_EN); in sd_power_on()
942 rtsx_pci_write_register(pcr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, SD_CLK_TOGGLE_EN); in sd_power_on()
951 struct rtsx_pcr *pcr = host->pcr; in sd_power_off() local
956 rtsx_pci_init_cmd(pcr); in sd_power_off()
958 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0); in sd_power_off()
959 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0); in sd_power_off()
961 err = rtsx_pci_send_cmd(pcr, 100); in sd_power_off()
965 err = rtsx_pci_card_power_off(pcr, RTSX_SD_CARD); in sd_power_off()
969 return rtsx_pci_card_pull_ctl_disable(pcr, RTSX_SD_CARD); in sd_power_off()
987 struct rtsx_pcr *pcr = host->pcr; in sd_set_timing() local
990 rtsx_pci_init_cmd(pcr); in sd_set_timing()
995 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
998 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1000 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1002 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1007 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
1010 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1012 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1014 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1015 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, in sd_set_timing()
1017 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1024 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_CFG1, in sd_set_timing()
1026 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1028 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1030 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1031 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_PUSH_POINT_CTL, in sd_set_timing()
1033 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1038 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_set_timing()
1040 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, in sd_set_timing()
1042 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF, in sd_set_timing()
1044 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CLK_CTL, CLK_LOW_FREQ, 0); in sd_set_timing()
1045 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, in sd_set_timing()
1047 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL, in sd_set_timing()
1052 err = rtsx_pci_send_cmd(pcr, 100); in sd_set_timing()
1060 struct rtsx_pcr *pcr = host->pcr; in sdmmc_set_ios() local
1065 if (rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD)) in sdmmc_set_ios()
1068 mutex_lock(&pcr->pcr_mutex); in sdmmc_set_ios()
1070 rtsx_pci_start_run(pcr); in sdmmc_set_ios()
1099 rtsx_pci_switch_clock(pcr, ios->clock, host->ssc_depth, in sdmmc_set_ios()
1102 mutex_unlock(&pcr->pcr_mutex); in sdmmc_set_ios()
1108 struct rtsx_pcr *pcr = host->pcr; in sdmmc_get_ro() local
1115 mutex_lock(&pcr->pcr_mutex); in sdmmc_get_ro()
1117 rtsx_pci_start_run(pcr); in sdmmc_get_ro()
1120 val = rtsx_pci_readl(pcr, RTSX_BIPR); in sdmmc_get_ro()
1125 mutex_unlock(&pcr->pcr_mutex); in sdmmc_get_ro()
1133 struct rtsx_pcr *pcr = host->pcr; in sdmmc_get_cd() local
1140 mutex_lock(&pcr->pcr_mutex); in sdmmc_get_cd()
1142 rtsx_pci_start_run(pcr); in sdmmc_get_cd()
1145 val = rtsx_pci_card_exist(pcr); in sdmmc_get_cd()
1150 mutex_unlock(&pcr->pcr_mutex); in sdmmc_get_cd()
1157 struct rtsx_pcr *pcr = host->pcr; in sd_wait_voltage_stable_1() local
1171 err = rtsx_pci_read_register(pcr, SD_BUS_STAT, &stat); in sd_wait_voltage_stable_1()
1180 err = rtsx_pci_write_register(pcr, SD_BUS_STAT, in sd_wait_voltage_stable_1()
1190 struct rtsx_pcr *pcr = host->pcr; in sd_wait_voltage_stable_2() local
1198 err = rtsx_pci_write_register(pcr, SD_BUS_STAT, 0xFF, SD_CLK_TOGGLE_EN); in sd_wait_voltage_stable_2()
1208 err = rtsx_pci_read_register(pcr, SD_BUS_STAT, &stat); in sd_wait_voltage_stable_2()
1219 rtsx_pci_write_register(pcr, SD_BUS_STAT, in sd_wait_voltage_stable_2()
1221 rtsx_pci_write_register(pcr, CARD_CLK_EN, 0xFF, 0); in sd_wait_voltage_stable_2()
1231 struct rtsx_pcr *pcr = host->pcr; in sdmmc_switch_voltage() local
1241 err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD); in sdmmc_switch_voltage()
1245 mutex_lock(&pcr->pcr_mutex); in sdmmc_switch_voltage()
1247 rtsx_pci_start_run(pcr); in sdmmc_switch_voltage()
1260 err = rtsx_pci_switch_output_voltage(pcr, voltage); in sdmmc_switch_voltage()
1272 err = rtsx_pci_write_register(pcr, SD_BUS_STAT, in sdmmc_switch_voltage()
1275 mutex_unlock(&pcr->pcr_mutex); in sdmmc_switch_voltage()
1283 struct rtsx_pcr *pcr = host->pcr; in sdmmc_execute_tuning() local
1289 err = rtsx_pci_card_exclusive_check(host->pcr, RTSX_SD_CARD); in sdmmc_execute_tuning()
1293 mutex_lock(&pcr->pcr_mutex); in sdmmc_execute_tuning()
1295 rtsx_pci_start_run(pcr); in sdmmc_execute_tuning()
1300 err = sd_change_phase(host, SDR104_TX_PHASE(pcr), false); in sdmmc_execute_tuning()
1304 err = sd_change_phase(host, SDR50_TX_PHASE(pcr), false); in sdmmc_execute_tuning()
1308 err = sd_change_phase(host, DDR50_TX_PHASE(pcr), false); in sdmmc_execute_tuning()
1323 err = sd_change_phase(host, DDR50_RX_PHASE(pcr), true); in sdmmc_execute_tuning()
1326 mutex_unlock(&pcr->pcr_mutex); in sdmmc_execute_tuning()
1345 struct rtsx_pcr *pcr = host->pcr; in init_extra_caps() local
1347 dev_dbg(sdmmc_dev(host), "pcr->extra_caps = 0x%x\n", pcr->extra_caps); in init_extra_caps()
1349 if (pcr->extra_caps & EXTRA_CAPS_SD_SDR50) in init_extra_caps()
1351 if (pcr->extra_caps & EXTRA_CAPS_SD_SDR104) in init_extra_caps()
1353 if (pcr->extra_caps & EXTRA_CAPS_SD_DDR50) in init_extra_caps()
1355 if (pcr->extra_caps & EXTRA_CAPS_MMC_HSDDR) in init_extra_caps()
1357 if (pcr->extra_caps & EXTRA_CAPS_MMC_8BIT) in init_extra_caps()
1359 if (pcr->extra_caps & EXTRA_CAPS_NO_MMC) in init_extra_caps()
1399 struct rtsx_pcr *pcr; in rtsx_pci_sdmmc_drv_probe() local
1405 pcr = handle->pcr; in rtsx_pci_sdmmc_drv_probe()
1406 if (!pcr) in rtsx_pci_sdmmc_drv_probe()
1416 host->pcr = pcr; in rtsx_pci_sdmmc_drv_probe()
1424 pcr->slots[RTSX_SD_CARD].p_dev = pdev; in rtsx_pci_sdmmc_drv_probe()
1425 pcr->slots[RTSX_SD_CARD].card_event = rtsx_pci_sdmmc_card_event; in rtsx_pci_sdmmc_drv_probe()
1439 struct rtsx_pcr *pcr; in rtsx_pci_sdmmc_drv_remove() local
1445 pcr = host->pcr; in rtsx_pci_sdmmc_drv_remove()
1446 pcr->slots[RTSX_SD_CARD].p_dev = NULL; in rtsx_pci_sdmmc_drv_remove()
1447 pcr->slots[RTSX_SD_CARD].card_event = NULL; in rtsx_pci_sdmmc_drv_remove()
1458 rtsx_pci_complete_unfinished_transfer(pcr); in rtsx_pci_sdmmc_drv_remove()