1 // SPDX-License-Identifier: GPL-2.0
3  * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5  * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
106 	[MMC_TIMING_LEGACY]	= {"ti,otap-del-sel-legacy",
107 				   "ti,itap-del-sel-legacy",
109 	[MMC_TIMING_MMC_HS]	= {"ti,otap-del-sel-mmc-hs",
110 				   "ti,itap-del-sel-mmc-hs",
112 	[MMC_TIMING_SD_HS]	= {"ti,otap-del-sel-sd-hs",
113 				   "ti,itap-del-sel-sd-hs",
115 	[MMC_TIMING_UHS_SDR12]	= {"ti,otap-del-sel-sdr12",
116 				   "ti,itap-del-sel-sdr12",
118 	[MMC_TIMING_UHS_SDR25]	= {"ti,otap-del-sel-sdr25",
119 				   "ti,itap-del-sel-sdr25",
121 	[MMC_TIMING_UHS_SDR50]	= {"ti,otap-del-sel-sdr50",
124 	[MMC_TIMING_UHS_SDR104]	= {"ti,otap-del-sel-sdr104",
127 	[MMC_TIMING_UHS_DDR50]	= {"ti,otap-del-sel-ddr50",
130 	[MMC_TIMING_MMC_DDR52]	= {"ti,otap-del-sel-ddr52",
131 				   "ti,itap-del-sel-ddr52",
133 	[MMC_TIMING_MMC_HS200]	= {"ti,otap-del-sel-hs200",
136 	[MMC_TIMING_MMC_HS400]	= {"ti,otap-del-sel-hs400",
175 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5,  in sdhci_am654_setup_dll()
178 	if (sdhci_am654->flags & FREQSEL_2_BIT) {  in sdhci_am654_setup_dll()
196 		regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);  in sdhci_am654_setup_dll()
207 		regmap_update_bits(sdhci_am654->base, PHY_CTRL5, FREQSEL_MASK,  in sdhci_am654_setup_dll()
212 	val = sdhci_am654->trm_icp << DLL_TRIM_ICP_SHIFT;  in sdhci_am654_setup_dll()
216 	val |= sdhci_am654->drv_strength << DR_TY_SHIFT;  in sdhci_am654_setup_dll()
217 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val);  in sdhci_am654_setup_dll()
220 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK,  in sdhci_am654_setup_dll()
226 	ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1, val,  in sdhci_am654_setup_dll()
229 		dev_err(mmc_dev(host->mmc), "DLL failed to relock\n");  in sdhci_am654_setup_dll()
238 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK,  in sdhci_am654_write_itapdly()
240 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYSEL_MASK,  in sdhci_am654_write_itapdly()
242 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0);  in sdhci_am654_write_itapdly()
250 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);  in sdhci_am654_setup_delay_chain()
254 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val);  in sdhci_am654_setup_delay_chain()
257 				  sdhci_am654->itap_del_sel[timing]);  in sdhci_am654_setup_delay_chain()
264 	unsigned char timing = host->mmc->ios.timing;  in sdhci_am654_set_clock()
269 	regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0);  in sdhci_am654_set_clock()
274 	if (sdhci_am654->legacy_otapdly)  in sdhci_am654_set_clock()
275 		otap_del_sel = sdhci_am654->otap_del_sel[0];  in sdhci_am654_set_clock()
277 		otap_del_sel = sdhci_am654->otap_del_sel[timing];  in sdhci_am654_set_clock()
287 		if (sdhci_am654->flags & STRBSEL_4_BIT)  in sdhci_am654_set_clock()
292 		val |= sdhci_am654->strb_sel << STRBSEL_SHIFT;  in sdhci_am654_set_clock()
295 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);  in sdhci_am654_set_clock()
302 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK,  in sdhci_am654_set_clock()
303 			   sdhci_am654->clkbuf_sel);  in sdhci_am654_set_clock()
311 	unsigned char timing = host->mmc->ios.timing;  in sdhci_j721e_4bit_set_clock()
316 	if (sdhci_am654->legacy_otapdly)  in sdhci_j721e_4bit_set_clock()
317 		otap_del_sel = sdhci_am654->otap_del_sel[0];  in sdhci_j721e_4bit_set_clock()
319 		otap_del_sel = sdhci_am654->otap_del_sel[timing];  in sdhci_j721e_4bit_set_clock()
324 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val);  in sdhci_j721e_4bit_set_clock()
326 	regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK,  in sdhci_j721e_4bit_set_clock()
327 			   sdhci_am654->clkbuf_sel);  in sdhci_j721e_4bit_set_clock()
334 	writeb(val, host->ioaddr + reg);  in sdhci_am654_write_power_on()
336 	return readb(host->ioaddr + reg);  in sdhci_am654_write_power_on()
342 	unsigned char timing = host->mmc->ios.timing;  in sdhci_am654_write_b()
349 		 * According to the data manual, HISPD bit  in sdhci_am654_write_b()
358 	writeb(val, host->ioaddr + reg);  in sdhci_am654_write_b()
370 			dev_info(mmc_dev(host->mmc), "Power on failed\n");  in sdhci_am654_write_b()
382 	if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) {  in sdhci_am654_reset()
413 	cqhci_irq(host->mmc, intmask, cmd_error, data_error);  in sdhci_am654_cqhci_irq()
428 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK,  in sdhci_am654_platform_execute_tuning()
434 		cur_val = !mmc_send_tuning(host->mmc, opcode, NULL);  in sdhci_am654_platform_execute_tuning()
449 	pass_len = ITAP_MAX - fail_len;  in sdhci_am654_platform_execute_tuning()
558 	cq_host = devm_kzalloc(host->mmc->parent, sizeof(struct cqhci_host),  in sdhci_am654_cqe_add_host()
561 		return -ENOMEM;  in sdhci_am654_cqe_add_host()
563 	cq_host->mmio = host->ioaddr + SDHCI_AM654_CQE_BASE_ADDR;  in sdhci_am654_cqe_add_host()
564 	cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ;  in sdhci_am654_cqe_add_host()
565 	cq_host->caps |= CQHCI_TASK_DESC_SZ_128;  in sdhci_am654_cqe_add_host()
566 	cq_host->ops = &sdhci_am654_cqhci_ops;  in sdhci_am654_cqe_add_host()
568 	host->mmc->caps2 |= MMC_CAP2_CQE;  in sdhci_am654_cqe_add_host()
570 	ret = cqhci_init(cq_host, host->mmc, 1);  in sdhci_am654_cqe_add_host()
578 	struct device *dev = mmc_dev(host->mmc);  in sdhci_am654_get_otap_delay()
583 				 &sdhci_am654->otap_del_sel[MMC_TIMING_LEGACY]);  in sdhci_am654_get_otap_delay()
586 		 * ti,otap-del-sel-legacy is mandatory, look for old binding  in sdhci_am654_get_otap_delay()
589 		ret = device_property_read_u32(dev, "ti,otap-del-sel",  in sdhci_am654_get_otap_delay()
590 					       &sdhci_am654->otap_del_sel[0]);  in sdhci_am654_get_otap_delay()
592 			dev_err(dev, "Couldn't find otap-del-sel\n");  in sdhci_am654_get_otap_delay()
597 		dev_info(dev, "Using legacy binding ti,otap-del-sel\n");  in sdhci_am654_get_otap_delay()
598 		sdhci_am654->legacy_otapdly = true;  in sdhci_am654_get_otap_delay()
606 					       &sdhci_am654->otap_del_sel[i]);  in sdhci_am654_get_otap_delay()
612 			 * if an otap-del-sel value is not found  in sdhci_am654_get_otap_delay()
615 				host->mmc->caps &= ~td[i].capability;  in sdhci_am654_get_otap_delay()
617 				host->mmc->caps2 &= ~td[i].capability;  in sdhci_am654_get_otap_delay()
622 						 &sdhci_am654->itap_del_sel[i]);  in sdhci_am654_get_otap_delay()
639 	regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, 0x0);  in sdhci_am654_init()
641 	if (sdhci_am654->flags & DLL_CALIB) {  in sdhci_am654_init()
642 		regmap_read(sdhci_am654->base, PHY_STAT1, &val);  in sdhci_am654_init()
645 			regmap_update_bits(sdhci_am654->base, PHY_CTRL1,  in sdhci_am654_init()
647 			ret = regmap_read_poll_timeout(sdhci_am654->base,  in sdhci_am654_init()
657 	if (sdhci_am654->flags & IOMUX_PRESENT)  in sdhci_am654_init()
658 		regmap_update_bits(sdhci_am654->base, PHY_CTRL1,  in sdhci_am654_init()
662 	if (host->mmc->caps & MMC_CAP_NONREMOVABLE)  in sdhci_am654_init()
665 	regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,  in sdhci_am654_init()
669 	regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK,  in sdhci_am654_init()
698 	struct device *dev = &pdev->dev;  in sdhci_am654_get_of_property()
702 	if (sdhci_am654->flags & DLL_PRESENT) {  in sdhci_am654_get_of_property()
703 		ret = device_property_read_u32(dev, "ti,trm-icp",  in sdhci_am654_get_of_property()
704 					       &sdhci_am654->trm_icp);  in sdhci_am654_get_of_property()
708 		ret = device_property_read_u32(dev, "ti,driver-strength-ohm",  in sdhci_am654_get_of_property()
715 			sdhci_am654->drv_strength = DRIVER_STRENGTH_50_OHM;  in sdhci_am654_get_of_property()
718 			sdhci_am654->drv_strength = DRIVER_STRENGTH_33_OHM;  in sdhci_am654_get_of_property()
721 			sdhci_am654->drv_strength = DRIVER_STRENGTH_66_OHM;  in sdhci_am654_get_of_property()
724 			sdhci_am654->drv_strength = DRIVER_STRENGTH_100_OHM;  in sdhci_am654_get_of_property()
727 			sdhci_am654->drv_strength = DRIVER_STRENGTH_40_OHM;  in sdhci_am654_get_of_property()
731 			return -EINVAL;  in sdhci_am654_get_of_property()
735 	device_property_read_u32(dev, "ti,strobe-sel", &sdhci_am654->strb_sel);  in sdhci_am654_get_of_property()
736 	device_property_read_u32(dev, "ti,clkbuf-sel",  in sdhci_am654_get_of_property()
737 				 &sdhci_am654->clkbuf_sel);  in sdhci_am654_get_of_property()
739 	if (device_property_read_bool(dev, "ti,fails-without-test-cd"))  in sdhci_am654_get_of_property()
740 		sdhci_am654->quirks |= SDHCI_AM654_QUIRK_FORCE_CDTEST;  in sdhci_am654_get_of_property()
749 		.compatible = "ti,am654-sdhci-5.1",
753 		.compatible = "ti,j721e-sdhci-8bit",
757 		.compatible = "ti,j721e-sdhci-4bit",
773 	struct device *dev = &pdev->dev;  in sdhci_am654_probe()
777 	match = of_match_node(sdhci_am654_of_match, pdev->dev.of_node);  in sdhci_am654_probe()
778 	drvdata = match->data;  in sdhci_am654_probe()
782 	if (soc && soc->data)  in sdhci_am654_probe()
783 		drvdata = soc->data;  in sdhci_am654_probe()
785 	host = sdhci_pltfm_init(pdev, drvdata->pdata, sizeof(*sdhci_am654));  in sdhci_am654_probe()
791 	sdhci_am654->flags = drvdata->flags;  in sdhci_am654_probe()
800 	pltfm_host->clk = clk_xin;  in sdhci_am654_probe()
816 	sdhci_am654->base = devm_regmap_init_mmio(dev, base,  in sdhci_am654_probe()
818 	if (IS_ERR(sdhci_am654->base)) {  in sdhci_am654_probe()
820 		ret = PTR_ERR(sdhci_am654->base);  in sdhci_am654_probe()
828 	ret = mmc_of_parse(host->mmc);  in sdhci_am654_probe()
834 	host->mmc_host_ops.execute_tuning = sdhci_am654_execute_tuning;  in sdhci_am654_probe()
857 	ret = pm_runtime_put_sync(&pdev->dev);  in sdhci_am654_remove()
861 	pm_runtime_disable(&pdev->dev);  in sdhci_am654_remove()
869 		.name = "sdhci-am654",