Lines Matching +full:sgmii +full:- +full:enable +full:- +full:pll
1 /* SPDX-License-Identifier: GPL-2.0-only */
227 /* Register for port port-and-protocol based vlan 1 control */
310 /* MT7531 SGMII register group */
313 ((p) - 5) * 0x1000 + (r))
321 /* Register for SGMII PCS_SPPED_ABILITY */
346 /* Values of SGMII SPEED */
479 /* Registers for RGMII and SGMII PLL clock */
540 /* Registers for core PLL access through mmd indirect */
617 /* struct mt7530_port - This is the main data structure for holding the state
619 * @enable: The status used for show port is enabled or not.
624 * VLAN-tagged frames.
627 bool enable; member
659 /* struct mt753x_info - This is the main data structure for holding the specific
702 /* struct mt7530_priv - This is the main data structure for holding the state
706 * @bus: The bus used for the device and built-in PHY
750 e->port = port; in mt7530_hw_vlan_entry_init()
751 e->untagged = untagged; in mt7530_hw_vlan_entry_init()
771 p->priv = priv; in INIT_MT7530_DUMMY_POLL()
772 p->reg = reg; in INIT_MT7530_DUMMY_POLL()