Lines Matching +full:signal +full:- +full:group
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
13 * basis where a given pin can provide a number of different signal types.
15 * The signal active on a pin is described by both a priority level and
19 * change from a high to low priority signal), or even in the same register.
22 * read-only).
24 * SoC Multi-function Pin Expression Examples
25 * ------------------------------------------
29 * corner. The signal priorities are in decending order from P0 (highest).
31 * D6 is a pin with a single function (beside GPIO); a high priority signal
34 * Ball | Default | P0 Signal | P0 Expression | P1 Signal | P1 Expression | Other
35 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
37 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
39 * C5 is a multi-signal pin (high and low priority signals). Here we touch
40 * different registers for the different functions that enable each signal:
42 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
44 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
46 * E19 is a single-signal pin with two functions that influence the active
47 * signal. In this case both bits have the same meaning - enable a dedicated
49 * OR-relationship have the same meaning.
51 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
53 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
55 * For example, pin B19 has a low-priority signal that's enabled by two
61 …* Ball | Default | P0 Signal | P0 Expression | P1 Signal | P1 Expression…
62 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
64 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
67 * pin's active signal:
73 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
75 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
80 * Pin T5 is a multi-signal pin with a more complex configuration:
82 * Ball | Default | P0 Signal | P0 Expression | P1 Signal | P1 Expression | Other
83 * -----+---------+-----------+------------------------------+-----------+---------------+----------
85 * -----+---------+-----------+------------------------------+-----------+---------------+----------
87 * The high priority signal configuration is best thought of in terms of its
95 * Re-writing:
97 * -----+---------+-----------+------------------------------+-----------+---------------+----------
101 * -----+---------+-----------+------------------------------+-----------+---------------+----------
104 * function pin", where the signal itself is determined by whether SCU94[5:4]
107 * Other video-input-related pins require an explicit state in SCU90[5:4], e.g.
110 * -----+---------+-----------+------------------------------+-----------+---------------+----------
113 * -----+---------+-----------+------------------------------+-----------+---------------+----------
116 * that despite operating as part of the video input bus each signal needs to
120 * signals are required. However, this isn't done consistently - UART1 is
121 * enabled on a per-pin basis, and by contrast, all signals for UART6 are
128 * signal's expressions with the function they participate in, rather than
134 * Ball | Default | P0 Signal | P0 Expression | P1 Signal | P1 Expression | Other
135 …* -----+------------+-----------+---------------------------+-----------+---------------+---------…
138 …* -----+------------+-----------+---------------------------+-----------+---------------+---------…
140 * A12 demonstrates that the "Other" signal isn't always GPIO - in this case
141 * GPIOT0 is a high-priority signal and RGMII1TXCK is Other. Thus, GPIO
142 * should be treated like any other signal type with full function expression
144 * GPIOT1's signal descriptor bits are distinct, therefore we must iterate all
145 * pins in the function's group to disable the higher-priority signals such
146 * that the signal for the function of interest is correctly enabled.
158 * * Pins provide up to five signal types in a priority order
160 * * For priorities levels defined on a pin, each priority provides one signal
171 * * A function is described by an expression of one or more signal
174 * * A signal expression is the smallest set of signal descriptors whose
175 * comparisons must evaluate 'true' for a signal to be enabled on a pin.
177 * * A signal participating in a function is active on a pin if evaluating all
178 * signal descriptors in the pin's signal expression for the function yields
181 * * A signal at a given priority on a given pin is active if any of the
182 * functions in which the signal participates are active, and no higher
183 * priority signal on the pin is active
185 * * GPIO is configured per-pin
189 * * To disable a signal, any function(s) activating the signal must be
192 * * Each pin must know the signal expressions of functions in which it
201 * * The VPIDE signal participates in 3 functions: VPI18, VPI24 and VPI30
203 * * The NDCD1 signal participates in just its own NDCD1 function
208 * * The prerequisit for activating the NDCD1 signal is that the VPI18, VPI24
215 * --------------
222 * Conversely, failing to allocate all pins in a group indicates some bits (as
223 * well as pins) required for the group's configuration will already be in use,
225 * group.
228 * --------------
239 * 1. Use a data-driven solution rather than embedding state into code
244 * properties associated with a given mux configuration: The pin, the signal,
245 * the group and the function. In this way copy/paste errors cause duplicate
249 * no override errors in the pin, group and function arrays.
255 * Here's a complete, concrete "pre-processed" example of the table structures
270 * .signal = "MAC1LINK",
284 * .signal = "GPIOA0",
365 * .signal = "EXTRST",
373 * For ball E19, we have multiple functions enabling a single signal, LPCRST#.
387 * .signal = "LPCRST",
404 * .signal = "LPCRST",
429 * A signal descriptor, which describes the register, bits and the
451 * Describes a signal expression. The expression is evaluated by ANDing the
454 * @signal: The signal name for the priority level on the pin. If the signal
455 * type is GPIO, then the signal name must begin with the
457 * @function: The name of the function the signal participates in for the
458 * associated expression. For pin-specific GPIO, the function
459 * name must match the signal name.
460 * @ndescs: The number of signal descriptors in the expression
461 * @descs: Pointer to an array of signal descriptors that comprise the
465 const char *signal; member
473 * for a given pin. The signal configuration for a priority level is evaluated
474 * by ORing the evaluation of the signal expressions in the respective
492 * Short-hand macro for describing an SCU descriptor enabled by the state of
495 * @reg: The signal's associated register, offset from base
496 * @idx: The signal's bit index in the register
505 * A further short-hand macro expanding to an SCU descriptor enabled by a set
514 #define SIG_DESC_LIST_SYM(sig, group) sig_descs_ ## sig ## _ ## group argument
515 #define SIG_DESC_LIST_DECL(sig, group, ...) \ argument
516 static const struct aspeed_sig_desc SIG_DESC_LIST_SYM(sig, group)[] = \
519 #define SIG_EXPR_SYM(sig, group) sig_expr_ ## sig ## _ ## group argument
520 #define SIG_EXPR_DECL_(sig, group, func) \ argument
521 static const struct aspeed_sig_expr SIG_EXPR_SYM(sig, group) = \
523 .signal = #sig, \
525 .ndescs = ARRAY_SIZE(SIG_DESC_LIST_SYM(sig, group)), \
526 .descs = &(SIG_DESC_LIST_SYM(sig, group))[0], \
530 * Declare a signal expression.
532 * @sig: A macro symbol name for the signal (is subjected to stringification
534 * @func: The function in which the signal is participating
535 * @...: Signal descriptors that define the signal expression
537 * For example, the following declares the ROMD8 signal for the ROM16 function:
541 * And with multiple signal descriptors:
546 #define SIG_EXPR_DECL(sig, group, func, ...) \ argument
547 SIG_DESC_LIST_DECL(sig, group, __VA_ARGS__); \
548 SIG_EXPR_DECL_(sig, group, func)
551 * Declare a pointer to a signal expression
553 * @sig: The macro symbol name for the signal (subjected to token pasting)
556 #define SIG_EXPR_PTR(sig, group) (&SIG_EXPR_SYM(sig, group)) argument
558 #define SIG_EXPR_LIST_SYM(sig, group) sig_exprs_ ## sig ## _ ## group argument
561 * Declare a signal expression list for reference in a struct aspeed_pin_prio.
563 * @sig: A macro symbol name for the signal (is subjected to token pasting)
564 * @...: Signal expression structure pointers (use SIG_EXPR_PTR())
566 * For example, the 16-bit ROM bus can be enabled by one of two possible signal
575 #define SIG_EXPR_LIST_DECL(sig, group, ...) \ argument
576 static const struct aspeed_sig_expr *SIG_EXPR_LIST_SYM(sig, group)[] =\
583 * Create an expression symbol alias from (signal, group) to (pin, signal).
586 * @sig: The signal name
587 * @group: The name of the group of which the pin is a member that is
588 * associated with the function's signal
591 * the signal for a group multiple times) whilst enabling multiple pin groups
592 * to exist for a signal without intrusive side-effects on defining the list of
595 #define SIG_EXPR_LIST_ALIAS(pin, sig, group) \ argument
597 SIG_EXPR_LIST_SYM(pin, sig)[ARRAY_SIZE(SIG_EXPR_LIST_SYM(sig, group))] \
598 __attribute__((alias(istringify(SIG_EXPR_LIST_SYM(sig, group)))))
601 * A short-hand macro for declaring a function expression and an expression
602 * list with a single expression (SE) and a single group (SG) of pins.
604 * @pin: The pin the signal will be routed to
605 * @sig: The signal that will be routed to the pin for the function
609 * For example, signal NCTS6 participates in its own function with one group:
623 * @pin: The pin the signal will be routed to
624 * @sig: The signal that will be routed to the pin for the function
625 * @group: The name of the function's pin group in which the pin participates
629 #define SIG_EXPR_LIST_DECL_SEMG(pin, sig, group, func, ...) \ argument
630 SIG_DESC_LIST_DECL(sig, group, __VA_ARGS__); \
631 SIG_EXPR_DECL_(sig, group, func); \
632 SIG_EXPR_LIST_DECL(sig, group, SIG_EXPR_PTR(sig, group)); \
633 SIG_EXPR_LIST_ALIAS(pin, sig, group)
637 * and a single group (SG) of pins.
639 * @pin: The pin the signal will be routed to
640 * @sig: The signal that will be routed to the pin for the function
641 * @group: The name of the function's pin group in which the pin participates
651 #define SIG_EXPR_LIST_PTR(sig, group) SIG_EXPR_LIST_SYM(sig, group) argument
664 * Declare a single signal pin
668 * @sig: Macro name for the signal (subjected to stringification)
682 * Single signal, single function pin declaration
686 * @sig: Macro name for the signal (subjected to stringification)
687 * @...: Signal descriptors that define the function expression
700 * Declare a two-signal pin
704 * @high: Macro name for the highest priority signal functions
705 * @low: Macro name for the low signal functions
733 #define GROUP_SYM(group) group_pins_ ## group argument
734 #define GROUP_DECL(group, ...) \ argument
735 static const int GROUP_SYM(group)[] = { __VA_ARGS__ }
741 #define FUNC_DECL_1(func, group) FUNC_DECL_(func, #group) argument
810 return ctx->ops->set(ctx, expr, enabled); in aspeed_sig_expr_set()