Lines Matching +full:per +full:- +full:port +full:- +full:set
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2012 ST-Ericsson AB
6 * COH 901 571/3 - Used in DB3210 (U365 2.0) and DB3350 (U335 1.0)
21 #include <linux/pinctrl/pinconf-generic.h>
22 #include "pinctrl-coh901.h"
27 * bit 15-9 (mask 0x0000FE00) contains the number of cores. 8*cores
29 * bit 8-2 (mask 0x000001FC) contains the core version ID.
56 /* 8 bits per port, no version has more than 7 ports */
80 u32 per; member
89 * its context. It calculates the port offset from the given pin
90 * offset, muliplies by the port stride and adds the register offset
94 (gpio->base + (pin >> 3) * gpio->stride + gpio->reg)
97 * Provides a bitmask for a specific gpio pin inside an 8-bit GPIO
132 /* Port 0, pins 0-7 */
143 /* Port 1, pins 0-7 */
154 /* Port 2, pins 0-7 */
165 /* Port 3, pins 0-7 */
176 /* Port 4, pins 0-7 */
187 /* Port 5, pins 0-7 */
198 /* Port 6, pind 0-7 */
243 /* Mask out this pin, note 2 bits per setting */ in u300_gpio_direction_input()
261 * Drive mode must be set by the special mode set function, set in u300_gpio_direction_output()
266 /* mode = 0 means input, else some mode is already set */ in u300_gpio_direction_output()
279 /* Returning -EINVAL means "supported but not available" */
289 /* One bit per pin, clamp to bool range */ in u300_gpio_config_get()
290 biasmode = !!(readl(U300_PIN_REG(offset, per)) & U300_PIN_BIT(offset)); in u300_gpio_config_get()
303 return -EINVAL; in u300_gpio_config_get()
310 return -EINVAL; in u300_gpio_config_get()
317 return -EINVAL; in u300_gpio_config_get()
324 return -EINVAL; in u300_gpio_config_get()
331 return -EINVAL; in u300_gpio_config_get()
336 return -ENOTSUPP; in u300_gpio_config_get()
350 val = readl(U300_PIN_REG(offset, per)); in u300_gpio_config_set()
351 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); in u300_gpio_config_set()
354 val = readl(U300_PIN_REG(offset, per)); in u300_gpio_config_set()
355 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); in u300_gpio_config_set()
383 dev_err(gpio->dev, "illegal configuration requested\n"); in u300_gpio_config_set()
384 return -EINVAL; in u300_gpio_config_set()
391 .label = "u300-gpio-chip",
396 .set = u300_gpio_set,
406 /* Set mode depending on state */ in u300_toggle_trigger()
407 if (u300_gpio_get(&gpio->chip, offset)) { in u300_toggle_trigger()
410 dev_dbg(gpio->dev, "next IRQ on falling edge on pin %d\n", in u300_toggle_trigger()
415 dev_dbg(gpio->dev, "next IRQ on rising edge on pin %d\n", in u300_toggle_trigger()
424 struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; in u300_gpio_irq_type() local
425 int offset = d->hwirq; in u300_gpio_irq_type()
435 dev_dbg(gpio->dev, in u300_gpio_irq_type()
438 port->toggle_edge_mode |= U300_PIN_BIT(offset); in u300_gpio_irq_type()
441 dev_dbg(gpio->dev, "trigger on rising edge on pin %d\n", in u300_gpio_irq_type()
445 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); in u300_gpio_irq_type()
447 dev_dbg(gpio->dev, "trigger on falling edge on pin %d\n", in u300_gpio_irq_type()
451 port->toggle_edge_mode &= ~U300_PIN_BIT(offset); in u300_gpio_irq_type()
461 struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; in u300_gpio_irq_enable() local
462 int offset = d->hwirq; in u300_gpio_irq_enable()
466 dev_dbg(gpio->dev, "enable IRQ for hwirq %lu on port %s, offset %d\n", in u300_gpio_irq_enable()
467 d->hwirq, port->name, offset); in u300_gpio_irq_enable()
478 int offset = d->hwirq; in u300_gpio_irq_disable()
489 .name = "u300-gpio-irqchip",
501 struct u300_gpio_port *port = &gpio->ports[irq - chip->base]; in u300_gpio_irq_handler() local
502 int pinoffset = port->number << 3; /* get the right stride */ in u300_gpio_irq_handler()
510 val &= 0xFFU; /* 8 bits per port */ in u300_gpio_irq_handler()
520 int pin_irq = irq_find_mapping(chip->irq.domain, offset); in u300_gpio_irq_handler()
522 dev_dbg(gpio->dev, "GPIO IRQ %d on pin %d\n", in u300_gpio_irq_handler()
529 if (port->toggle_edge_mode & U300_PIN_BIT(offset)) in u300_gpio_irq_handler()
541 /* Set mode: input or output */ in u300_gpio_init_pin()
542 if (conf->output) { in u300_gpio_init_pin()
543 u300_gpio_direction_output(&gpio->chip, offset, conf->outval); in u300_gpio_init_pin()
546 u300_gpio_config_set(&gpio->chip, offset, in u300_gpio_init_pin()
549 /* Set drive mode for output */ in u300_gpio_init_pin()
550 u300_gpio_config_set(&gpio->chip, offset, in u300_gpio_init_pin()
553 dev_dbg(gpio->dev, "set up pin %d as output, value: %d\n", in u300_gpio_init_pin()
554 offset, conf->outval); in u300_gpio_init_pin()
556 u300_gpio_direction_input(&gpio->chip, offset); in u300_gpio_init_pin()
558 /* Always set output low on input pins */ in u300_gpio_init_pin()
559 u300_gpio_set(&gpio->chip, offset, 0); in u300_gpio_init_pin()
561 /* Set bias mode for input */ in u300_gpio_init_pin()
562 u300_gpio_config_set(&gpio->chip, offset, conf->bias_mode); in u300_gpio_init_pin()
564 dev_dbg(gpio->dev, "set up pin %d as input, bias: %04x\n", in u300_gpio_init_pin()
565 offset, conf->bias_mode); in u300_gpio_init_pin()
588 * pinctrl-u300.
625 gpio = devm_kzalloc(&pdev->dev, sizeof(struct u300_gpio), GFP_KERNEL); in u300_gpio_probe()
627 return -ENOMEM; in u300_gpio_probe()
629 gpio->chip = u300_gpio_chip; in u300_gpio_probe()
630 gpio->chip.ngpio = U300_GPIO_NUM_PORTS * U300_GPIO_PINS_PER_PORT; in u300_gpio_probe()
631 gpio->chip.parent = &pdev->dev; in u300_gpio_probe()
632 gpio->chip.base = 0; in u300_gpio_probe()
633 gpio->dev = &pdev->dev; in u300_gpio_probe()
635 gpio->base = devm_platform_ioremap_resource(pdev, 0); in u300_gpio_probe()
636 if (IS_ERR(gpio->base)) in u300_gpio_probe()
637 return PTR_ERR(gpio->base); in u300_gpio_probe()
639 gpio->clk = devm_clk_get(gpio->dev, NULL); in u300_gpio_probe()
640 if (IS_ERR(gpio->clk)) { in u300_gpio_probe()
641 err = PTR_ERR(gpio->clk); in u300_gpio_probe()
642 dev_err(gpio->dev, "could not get GPIO clock\n"); in u300_gpio_probe()
646 err = clk_prepare_enable(gpio->clk); in u300_gpio_probe()
648 dev_err(gpio->dev, "could not enable GPIO clock\n"); in u300_gpio_probe()
652 dev_info(gpio->dev, in u300_gpio_probe()
654 gpio->stride = U300_GPIO_PORT_STRIDE; in u300_gpio_probe()
655 gpio->pcr = U300_GPIO_PXPCR; in u300_gpio_probe()
656 gpio->dor = U300_GPIO_PXPDOR; in u300_gpio_probe()
657 gpio->dir = U300_GPIO_PXPDIR; in u300_gpio_probe()
658 gpio->per = U300_GPIO_PXPER; in u300_gpio_probe()
659 gpio->icr = U300_GPIO_PXICR; in u300_gpio_probe()
660 gpio->ien = U300_GPIO_PXIEN; in u300_gpio_probe()
661 gpio->iev = U300_GPIO_PXIEV; in u300_gpio_probe()
664 val = readl(gpio->base + U300_GPIO_CR); in u300_gpio_probe()
665 dev_info(gpio->dev, "COH901571/3 block version: %d, " \ in u300_gpio_probe()
671 gpio->base + U300_GPIO_CR); in u300_gpio_probe()
674 girq = &gpio->chip.irq; in u300_gpio_probe()
675 girq->chip = &u300_gpio_irqchip; in u300_gpio_probe()
676 girq->parent_handler = u300_gpio_irq_handler; in u300_gpio_probe()
677 girq->num_parents = U300_GPIO_NUM_PORTS; in u300_gpio_probe()
678 girq->parents = devm_kcalloc(gpio->dev, U300_GPIO_NUM_PORTS, in u300_gpio_probe()
679 sizeof(*girq->parents), in u300_gpio_probe()
681 if (!girq->parents) { in u300_gpio_probe()
682 err = -ENOMEM; in u300_gpio_probe()
686 struct u300_gpio_port *port = &gpio->ports[portno]; in u300_gpio_probe() local
688 snprintf(port->name, 8, "gpio%d", portno); in u300_gpio_probe()
689 port->number = portno; in u300_gpio_probe()
690 port->gpio = gpio; in u300_gpio_probe()
692 port->irq = platform_get_irq(pdev, portno); in u300_gpio_probe()
693 girq->parents[portno] = port->irq; in u300_gpio_probe()
695 /* Turns off irq force (test register) for this port */ in u300_gpio_probe()
696 writel(0x0, gpio->base + portno * gpio->stride + ifr); in u300_gpio_probe()
698 girq->default_type = IRQ_TYPE_EDGE_FALLING; in u300_gpio_probe()
699 girq->handler = handle_simple_irq; in u300_gpio_probe()
701 gpio->chip.of_node = pdev->dev.of_node; in u300_gpio_probe()
703 err = gpiochip_add_data(&gpio->chip, gpio); in u300_gpio_probe()
705 dev_err(gpio->dev, "unable to add gpiochip: %d\n", err); in u300_gpio_probe()
716 err = gpiochip_add_pin_range(&gpio->chip, "pinctrl-u300", in u300_gpio_probe()
717 p->offset, p->pin_base, 1); in u300_gpio_probe()
727 gpiochip_remove(&gpio->chip); in u300_gpio_probe()
729 clk_disable_unprepare(gpio->clk); in u300_gpio_probe()
730 dev_err(&pdev->dev, "module ERROR:%d\n", err); in u300_gpio_probe()
739 writel(0x00000000U, gpio->base + U300_GPIO_CR); in u300_gpio_remove()
741 gpiochip_remove(&gpio->chip); in u300_gpio_remove()
742 clk_disable_unprepare(gpio->clk); in u300_gpio_remove()
747 { .compatible = "stericsson,gpio-coh901" },
753 .name = "u300-gpio",
773 MODULE_DESCRIPTION("ST-Ericsson AB COH 901 335/COH 901 571/3 GPIO driver");