Lines Matching +full:0 +full:x132b0000
18 #define REG_AUX_CTRL 0x0
19 #define REG_AUX_MSG_ACK 0x10
20 #define REG_AUX_MSG 0x14
21 #define REG_CORE_MSG_ACK 0x18
22 #define REG_CORE_MSG 0x1C
28 #define AUX_CTRL_SW_RESET BIT(0)
42 { "tcsm0", 0x132b0000 },
43 { "tcsm1", 0xf4000000 },
44 { "sram", 0x132f0000 },
83 return 0; in ingenic_rproc_unprepare()
97 return 0; in ingenic_rproc_start()
109 return 0; in ingenic_rproc_stop()
125 for (i = 0; i < ARRAY_SIZE(vpu_mem_map); i++) { in ingenic_rproc_da_to_va()
156 writel(0, vpu->aux_base + REG_AUX_MSG_ACK); in vpu_interrupt()
186 for (i = 0; i < ARRAY_SIZE(vpu_mem_map); i++) { in ingenic_rproc_probe()
201 vpu->clks[0].id = "vpu"; in ingenic_rproc_probe()
210 vpu->irq = platform_get_irq(pdev, 0); in ingenic_rproc_probe()
211 if (vpu->irq < 0) in ingenic_rproc_probe()
214 ret = devm_request_irq(dev, vpu->irq, vpu_interrupt, 0, "VPU", rproc); in ingenic_rproc_probe()
215 if (ret < 0) { in ingenic_rproc_probe()
228 return 0; in ingenic_rproc_probe()