Lines Matching +full:sc7180 +full:- +full:mss
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm self-authenticating modem subsystem remoteproc driver
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
13 #include <linux/dma-mapping.h>
237 if (rc != -EPROBE_DEFER) in q6v5_regulator_init()
261 dev_err(qproc->dev, in q6v5_regulator_enable()
272 dev_err(qproc->dev, in q6v5_regulator_enable()
280 dev_err(qproc->dev, "Regulator enable failed\n"); in q6v5_regulator_enable()
287 for (; i >= 0; i--) { in q6v5_regulator_enable()
332 for (i--; i >= 0; i--) in q6v5_clk_enable()
366 for (i--; i >= 0; i--) { in q6v5_pds_enable()
392 if (!qproc->need_mem_protection) in q6v5_xfer_mem_ownership()
419 if (request_firmware_direct(&dp_fw, "msadp", qproc->dev)) in q6v5_debug_policy_load()
422 if (SZ_1M + dp_fw->size <= qproc->mba_size) { in q6v5_debug_policy_load()
423 memcpy(qproc->mba_region + SZ_1M, dp_fw->data, dp_fw->size); in q6v5_debug_policy_load()
424 qproc->dp_size = dp_fw->size; in q6v5_debug_policy_load()
432 struct q6v5 *qproc = rproc->priv; in q6v5_load()
435 if (fw->size > qproc->mba_size || fw->size > SZ_1M) { in q6v5_load()
436 dev_err(qproc->dev, "MBA firmware load failed\n"); in q6v5_load()
437 return -EINVAL; in q6v5_load()
440 memcpy(qproc->mba_region, fw->data, fw->size); in q6v5_load()
450 if (qproc->has_alt_reset) { in q6v5_reset_assert()
451 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
452 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_assert()
453 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
454 } else if (qproc->has_spare_reg) { in q6v5_reset_assert()
460 * BIT before triggering Q6 MSS reset. AXI_GATING_VALID_OVERRIDE in q6v5_reset_assert()
461 * is withdrawn post MSS assert followed by a MSS deassert, in q6v5_reset_assert()
464 reset_control_assert(qproc->pdc_reset); in q6v5_reset_assert()
465 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
467 reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
468 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_assert()
469 regmap_update_bits(qproc->conn_map, qproc->conn_box, in q6v5_reset_assert()
471 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_assert()
473 ret = reset_control_assert(qproc->mss_restart); in q6v5_reset_assert()
483 if (qproc->has_alt_reset) { in q6v5_reset_deassert()
484 reset_control_assert(qproc->pdc_reset); in q6v5_reset_deassert()
485 writel(1, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
486 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
487 writel(0, qproc->rmb_base + RMB_MBA_ALT_RESET); in q6v5_reset_deassert()
488 reset_control_deassert(qproc->pdc_reset); in q6v5_reset_deassert()
489 } else if (qproc->has_spare_reg) { in q6v5_reset_deassert()
490 ret = reset_control_reset(qproc->mss_restart); in q6v5_reset_deassert()
492 ret = reset_control_deassert(qproc->mss_restart); in q6v5_reset_deassert()
505 val = readl(qproc->rmb_base + RMB_PBL_STATUS_REG); in q6v5_rmb_pbl_wait()
510 return -ETIMEDOUT; in q6v5_rmb_pbl_wait()
526 val = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_rmb_mba_wait()
536 return -ETIMEDOUT; in q6v5_rmb_mba_wait()
546 struct rproc *rproc = qproc->rproc; in q6v5_dump_mba_logs()
549 if (!qproc->has_mba_logs) in q6v5_dump_mba_logs()
552 if (q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, qproc->mba_phys, in q6v5_dump_mba_logs()
553 qproc->mba_size)) in q6v5_dump_mba_logs()
560 memcpy(data, qproc->mba_region, MBA_LOG_SIZE); in q6v5_dump_mba_logs()
561 dev_coredumpv(&rproc->dev, data, MBA_LOG_SIZE, GFP_KERNEL); in q6v5_dump_mba_logs()
570 if (qproc->version == MSS_SDM845) { in q6v5proc_reset()
571 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
573 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
575 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
579 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
580 return -ETIMEDOUT; in q6v5proc_reset()
583 /* De-assert QDSP6 stop core */ in q6v5proc_reset()
584 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
586 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
588 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
591 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
598 } else if (qproc->version == MSS_SC7180) { in q6v5proc_reset()
599 val = readl(qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
601 writel(val, qproc->reg_base + QDSP6SS_SLEEP); in q6v5proc_reset()
603 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_SLEEP, in q6v5proc_reset()
607 dev_err(qproc->dev, "QDSP6SS Sleep clock timed out\n"); in q6v5proc_reset()
608 return -ETIMEDOUT; in q6v5proc_reset()
612 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
614 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
616 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
620 dev_err(qproc->dev, "QDSP6SS XO clock timed out\n"); in q6v5proc_reset()
621 return -ETIMEDOUT; in q6v5proc_reset()
624 /* Configure Q6 core CBCR to auto-enable after reset sequence */ in q6v5proc_reset()
625 val = readl(qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
627 writel(val, qproc->reg_base + QDSP6SS_CORE_CBCR); in q6v5proc_reset()
629 /* De-assert the Q6 stop core signal */ in q6v5proc_reset()
630 writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START); in q6v5proc_reset()
635 /* Trigger the boot FSM to start the Q6 out-of-reset sequence */ in q6v5proc_reset()
636 writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD); in q6v5proc_reset()
639 ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS, in q6v5proc_reset()
642 dev_err(qproc->dev, "Boot FSM failed to complete.\n"); in q6v5proc_reset()
648 } else if (qproc->version == MSS_MSM8996 || in q6v5proc_reset()
649 qproc->version == MSS_MSM8998) { in q6v5proc_reset()
654 qproc->reg_base + QDSP6SS_STRAP_ACC); in q6v5proc_reset()
657 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
659 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
662 val = readl(qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
664 writel(val, qproc->reg_base + QDSP6SS_XO_CBCR); in q6v5proc_reset()
667 ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_XO_CBCR, in q6v5proc_reset()
671 dev_err(qproc->dev, in q6v5proc_reset()
676 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
678 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
679 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
684 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
687 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
689 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
693 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
696 if (qproc->version == MSS_MSM8996) { in q6v5proc_reset()
704 val = readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
705 for (; i >= 0; i--) { in q6v5proc_reset()
707 writel(val, qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
713 val |= readl(qproc->reg_base + mem_pwr_ctl); in q6v5proc_reset()
717 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
719 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
722 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
724 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
727 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
729 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
730 val |= readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
736 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
739 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
741 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
743 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
745 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
749 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5proc_reset()
752 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
754 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
757 val = readl(qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
759 writel(val, qproc->reg_base + QDSP6SS_GFMUX_CTL_REG); in q6v5proc_reset()
762 val = readl(qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
764 writel(val, qproc->reg_base + QDSP6SS_RESET_REG); in q6v5proc_reset()
769 if (ret == -ETIMEDOUT) { in q6v5proc_reset()
770 dev_err(qproc->dev, "PBL boot timed out\n"); in q6v5proc_reset()
772 dev_err(qproc->dev, "PBL returned unexpected status %d\n", ret); in q6v5proc_reset()
773 ret = -EINVAL; in q6v5proc_reset()
802 dev_err(qproc->dev, "port failed halt\n"); in q6v5proc_halt_axi_port()
823 if (qproc->mdata_phys) { in q6v5_mpss_init_image()
824 if (size > qproc->mdata_size) { in q6v5_mpss_init_image()
825 ret = -EINVAL; in q6v5_mpss_init_image()
826 dev_err(qproc->dev, "metadata size outside memory range\n"); in q6v5_mpss_init_image()
830 phys = qproc->mdata_phys; in q6v5_mpss_init_image()
831 ptr = memremap(qproc->mdata_phys, size, MEMREMAP_WC); in q6v5_mpss_init_image()
833 ret = -EBUSY; in q6v5_mpss_init_image()
834 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_mpss_init_image()
835 &qproc->mdata_phys, size); in q6v5_mpss_init_image()
839 ptr = dma_alloc_attrs(qproc->dev, size, &phys, GFP_KERNEL, dma_attrs); in q6v5_mpss_init_image()
841 ret = -ENOMEM; in q6v5_mpss_init_image()
842 dev_err(qproc->dev, "failed to allocate mdt buffer\n"); in q6v5_mpss_init_image()
849 if (qproc->mdata_phys) in q6v5_mpss_init_image()
857 dev_err(qproc->dev, in q6v5_mpss_init_image()
859 ret = -EAGAIN; in q6v5_mpss_init_image()
863 writel(phys, qproc->rmb_base + RMB_PMI_META_DATA_REG); in q6v5_mpss_init_image()
864 writel(RMB_CMD_META_DATA_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_init_image()
867 if (ret == -ETIMEDOUT) in q6v5_mpss_init_image()
868 dev_err(qproc->dev, "MPSS header authentication timed out\n"); in q6v5_mpss_init_image()
870 dev_err(qproc->dev, "MPSS header authentication failed: %d\n", ret); in q6v5_mpss_init_image()
876 dev_warn(qproc->dev, in q6v5_mpss_init_image()
880 if (!qproc->mdata_phys) in q6v5_mpss_init_image()
881 dma_free_attrs(qproc->dev, size, ptr, phys, dma_attrs); in q6v5_mpss_init_image()
890 if (phdr->p_type != PT_LOAD) in q6v5_phdr_valid()
893 if ((phdr->p_flags & QCOM_MDT_TYPE_MASK) == QCOM_MDT_TYPE_HASH) in q6v5_phdr_valid()
896 if (!phdr->p_memsz) in q6v5_phdr_valid()
908 qcom_q6v5_prepare(&qproc->q6v5); in q6v5_mba_load()
910 ret = q6v5_pds_enable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_load()
912 dev_err(qproc->dev, "failed to enable active power domains\n"); in q6v5_mba_load()
916 ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
918 dev_err(qproc->dev, "failed to enable proxy power domains\n"); in q6v5_mba_load()
922 ret = q6v5_regulator_enable(qproc, qproc->proxy_regs, in q6v5_mba_load()
923 qproc->proxy_reg_count); in q6v5_mba_load()
925 dev_err(qproc->dev, "failed to enable proxy supplies\n"); in q6v5_mba_load()
929 ret = q6v5_clk_enable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
930 qproc->proxy_clk_count); in q6v5_mba_load()
932 dev_err(qproc->dev, "failed to enable proxy clocks\n"); in q6v5_mba_load()
936 ret = q6v5_regulator_enable(qproc, qproc->active_regs, in q6v5_mba_load()
937 qproc->active_reg_count); in q6v5_mba_load()
939 dev_err(qproc->dev, "failed to enable supplies\n"); in q6v5_mba_load()
943 ret = q6v5_clk_enable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
944 qproc->reset_clk_count); in q6v5_mba_load()
946 dev_err(qproc->dev, "failed to enable reset clocks\n"); in q6v5_mba_load()
952 dev_err(qproc->dev, "failed to deassert mss restart\n"); in q6v5_mba_load()
956 ret = q6v5_clk_enable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
957 qproc->active_clk_count); in q6v5_mba_load()
959 dev_err(qproc->dev, "failed to enable clocks\n"); in q6v5_mba_load()
967 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mba_load()
968 qproc->mpss_phys, qproc->mpss_size); in q6v5_mba_load()
970 dev_err(qproc->dev, "assigning Q6 access to mpss memory failed: %d\n", ret); in q6v5_mba_load()
975 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, false, true, in q6v5_mba_load()
976 qproc->mba_phys, qproc->mba_size); in q6v5_mba_load()
978 dev_err(qproc->dev, in q6v5_mba_load()
983 writel(qproc->mba_phys, qproc->rmb_base + RMB_MBA_IMAGE_REG); in q6v5_mba_load()
984 if (qproc->dp_size) { in q6v5_mba_load()
985 writel(qproc->mba_phys + SZ_1M, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mba_load()
986 writel(qproc->dp_size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mba_load()
994 if (ret == -ETIMEDOUT) { in q6v5_mba_load()
995 dev_err(qproc->dev, "MBA boot timed out\n"); in q6v5_mba_load()
999 dev_err(qproc->dev, "MBA returned unexpected status %d\n", ret); in q6v5_mba_load()
1000 ret = -EINVAL; in q6v5_mba_load()
1004 qproc->dump_mba_loaded = true; in q6v5_mba_load()
1008 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_load()
1009 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_load()
1010 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_load()
1013 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_mba_load()
1014 false, qproc->mba_phys, in q6v5_mba_load()
1015 qproc->mba_size); in q6v5_mba_load()
1017 dev_err(qproc->dev, in q6v5_mba_load()
1024 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_load()
1025 qproc->active_clk_count); in q6v5_mba_load()
1029 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_load()
1030 qproc->reset_clk_count); in q6v5_mba_load()
1032 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_load()
1033 qproc->active_reg_count); in q6v5_mba_load()
1035 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_load()
1036 qproc->proxy_clk_count); in q6v5_mba_load()
1038 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_load()
1039 qproc->proxy_reg_count); in q6v5_mba_load()
1041 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_mba_load()
1043 q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_load()
1045 qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_load()
1055 qproc->dump_mba_loaded = false; in q6v5_mba_reclaim()
1056 qproc->dp_size = 0; in q6v5_mba_reclaim()
1058 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_q6); in q6v5_mba_reclaim()
1059 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_modem); in q6v5_mba_reclaim()
1060 q6v5proc_halt_axi_port(qproc, qproc->halt_map, qproc->halt_nc); in q6v5_mba_reclaim()
1061 if (qproc->version == MSS_MSM8996) { in q6v5_mba_reclaim()
1063 * To avoid high MX current during LPASS/MSS restart. in q6v5_mba_reclaim()
1065 val = readl(qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1068 writel(val, qproc->reg_base + QDSP6SS_PWR_CTL_REG); in q6v5_mba_reclaim()
1073 q6v5_clk_disable(qproc->dev, qproc->reset_clks, in q6v5_mba_reclaim()
1074 qproc->reset_clk_count); in q6v5_mba_reclaim()
1075 q6v5_clk_disable(qproc->dev, qproc->active_clks, in q6v5_mba_reclaim()
1076 qproc->active_clk_count); in q6v5_mba_reclaim()
1077 q6v5_regulator_disable(qproc, qproc->active_regs, in q6v5_mba_reclaim()
1078 qproc->active_reg_count); in q6v5_mba_reclaim()
1079 q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_mba_reclaim()
1084 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, false, in q6v5_mba_reclaim()
1085 qproc->mba_phys, in q6v5_mba_reclaim()
1086 qproc->mba_size); in q6v5_mba_reclaim()
1089 ret = qcom_q6v5_unprepare(&qproc->q6v5); in q6v5_mba_reclaim()
1091 q6v5_pds_disable(qproc, qproc->proxy_pds, in q6v5_mba_reclaim()
1092 qproc->proxy_pd_count); in q6v5_mba_reclaim()
1093 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in q6v5_mba_reclaim()
1094 qproc->proxy_clk_count); in q6v5_mba_reclaim()
1095 q6v5_regulator_disable(qproc, qproc->proxy_regs, in q6v5_mba_reclaim()
1096 qproc->proxy_reg_count); in q6v5_mba_reclaim()
1102 struct q6v5 *qproc = rproc->priv; in q6v5_reload_mba()
1106 ret = request_firmware(&fw, rproc->firmware, qproc->dev); in q6v5_reload_mba()
1138 fw_name_len = strlen(qproc->hexagon_mdt_image); in q6v5_mpss_load()
1140 return -EINVAL; in q6v5_mpss_load()
1142 fw_name = kstrdup(qproc->hexagon_mdt_image, GFP_KERNEL); in q6v5_mpss_load()
1144 return -ENOMEM; in q6v5_mpss_load()
1146 ret = request_firmware(&fw, fw_name, qproc->dev); in q6v5_mpss_load()
1148 dev_err(qproc->dev, "unable to load %s\n", fw_name); in q6v5_mpss_load()
1153 writel(0, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1159 ehdr = (struct elf32_hdr *)fw->data; in q6v5_mpss_load()
1162 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1168 if (phdr->p_flags & QCOM_MDT_RELOCATABLE) in q6v5_mpss_load()
1171 if (phdr->p_paddr < min_addr) in q6v5_mpss_load()
1172 min_addr = phdr->p_paddr; in q6v5_mpss_load()
1174 if (phdr->p_paddr + phdr->p_memsz > max_addr) in q6v5_mpss_load()
1175 max_addr = ALIGN(phdr->p_paddr + phdr->p_memsz, SZ_4K); in q6v5_mpss_load()
1182 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, false, in q6v5_mpss_load()
1183 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1185 /* Share ownership between Linux and MSS, during segment loading */ in q6v5_mpss_load()
1186 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, true, true, in q6v5_mpss_load()
1187 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1189 dev_err(qproc->dev, in q6v5_mpss_load()
1191 ret = -EAGAIN; in q6v5_mpss_load()
1195 mpss_reloc = relocate ? min_addr : qproc->mpss_phys; in q6v5_mpss_load()
1196 qproc->mpss_reloc = mpss_reloc; in q6v5_mpss_load()
1198 for (i = 0; i < ehdr->e_phnum; i++) { in q6v5_mpss_load()
1204 offset = phdr->p_paddr - mpss_reloc; in q6v5_mpss_load()
1205 if (offset < 0 || offset + phdr->p_memsz > qproc->mpss_size) { in q6v5_mpss_load()
1206 dev_err(qproc->dev, "segment outside memory range\n"); in q6v5_mpss_load()
1207 ret = -EINVAL; in q6v5_mpss_load()
1211 if (phdr->p_filesz > phdr->p_memsz) { in q6v5_mpss_load()
1212 dev_err(qproc->dev, in q6v5_mpss_load()
1215 ret = -EINVAL; in q6v5_mpss_load()
1219 ptr = memremap(qproc->mpss_phys + offset, phdr->p_memsz, MEMREMAP_WC); in q6v5_mpss_load()
1221 dev_err(qproc->dev, in q6v5_mpss_load()
1222 "unable to map memory region: %pa+%zx-%x\n", in q6v5_mpss_load()
1223 &qproc->mpss_phys, offset, phdr->p_memsz); in q6v5_mpss_load()
1227 if (phdr->p_filesz && phdr->p_offset < fw->size) { in q6v5_mpss_load()
1228 /* Firmware is large enough to be non-split */ in q6v5_mpss_load()
1229 if (phdr->p_offset + phdr->p_filesz > fw->size) { in q6v5_mpss_load()
1230 dev_err(qproc->dev, in q6v5_mpss_load()
1233 ret = -EINVAL; in q6v5_mpss_load()
1238 memcpy(ptr, fw->data + phdr->p_offset, phdr->p_filesz); in q6v5_mpss_load()
1239 } else if (phdr->p_filesz) { in q6v5_mpss_load()
1241 sprintf(fw_name + fw_name_len - 3, "b%02d", i); in q6v5_mpss_load()
1242 ret = request_firmware_into_buf(&seg_fw, fw_name, qproc->dev, in q6v5_mpss_load()
1243 ptr, phdr->p_filesz); in q6v5_mpss_load()
1245 dev_err(qproc->dev, "failed to load %s\n", fw_name); in q6v5_mpss_load()
1250 if (seg_fw->size != phdr->p_filesz) { in q6v5_mpss_load()
1251 dev_err(qproc->dev, in q6v5_mpss_load()
1254 ret = -EINVAL; in q6v5_mpss_load()
1263 if (phdr->p_memsz > phdr->p_filesz) { in q6v5_mpss_load()
1264 memset(ptr + phdr->p_filesz, 0, in q6v5_mpss_load()
1265 phdr->p_memsz - phdr->p_filesz); in q6v5_mpss_load()
1268 size += phdr->p_memsz; in q6v5_mpss_load()
1270 code_length = readl(qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1272 boot_addr = relocate ? qproc->mpss_phys : min_addr; in q6v5_mpss_load()
1273 writel(boot_addr, qproc->rmb_base + RMB_PMI_CODE_START_REG); in q6v5_mpss_load()
1274 writel(RMB_CMD_LOAD_READY, qproc->rmb_base + RMB_MBA_COMMAND_REG); in q6v5_mpss_load()
1276 writel(size, qproc->rmb_base + RMB_PMI_CODE_LENGTH_REG); in q6v5_mpss_load()
1278 ret = readl(qproc->rmb_base + RMB_MBA_STATUS_REG); in q6v5_mpss_load()
1280 dev_err(qproc->dev, "MPSS authentication failed: %d\n", in q6v5_mpss_load()
1287 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, false, true, in q6v5_mpss_load()
1288 qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1290 dev_err(qproc->dev, in q6v5_mpss_load()
1292 ret = -EAGAIN; in q6v5_mpss_load()
1297 if (ret == -ETIMEDOUT) in q6v5_mpss_load()
1298 dev_err(qproc->dev, "MPSS authentication timed out\n"); in q6v5_mpss_load()
1300 dev_err(qproc->dev, "MPSS authentication failed: %d\n", ret); in q6v5_mpss_load()
1302 qcom_pil_info_store("modem", qproc->mpss_phys, qproc->mpss_size); in q6v5_mpss_load()
1317 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_dump_segment()
1318 int offset = segment->da - qproc->mpss_reloc; in qcom_q6v5_dump_segment()
1322 if (!qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1326 ret = q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1328 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1329 qproc->mpss_size); in qcom_q6v5_dump_segment()
1334 ptr = memremap(qproc->mpss_phys + offset + cp_offset, size, MEMREMAP_WC); in qcom_q6v5_dump_segment()
1343 qproc->current_dump_size += size; in qcom_q6v5_dump_segment()
1346 if (qproc->current_dump_size == qproc->total_dump_size) { in qcom_q6v5_dump_segment()
1347 if (qproc->dump_mba_loaded) { in qcom_q6v5_dump_segment()
1349 q6v5_xfer_mem_ownership(qproc, &qproc->mpss_perm, in qcom_q6v5_dump_segment()
1351 qproc->mpss_phys, in qcom_q6v5_dump_segment()
1352 qproc->mpss_size); in qcom_q6v5_dump_segment()
1360 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_start()
1368 dev_info(qproc->dev, "MBA booted with%s debug policy, loading mpss\n", in q6v5_start()
1369 qproc->dp_size ? "" : "out"); in q6v5_start()
1375 ret = qcom_q6v5_wait_for_start(&qproc->q6v5, msecs_to_jiffies(5000)); in q6v5_start()
1376 if (ret == -ETIMEDOUT) { in q6v5_start()
1377 dev_err(qproc->dev, "start timed out\n"); in q6v5_start()
1381 xfermemop_ret = q6v5_xfer_mem_ownership(qproc, &qproc->mba_perm, true, in q6v5_start()
1382 false, qproc->mba_phys, in q6v5_start()
1383 qproc->mba_size); in q6v5_start()
1385 dev_err(qproc->dev, in q6v5_start()
1389 qproc->current_dump_size = 0; in q6v5_start()
1402 struct q6v5 *qproc = (struct q6v5 *)rproc->priv; in q6v5_stop()
1405 ret = qcom_q6v5_request_stop(&qproc->q6v5); in q6v5_stop()
1406 if (ret == -ETIMEDOUT) in q6v5_stop()
1407 dev_err(qproc->dev, "timed out on wait\n"); in q6v5_stop()
1421 struct q6v5 *qproc = rproc->priv; in qcom_q6v5_register_dump_segments()
1425 ret = request_firmware(&fw, qproc->hexagon_mdt_image, qproc->dev); in qcom_q6v5_register_dump_segments()
1427 dev_err(qproc->dev, "unable to load %s\n", in qcom_q6v5_register_dump_segments()
1428 qproc->hexagon_mdt_image); in qcom_q6v5_register_dump_segments()
1434 ehdr = (struct elf32_hdr *)fw->data; in qcom_q6v5_register_dump_segments()
1436 qproc->total_dump_size = 0; in qcom_q6v5_register_dump_segments()
1438 for (i = 0; i < ehdr->e_phnum; i++) { in qcom_q6v5_register_dump_segments()
1444 ret = rproc_coredump_add_custom_segment(rproc, phdr->p_paddr, in qcom_q6v5_register_dump_segments()
1445 phdr->p_memsz, in qcom_q6v5_register_dump_segments()
1451 qproc->total_dump_size += phdr->p_memsz; in qcom_q6v5_register_dump_segments()
1469 q6v5_clk_disable(qproc->dev, qproc->proxy_clks, in qcom_msa_handover()
1470 qproc->proxy_clk_count); in qcom_msa_handover()
1471 q6v5_regulator_disable(qproc, qproc->proxy_regs, in qcom_msa_handover()
1472 qproc->proxy_reg_count); in qcom_msa_handover()
1473 q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in qcom_msa_handover()
1483 qproc->reg_base = devm_ioremap_resource(&pdev->dev, res); in q6v5_init_mem()
1484 if (IS_ERR(qproc->reg_base)) in q6v5_init_mem()
1485 return PTR_ERR(qproc->reg_base); in q6v5_init_mem()
1488 qproc->rmb_base = devm_ioremap_resource(&pdev->dev, res); in q6v5_init_mem()
1489 if (IS_ERR(qproc->rmb_base)) in q6v5_init_mem()
1490 return PTR_ERR(qproc->rmb_base); in q6v5_init_mem()
1492 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1493 "qcom,halt-regs", 3, 0, &args); in q6v5_init_mem()
1495 dev_err(&pdev->dev, "failed to parse qcom,halt-regs\n"); in q6v5_init_mem()
1496 return -EINVAL; in q6v5_init_mem()
1499 qproc->halt_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1501 if (IS_ERR(qproc->halt_map)) in q6v5_init_mem()
1502 return PTR_ERR(qproc->halt_map); in q6v5_init_mem()
1504 qproc->halt_q6 = args.args[0]; in q6v5_init_mem()
1505 qproc->halt_modem = args.args[1]; in q6v5_init_mem()
1506 qproc->halt_nc = args.args[2]; in q6v5_init_mem()
1508 if (qproc->has_spare_reg) { in q6v5_init_mem()
1509 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node, in q6v5_init_mem()
1510 "qcom,spare-regs", in q6v5_init_mem()
1513 dev_err(&pdev->dev, "failed to parse spare-regs\n"); in q6v5_init_mem()
1514 return -EINVAL; in q6v5_init_mem()
1517 qproc->conn_map = syscon_node_to_regmap(args.np); in q6v5_init_mem()
1519 if (IS_ERR(qproc->conn_map)) in q6v5_init_mem()
1520 return PTR_ERR(qproc->conn_map); in q6v5_init_mem()
1522 qproc->conn_box = args.args[0]; in q6v5_init_mem()
1541 if (rc != -EPROBE_DEFER) in q6v5_init_clocks()
1567 ret = PTR_ERR(devs[i]) ? : -ENODATA; in q6v5_pds_attach()
1575 for (i--; i >= 0; i--) in q6v5_pds_attach()
1592 qproc->mss_restart = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1594 if (IS_ERR(qproc->mss_restart)) { in q6v5_init_reset()
1595 dev_err(qproc->dev, "failed to acquire mss restart\n"); in q6v5_init_reset()
1596 return PTR_ERR(qproc->mss_restart); in q6v5_init_reset()
1599 if (qproc->has_alt_reset || qproc->has_spare_reg) { in q6v5_init_reset()
1600 qproc->pdc_reset = devm_reset_control_get_exclusive(qproc->dev, in q6v5_init_reset()
1602 if (IS_ERR(qproc->pdc_reset)) { in q6v5_init_reset()
1603 dev_err(qproc->dev, "failed to acquire pdc reset\n"); in q6v5_init_reset()
1604 return PTR_ERR(qproc->pdc_reset); in q6v5_init_reset()
1620 * In the absence of mba/mpss sub-child, extract the mba and mpss in q6v5_alloc_memory_region()
1621 * reserved memory regions from device's memory-region property. in q6v5_alloc_memory_region()
1623 child = of_get_child_by_name(qproc->dev->of_node, "mba"); in q6v5_alloc_memory_region()
1625 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1626 "memory-region", 0); in q6v5_alloc_memory_region()
1628 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1635 dev_err(qproc->dev, "unable to resolve mba region\n"); in q6v5_alloc_memory_region()
1639 qproc->mba_phys = r.start; in q6v5_alloc_memory_region()
1640 qproc->mba_size = resource_size(&r); in q6v5_alloc_memory_region()
1641 qproc->mba_region = devm_ioremap_wc(qproc->dev, qproc->mba_phys, qproc->mba_size); in q6v5_alloc_memory_region()
1642 if (!qproc->mba_region) { in q6v5_alloc_memory_region()
1643 dev_err(qproc->dev, "unable to map memory region: %pa+%zx\n", in q6v5_alloc_memory_region()
1644 &r.start, qproc->mba_size); in q6v5_alloc_memory_region()
1645 return -EBUSY; in q6v5_alloc_memory_region()
1649 node = of_parse_phandle(qproc->dev->of_node, in q6v5_alloc_memory_region()
1650 "memory-region", 1); in q6v5_alloc_memory_region()
1652 child = of_get_child_by_name(qproc->dev->of_node, "mpss"); in q6v5_alloc_memory_region()
1653 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1660 dev_err(qproc->dev, "unable to resolve mpss region\n"); in q6v5_alloc_memory_region()
1664 qproc->mpss_phys = qproc->mpss_reloc = r.start; in q6v5_alloc_memory_region()
1665 qproc->mpss_size = resource_size(&r); in q6v5_alloc_memory_region()
1668 node = of_parse_phandle(qproc->dev->of_node, "memory-region", 2); in q6v5_alloc_memory_region()
1670 child = of_get_child_by_name(qproc->dev->of_node, "metadata"); in q6v5_alloc_memory_region()
1671 node = of_parse_phandle(child, "memory-region", 0); in q6v5_alloc_memory_region()
1680 dev_err(qproc->dev, "unable to resolve metadata region\n"); in q6v5_alloc_memory_region()
1681 return -EINVAL; in q6v5_alloc_memory_region()
1684 qproc->mdata_phys = rmem->base; in q6v5_alloc_memory_region()
1685 qproc->mdata_size = rmem->size; in q6v5_alloc_memory_region()
1698 desc = of_device_get_match_data(&pdev->dev); in q6v5_probe()
1700 return -EINVAL; in q6v5_probe()
1702 if (desc->need_mem_protection && !qcom_scm_is_available()) in q6v5_probe()
1703 return -EPROBE_DEFER; in q6v5_probe()
1705 mba_image = desc->hexagon_mba_image; in q6v5_probe()
1706 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1708 if (ret < 0 && ret != -EINVAL) in q6v5_probe()
1711 rproc = rproc_alloc(&pdev->dev, pdev->name, &q6v5_ops, in q6v5_probe()
1714 dev_err(&pdev->dev, "failed to allocate rproc\n"); in q6v5_probe()
1715 return -ENOMEM; in q6v5_probe()
1718 rproc->auto_boot = false; in q6v5_probe()
1721 qproc = (struct q6v5 *)rproc->priv; in q6v5_probe()
1722 qproc->dev = &pdev->dev; in q6v5_probe()
1723 qproc->rproc = rproc; in q6v5_probe()
1724 qproc->hexagon_mdt_image = "modem.mdt"; in q6v5_probe()
1725 ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", in q6v5_probe()
1726 1, &qproc->hexagon_mdt_image); in q6v5_probe()
1727 if (ret < 0 && ret != -EINVAL) in q6v5_probe()
1732 qproc->has_spare_reg = desc->has_spare_reg; in q6v5_probe()
1741 ret = q6v5_init_clocks(&pdev->dev, qproc->proxy_clks, in q6v5_probe()
1742 desc->proxy_clk_names); in q6v5_probe()
1744 dev_err(&pdev->dev, "Failed to get proxy clocks.\n"); in q6v5_probe()
1747 qproc->proxy_clk_count = ret; in q6v5_probe()
1749 ret = q6v5_init_clocks(&pdev->dev, qproc->reset_clks, in q6v5_probe()
1750 desc->reset_clk_names); in q6v5_probe()
1752 dev_err(&pdev->dev, "Failed to get reset clocks.\n"); in q6v5_probe()
1755 qproc->reset_clk_count = ret; in q6v5_probe()
1757 ret = q6v5_init_clocks(&pdev->dev, qproc->active_clks, in q6v5_probe()
1758 desc->active_clk_names); in q6v5_probe()
1760 dev_err(&pdev->dev, "Failed to get active clocks.\n"); in q6v5_probe()
1763 qproc->active_clk_count = ret; in q6v5_probe()
1765 ret = q6v5_regulator_init(&pdev->dev, qproc->proxy_regs, in q6v5_probe()
1766 desc->proxy_supply); in q6v5_probe()
1768 dev_err(&pdev->dev, "Failed to get proxy regulators.\n"); in q6v5_probe()
1771 qproc->proxy_reg_count = ret; in q6v5_probe()
1773 ret = q6v5_regulator_init(&pdev->dev, qproc->active_regs, in q6v5_probe()
1774 desc->active_supply); in q6v5_probe()
1776 dev_err(&pdev->dev, "Failed to get active regulators.\n"); in q6v5_probe()
1779 qproc->active_reg_count = ret; in q6v5_probe()
1781 ret = q6v5_pds_attach(&pdev->dev, qproc->active_pds, in q6v5_probe()
1782 desc->active_pd_names); in q6v5_probe()
1784 dev_err(&pdev->dev, "Failed to attach active power domains\n"); in q6v5_probe()
1787 qproc->active_pd_count = ret; in q6v5_probe()
1789 ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, in q6v5_probe()
1790 desc->proxy_pd_names); in q6v5_probe()
1792 dev_err(&pdev->dev, "Failed to init power domains\n"); in q6v5_probe()
1795 qproc->proxy_pd_count = ret; in q6v5_probe()
1797 qproc->has_alt_reset = desc->has_alt_reset; in q6v5_probe()
1802 qproc->version = desc->version; in q6v5_probe()
1803 qproc->need_mem_protection = desc->need_mem_protection; in q6v5_probe()
1804 qproc->has_mba_logs = desc->has_mba_logs; in q6v5_probe()
1806 ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, in q6v5_probe()
1811 qproc->mpss_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
1812 qproc->mba_perm = BIT(QCOM_SCM_VMID_HLOS); in q6v5_probe()
1813 qcom_add_glink_subdev(rproc, &qproc->glink_subdev, "mpss"); in q6v5_probe()
1814 qcom_add_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
1815 qcom_add_ssr_subdev(rproc, &qproc->ssr_subdev, "mpss"); in q6v5_probe()
1816 qproc->sysmon = qcom_add_sysmon_subdev(rproc, "modem", 0x12); in q6v5_probe()
1817 if (IS_ERR(qproc->sysmon)) { in q6v5_probe()
1818 ret = PTR_ERR(qproc->sysmon); in q6v5_probe()
1829 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_probe()
1831 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_probe()
1832 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_probe()
1833 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_probe()
1835 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_probe()
1837 q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_probe()
1847 struct rproc *rproc = qproc->rproc; in q6v5_remove()
1851 qcom_remove_sysmon_subdev(qproc->sysmon); in q6v5_remove()
1852 qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); in q6v5_remove()
1853 qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); in q6v5_remove()
1854 qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); in q6v5_remove()
1856 q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); in q6v5_remove()
1857 q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); in q6v5_remove()
1888 "mss",
1924 "mss",
2046 .supply = "mss",
2070 { .compatible = "qcom,q6v5-pil", .data = &msm8916_mss},
2071 { .compatible = "qcom,msm8916-mss-pil", .data = &msm8916_mss},
2072 { .compatible = "qcom,msm8974-mss-pil", .data = &msm8974_mss},
2073 { .compatible = "qcom,msm8996-mss-pil", .data = &msm8996_mss},
2074 { .compatible = "qcom,msm8998-mss-pil", .data = &msm8998_mss},
2075 { .compatible = "qcom,sc7180-mss-pil", .data = &sc7180_mss},
2076 { .compatible = "qcom,sdm845-mss-pil", .data = &sdm845_mss},
2085 .name = "qcom-q6v5-mss",
2091 MODULE_DESCRIPTION("Qualcomm Self-authenticating modem remoteproc driver");