Lines Matching +full:tegra30 +full:- +full:tsensor
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
11 #include <linux/nvmem-consumer.h>
12 #include <linux/nvmem-provider.h>
37 { .compatible = "nvidia,tegra20-car", },
38 { .compatible = "nvidia,tegra30-car", },
39 { .compatible = "nvidia,tegra114-car", },
40 { .compatible = "nvidia,tegra124-car", },
41 { .compatible = "nvidia,tegra132-car", },
42 { .compatible = "nvidia,tegra210-car", },
53 { .compatible = "nvidia,tegra234-efuse", .data = &tegra234_fuse_soc },
56 { .compatible = "nvidia,tegra194-efuse", .data = &tegra194_fuse_soc },
59 { .compatible = "nvidia,tegra186-efuse", .data = &tegra186_fuse_soc },
62 { .compatible = "nvidia,tegra210-efuse", .data = &tegra210_fuse_soc },
65 { .compatible = "nvidia,tegra132-efuse", .data = &tegra124_fuse_soc },
68 { .compatible = "nvidia,tegra124-efuse", .data = &tegra124_fuse_soc },
71 { .compatible = "nvidia,tegra114-efuse", .data = &tegra114_fuse_soc },
74 { .compatible = "nvidia,tegra30-efuse", .data = &tegra30_fuse_soc },
77 { .compatible = "nvidia,tegra20-efuse", .data = &tegra20_fuse_soc },
90 buffer[i] = fuse->read(fuse, offset + i * 4); in tegra_fuse_read()
97 .name = "tsensor-cpu1",
103 .name = "tsensor-cpu2",
109 .name = "tsensor-cpu0",
115 .name = "xusb-pad-calibration",
121 .name = "tsensor-cpu3",
127 .name = "sata-calibration",
133 .name = "tsensor-gpu",
139 .name = "tsensor-mem0",
145 .name = "tsensor-mem1",
151 .name = "tsensor-pllx",
157 .name = "tsensor-common",
163 .name = "tsensor-realignment",
169 .name = "gpu-calibration",
175 .name = "xusb-pad-calibration-ext",
185 void __iomem *base = fuse->base; in tegra_fuse_probe()
192 fuse->phys = res->start; in tegra_fuse_probe()
193 fuse->base = devm_ioremap_resource(&pdev->dev, res); in tegra_fuse_probe()
194 if (IS_ERR(fuse->base)) { in tegra_fuse_probe()
195 err = PTR_ERR(fuse->base); in tegra_fuse_probe()
196 fuse->base = base; in tegra_fuse_probe()
200 fuse->clk = devm_clk_get(&pdev->dev, "fuse"); in tegra_fuse_probe()
201 if (IS_ERR(fuse->clk)) { in tegra_fuse_probe()
202 if (PTR_ERR(fuse->clk) != -EPROBE_DEFER) in tegra_fuse_probe()
203 dev_err(&pdev->dev, "failed to get FUSE clock: %ld", in tegra_fuse_probe()
204 PTR_ERR(fuse->clk)); in tegra_fuse_probe()
206 fuse->base = base; in tegra_fuse_probe()
207 return PTR_ERR(fuse->clk); in tegra_fuse_probe()
211 fuse->dev = &pdev->dev; in tegra_fuse_probe()
213 if (fuse->soc->probe) { in tegra_fuse_probe()
214 err = fuse->soc->probe(fuse); in tegra_fuse_probe()
220 nvmem.dev = &pdev->dev; in tegra_fuse_probe()
222 nvmem.id = -1; in tegra_fuse_probe()
230 nvmem.size = fuse->soc->info->size; in tegra_fuse_probe()
235 fuse->nvmem = devm_nvmem_register(&pdev->dev, &nvmem); in tegra_fuse_probe()
236 if (IS_ERR(fuse->nvmem)) { in tegra_fuse_probe()
237 err = PTR_ERR(fuse->nvmem); in tegra_fuse_probe()
238 dev_err(&pdev->dev, "failed to register NVMEM device: %d\n", in tegra_fuse_probe()
249 fuse->base = base; in tegra_fuse_probe()
255 .name = "tegra-fuse",
265 unsigned int offset = fuse->soc->info->spare + spare * 4; in tegra_fuse_read_spare()
267 return fuse->read_early(fuse, offset) & 1; in tegra_fuse_read_spare()
272 return fuse->read_early(fuse, offset); in tegra_fuse_read_early()
277 if (!fuse->read || !fuse->clk) in tegra_fuse_readl()
278 return -EPROBE_DEFER; in tegra_fuse_readl()
280 if (IS_ERR(fuse->clk)) in tegra_fuse_readl()
281 return PTR_ERR(fuse->clk); in tegra_fuse_readl()
283 *value = fuse->read(fuse, offset); in tegra_fuse_readl()
340 * platform type is silicon and all other non-zero values indicate in platform_show()
369 attr->family = kasprintf(GFP_KERNEL, "Tegra"); in tegra_soc_device_register()
370 attr->revision = kasprintf(GFP_KERNEL, "%s", in tegra_soc_device_register()
372 attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id()); in tegra_soc_device_register()
373 attr->custom_attr_group = fuse->soc->soc_attr_group; in tegra_soc_device_register()
377 kfree(attr->soc_id); in tegra_soc_device_register()
378 kfree(attr->revision); in tegra_soc_device_register()
379 kfree(attr->family); in tegra_soc_device_register()
398 * Fall back to legacy initialization for 32-bit ARM only. All in tegra_init_fuse()
399 * 64-bit ARM device tree files for Tegra are required to have in tegra_init_fuse()
402 * This is for backwards-compatibility with old device trees in tegra_init_fuse()
415 fuse->soc = &tegra20_fuse_soc; in tegra_init_fuse()
420 case TEGRA30: in tegra_init_fuse()
421 fuse->soc = &tegra30_fuse_soc; in tegra_init_fuse()
427 fuse->soc = &tegra114_fuse_soc; in tegra_init_fuse()
433 fuse->soc = &tegra124_fuse_soc; in tegra_init_fuse()
444 * nice with multi-platform kernels. in tegra_init_fuse()
455 return -ENXIO; in tegra_init_fuse()
458 fuse->soc = match->data; in tegra_init_fuse()
469 return -ENXIO; in tegra_init_fuse()
473 fuse->base = ioremap(regs.start, resource_size(®s)); in tegra_init_fuse()
474 if (!fuse->base) { in tegra_init_fuse()
476 return -ENXIO; in tegra_init_fuse()
479 fuse->soc->init(fuse); in tegra_init_fuse()
488 if (fuse->soc->lookups) { in tegra_init_fuse()
489 size_t size = sizeof(*fuse->lookups) * fuse->soc->num_lookups; in tegra_init_fuse()
491 fuse->lookups = kmemdup(fuse->soc->lookups, size, GFP_KERNEL); in tegra_init_fuse()
492 if (!fuse->lookups) in tegra_init_fuse()
493 return -ENOMEM; in tegra_init_fuse()
495 nvmem_add_cell_lookups(fuse->lookups, fuse->soc->num_lookups); in tegra_init_fuse()