Lines Matching full:ccs

455  * Intel color control surface (CCS) for render compression
459  * the CCS will be plane index 1.
461  * Each CCS tile matches a 1024x512 pixel area of the main surface.
462  * To match certain aspects of the 3D hardware the CCS is
464  * the CCS pitch must be specified in multiples of 128 bytes.
466  * In reality the CCS tile appears to be a 64Bx64 Y tile, composed
475  * Intel color control surfaces (CCS) for Gen-12 render compression.
477  * The main surface is Y-tiled and at plane index 0, the CCS is linear and
478  * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
479  * main surface. In other words, 4 bits in CCS map to a main surface cache
486  * Intel color control surfaces (CCS) for Gen-12 media compression
488  * The main surface is Y-tiled and at plane index 0, the CCS is linear and
489  * at index 1. A 64B CCS cache line corresponds to an area of 4x1 tiles in
490  * main surface. In other words, 4 bits in CCS map to a main surface cache
492  * Y-tile widths. For semi-planar formats like NV12, CCS planes follow the
494  * planes 2 and 3 for the respective CCS.