Lines Matching +full:0 +full:x5b00
66 #define CS420X_VENDOR_NID 0x11
67 #define CS_DIG_OUT1_PIN_NID 0x10
68 #define CS_DIG_OUT2_PIN_NID 0x15
69 #define CS_DMIC1_PIN_NID 0x0e
70 #define CS_DMIC2_PIN_NID 0x12
73 #define IDX_SPDIF_STAT 0x0000
74 #define IDX_SPDIF_CTL 0x0001
75 #define IDX_ADC_CFG 0x0002
77 * 0 = immediate,
82 #define CS_COEF_ADC_SZC_MASK (3 << 0)
83 #define CS_COEF_ADC_MIC_SZC_MODE (3 << 0) /* SZC setup for mic */
84 #define CS_COEF_ADC_LI_SZC_MODE (3 << 0) /* SZC setup for line-in */
85 /* PGA mode: 0 = differential, 1 = signle-ended */
88 #define IDX_DAC_CFG 0x0003
90 * 0 = Immediate
95 #define CS_COEF_DAC_HP_SZC_MODE (3 << 0) /* nid 0x02 */
96 #define CS_COEF_DAC_LO_SZC_MODE (3 << 2) /* nid 0x03 */
97 #define CS_COEF_DAC_SPK_SZC_MODE (3 << 4) /* nid 0x04 */
99 #define IDX_BEEP_CFG 0x0004
100 /* 0x0008 - test reg key */
101 /* 0x0009 - 0x0014 -> 12 test regs */
102 /* 0x0015 - visibility reg */
105 #define CS4208_VENDOR_NID 0x24
114 #define CS4210_DAC_NID 0x02
115 #define CS4210_ADC_NID 0x03
116 #define CS4210_VENDOR_NID 0x0B
117 #define CS421X_DMIC_PIN_NID 0x09 /* Port E */
118 #define CS421X_SPDIF_PIN_NID 0x0A /* Port H */
120 #define CS421X_IDX_DEV_CFG 0x01
121 #define CS421X_IDX_ADC_CFG 0x02
122 #define CS421X_IDX_DAC_CFG 0x03
123 #define CS421X_IDX_SPK_CTL 0x04
126 #define CS4213_VENDOR_NID 0x09
132 snd_hda_codec_write(codec, spec->vendor_nid, 0, in cs_vendor_coef_get()
134 return snd_hda_codec_read(codec, spec->vendor_nid, 0, in cs_vendor_coef_get()
135 AC_VERB_GET_PROC_COEF, 0); in cs_vendor_coef_get()
142 snd_hda_codec_write(codec, spec->vendor_nid, 0, in cs_vendor_coef_set()
144 snd_hda_codec_write(codec, spec->vendor_nid, 0, in cs_vendor_coef_set()
170 snd_hda_codec_write(codec, 0x01, 0, in cs_automute()
203 {0x11, AC_VERB_SET_PROC_STATE, 1},
204 {0x11, AC_VERB_SET_COEF_INDEX, IDX_DAC_CFG},
205 {0x11, AC_VERB_SET_PROC_COEF,
206 (0x002a /* DAC1/2/3 SZCMode Soft Ramp */
207 | 0x0040 /* Mute DACs on FIFO error */
208 | 0x1000 /* Enable DACs High Pass Filter */
209 | 0x0400 /* Disable Coefficient Auto increment */
212 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
213 {0x11, AC_VERB_SET_PROC_COEF, 0x000a},
215 {0x11, AC_VERB_SET_COEF_INDEX, IDX_BEEP_CFG},
216 {0x11, AC_VERB_SET_PROC_COEF, 0x0007}, /* Enable Beep thru DAC1/2/3 */
222 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
223 {0x24, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
224 {0x24, AC_VERB_SET_COEF_INDEX, 0x0033},
225 {0x24, AC_VERB_SET_PROC_COEF, 0x0001}, /* A1 ICS */
226 {0x24, AC_VERB_SET_COEF_INDEX, 0x0034},
227 {0x24, AC_VERB_SET_PROC_COEF, 0x1C01}, /* A1 Enable, A Thresh = 300mV */
250 {0x01, AC_VERB_SET_POWER_STATE, 0x00}, /* AFG: D0 */
251 {0x11, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
253 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
254 {0x11, AC_VERB_SET_PROC_COEF, 0x9999},
255 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
256 {0x11, AC_VERB_SET_PROC_COEF, 0xa412},
257 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
258 {0x11, AC_VERB_SET_PROC_COEF, 0x0009},
260 {0x07, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Rx: D0 */
261 {0x08, AC_VERB_SET_POWER_STATE, 0x00}, /* S/PDIF Tx: D0 */
263 {0x11, AC_VERB_SET_COEF_INDEX, 0x0017},
264 {0x11, AC_VERB_SET_PROC_COEF, 0x2412},
265 {0x11, AC_VERB_SET_COEF_INDEX, 0x0008},
266 {0x11, AC_VERB_SET_PROC_COEF, 0x0000},
267 {0x11, AC_VERB_SET_COEF_INDEX, 0x0001},
268 {0x11, AC_VERB_SET_PROC_COEF, 0x0008},
269 {0x11, AC_VERB_SET_PROC_STATE, 0x00},
271 #if 0 /* Don't to set to D3 as we are in power-up sequence */
272 {0x07, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Rx: D3 */
273 {0x08, AC_VERB_SET_POWER_STATE, 0x03}, /* S/PDIF Tx: D3 */
274 /*{0x01, AC_VERB_SET_POWER_STATE, 0x03},*/ /* AFG: D3 This is already handled */
285 coef = 0x0002; /* SRC_MUTE soft-mute on SPDIF (if no lock) */ in init_digital_coef()
286 coef |= 0x0008; /* Replace with mute on error */ in init_digital_coef()
288 coef |= 0x4000; /* RX to TX1 or TX2 Loopthru / SPDIF2 in init_digital_coef()
310 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, in cs_init()
312 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, in cs_init()
314 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, in cs_init()
323 return 0; in cs_init()
331 if (err < 0) in cs_build_controls()
334 return 0; in cs_build_controls()
353 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); in cs_parse_auto_config()
354 if (err < 0) in cs_parse_auto_config()
358 if (err < 0) in cs_parse_auto_config()
363 unsigned int done = 0; in cs_parse_auto_config()
364 for (i = 0; i < spec->gen.input_mux.num_items; i++) { in cs_parse_auto_config()
374 return 0; in cs_parse_auto_config()
390 SND_PCI_QUIRK(0x10de, 0x0ac0, "MacBookPro 5,3", CS420X_MBP53),
391 SND_PCI_QUIRK(0x10de, 0x0d94, "MacBookAir 3,1(2)", CS420X_MBP55),
392 SND_PCI_QUIRK(0x10de, 0xcb79, "MacBookPro 5,5", CS420X_MBP55),
393 SND_PCI_QUIRK(0x10de, 0xcb89, "MacBookPro 7,1", CS420X_MBP55),
395 /*SND_PCI_QUIRK(0x8086, 0x7270, "IMac 27 Inch", CS420X_IMAC27),*/
398 SND_PCI_QUIRK(0x106b, 0x0600, "iMac 14,1", CS420X_IMAC27_122),
399 SND_PCI_QUIRK(0x106b, 0x0900, "iMac 12,1", CS420X_IMAC27_122),
400 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
401 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
402 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
403 SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
404 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
405 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
410 { 0x09, 0x012b4050 },
411 { 0x0a, 0x90100141 },
412 { 0x0b, 0x90100140 },
413 { 0x0c, 0x018b3020 },
414 { 0x0d, 0x90a00110 },
415 { 0x0e, 0x400000f0 },
416 { 0x0f, 0x01cbe030 },
417 { 0x10, 0x014be060 },
418 { 0x12, 0x400000f0 },
419 { 0x15, 0x400000f0 },
424 { 0x09, 0x012b4030 },
425 { 0x0a, 0x90100121 },
426 { 0x0b, 0x90100120 },
427 { 0x0c, 0x400000f0 },
428 { 0x0d, 0x90a00110 },
429 { 0x0e, 0x400000f0 },
430 { 0x0f, 0x400000f0 },
431 { 0x10, 0x014be040 },
432 { 0x12, 0x400000f0 },
433 { 0x15, 0x400000f0 },
438 { 0x09, 0x012b4050 },
439 { 0x0a, 0x90100140 },
440 { 0x0b, 0x90100142 },
441 { 0x0c, 0x018b3020 },
442 { 0x0d, 0x90a00110 },
443 { 0x0e, 0x400000f0 },
444 { 0x0f, 0x01cbe030 },
445 { 0x10, 0x014be060 },
446 { 0x12, 0x01ab9070 },
447 { 0x15, 0x400000f0 },
452 { 0x0d, 0x40ab90f0 },
453 { 0x0e, 0x90a600f0 },
454 { 0x12, 0x50a600f0 },
459 { 0x09, 0x012b4030 }, /* HP */
460 { 0x0a, 0x400000f0 },
461 { 0x0b, 0x90100120 }, /* speaker */
462 { 0x0c, 0x400000f0 },
463 { 0x0d, 0x90a00110 }, /* mic */
464 { 0x0e, 0x400000f0 },
465 { 0x0f, 0x400000f0 },
466 { 0x10, 0x400000f0 },
467 { 0x12, 0x400000f0 },
468 { 0x15, 0x400000f0 },
473 { 0x10, 0x032120f0 }, /* HP */
474 { 0x11, 0x500000f0 },
475 { 0x12, 0x90100010 }, /* Speaker */
476 { 0x13, 0x500000f0 },
477 { 0x14, 0x500000f0 },
478 { 0x15, 0x770000f0 },
479 { 0x16, 0x770000f0 },
480 { 0x17, 0x430000f0 },
481 { 0x18, 0x43ab9030 }, /* Mic */
482 { 0x19, 0x770000f0 },
483 { 0x1a, 0x770000f0 },
484 { 0x1b, 0x770000f0 },
485 { 0x1c, 0x90a00090 },
486 { 0x1d, 0x500000f0 },
487 { 0x1e, 0x500000f0 },
488 { 0x1f, 0x500000f0 },
489 { 0x20, 0x500000f0 },
490 { 0x21, 0x430000f0 },
491 { 0x22, 0x430000f0 },
556 {0x11, AC_VERB_SET_COEF_INDEX, IDX_ADC_CFG},
557 {0x11, AC_VERB_SET_PROC_COEF, 0x102a},
604 if (err < 0) in patch_cs420x()
609 return 0; in patch_cs420x()
637 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS4208_MAC_AUTO),
643 SND_PCI_QUIRK(0x106b, 0x5e00, "MacBookPro 11,2", CS4208_MBP11),
644 SND_PCI_QUIRK(0x106b, 0x6c00, "MacMini 7,1", CS4208_MACMINI),
645 SND_PCI_QUIRK(0x106b, 0x7100, "MacBookAir 6,1", CS4208_MBA6),
646 SND_PCI_QUIRK(0x106b, 0x7200, "MacBookAir 6,2", CS4208_MBA6),
647 SND_PCI_QUIRK(0x106b, 0x7b00, "MacBookPro 12,1", CS4208_MBP11),
656 spec->gpio_eapd_hp = 0; in cs4208_fixup_gpio0()
684 { 0x18, 0x00ab9150 }, /* mic (audio-in) jack: disable detect */ in cs4208_fixup_macmini()
685 { 0x21, 0x004be140 }, /* SPDIF: disable detect */ in cs4208_fixup_macmini()
690 /* HP pin (0x10) has an inverted detection */ in cs4208_fixup_macmini()
702 hda_nid_t pin = spec->gen.autocfg.dig_out_pins[0]; in cs4208_spdif_sw_put()
703 int pinctl = ucontrol->value.integer.value[0] ? PIN_OUT : 0; in cs4208_spdif_sw_put()
717 if (!spec->gen.autocfg.dig_out_pins[0]) in cs4208_fixup_spdif_switch()
756 /* correct the 0dB offset of input pins */
763 caps |= 0x02; in cs4208_fix_amp_caps()
778 /* exclude NID 0x10 (HP) from output volumes due to different steps */ in patch_cs4208()
779 spec->gen.out_vol_mask = 1ULL << 0x10; in patch_cs4208()
785 snd_hda_override_wcaps(codec, 0x18, in patch_cs4208()
786 get_wcaps(codec, 0x18) | AC_WCAP_STEREO); in patch_cs4208()
787 cs4208_fix_amp_caps(codec, 0x18); in patch_cs4208()
788 cs4208_fix_amp_caps(codec, 0x1b); in patch_cs4208()
789 cs4208_fix_amp_caps(codec, 0x1c); in patch_cs4208()
792 if (err < 0) in patch_cs4208()
797 return 0; in patch_cs4208()
821 SND_PCI_QUIRK(0x8086, 0x5001, "DP45SG/CDB4210", CS421X_CDB4210),
828 { 0x05, 0x0321401f },
829 { 0x06, 0x90170010 },
830 { 0x07, 0x03813031 },
831 { 0x08, 0xb7a70037 },
832 { 0x09, 0xb7a6003e },
833 { 0x0a, 0x034510f0 },
839 { 0x05, 0x022120f0 },
840 { 0x06, 0x901700f0 },
841 { 0x07, 0x02a120f0 },
842 { 0x08, 0x77a70037 },
843 { 0x09, 0x77a6003e },
844 { 0x0a, 0x434510f0 },
875 {0x0B, AC_VERB_SET_PROC_STATE, 1},
876 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DEV_CFG},
879 PDREF=0
881 {0x0B, AC_VERB_SET_PROC_COEF, 0x0001 },
883 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_ADC_CFG},
885 {0x0B, AC_VERB_SET_PROC_COEF, 0x0002 },
887 {0x0B, AC_VERB_SET_COEF_INDEX, CS421X_IDX_DAC_CFG},
888 {0x0B, AC_VERB_SET_PROC_COEF,
889 (0x0002 /* DAC SZCMode = Digital Soft Ramp */
890 | 0x0004 /* Mute DAC on FIFO error */
891 | 0x0008 /* Enable DAC High Pass Filter */
912 {0x0B, AC_VERB_SET_PROC_STATE, 0x01}, /* VPW: processing on */
914 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0006},
915 {0x0B, AC_VERB_SET_PROC_COEF, 0x9999}, /* Test mode: on */
917 {0x0B, AC_VERB_SET_COEF_INDEX, 0x000A},
918 {0x0B, AC_VERB_SET_PROC_COEF, 0x14CB}, /* Chop double */
920 {0x0B, AC_VERB_SET_COEF_INDEX, 0x0011},
921 {0x0B, AC_VERB_SET_PROC_COEF, 0xA2D0}, /* Increase ADC current */
923 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001A},
924 {0x0B, AC_VERB_SET_PROC_COEF, 0x02A9}, /* Mute speaker */
926 {0x0B, AC_VERB_SET_COEF_INDEX, 0x001B},
927 {0x0B, AC_VERB_SET_PROC_COEF, 0X1006}, /* Remove noise */
933 static const DECLARE_TLV_DB_SCALE(cs421x_speaker_boost_db_scale, 900, 300, 0);
940 uinfo->value.integer.min = 0; in cs421x_boost_vol_info()
942 return 0; in cs421x_boost_vol_info()
950 ucontrol->value.integer.value[0] = in cs421x_boost_vol_get()
951 cs_vendor_coef_get(codec, CS421X_IDX_SPK_CTL) & 0x0003; in cs421x_boost_vol_get()
952 return 0; in cs421x_boost_vol_get()
960 unsigned int vol = ucontrol->value.integer.value[0]; in cs421x_boost_vol_put()
965 coef &= ~0x0003; in cs421x_boost_vol_put()
966 coef |= (vol & 0x0003); in cs421x_boost_vol_put()
968 return 0; in cs421x_boost_vol_put()
996 coef |= 0x0008; /* B1,B2 are GPIOs */ in cs4210_pinmux_init()
998 coef &= ~0x0008; in cs4210_pinmux_init()
1001 coef |= 0x0010; /* B2 is SENSE_B, not inverted */ in cs4210_pinmux_init()
1003 coef &= ~0x0010; in cs4210_pinmux_init()
1025 hda_nid_t spdif_pin = spec->gen.autocfg.dig_out_pins[0]; in cs4210_spdif_automute()
1038 snd_hda_set_pin_ctl(codec, spdif_pin, spdif_present ? PIN_OUT : 0); in cs4210_spdif_automute()
1049 for (i = 0; i < cfg->dig_outs; i++) { in parse_cs421x_digital()
1072 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, in cs421x_init()
1074 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, in cs421x_init()
1076 snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, in cs421x_init()
1084 return 0; in cs421x_init()
1091 /* set the upper-limit for mixer amp to 0dB */ in fix_volume_caps()
1093 caps &= ~(0x7f << AC_AMPCAP_NUM_STEPS_SHIFT); in fix_volume_caps()
1094 caps |= ((caps >> AC_AMPCAP_OFFSET_SHIFT) & 0x7f) in fix_volume_caps()
1107 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0); in cs421x_parse_auto_config()
1108 if (err < 0) in cs421x_parse_auto_config()
1112 if (err < 0) in cs421x_parse_auto_config()
1124 return 0; in cs421x_parse_auto_config()
1139 snd_hda_codec_write(codec, CS4210_DAC_NID, 0, in cs421x_suspend()
1141 snd_hda_codec_write(codec, CS4210_ADC_NID, 0, in cs421x_suspend()
1146 coef |= 0x0004; /* PDREF */ in cs421x_suspend()
1150 return 0; in cs421x_suspend()
1189 if (err < 0) in patch_cs4210()
1194 return 0; in patch_cs4210()
1213 if (err < 0) in patch_cs4213()
1216 return 0; in patch_cs4213()
1228 HDA_CODEC_ENTRY(0x10134206, "CS4206", patch_cs420x),
1229 HDA_CODEC_ENTRY(0x10134207, "CS4207", patch_cs420x),
1230 HDA_CODEC_ENTRY(0x10134208, "CS4208", patch_cs4208),
1231 HDA_CODEC_ENTRY(0x10134210, "CS4210", patch_cs4210),
1232 HDA_CODEC_ENTRY(0x10134213, "CS4213", patch_cs4213),