1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
12 #include "clk-regmap.h"
13 #include "clk-hfpll.h"
23 	struct hfpll_data const *hd = h->d;  in __clk_hfpll_init_once()
24 	struct regmap *regmap = h->clkr.regmap;  in __clk_hfpll_init_once()
26 	if (likely(h->init_done))  in __clk_hfpll_init_once()
30 	if (hd->config_val)  in __clk_hfpll_init_once()
31 		regmap_write(regmap, hd->config_reg, hd->config_val);  in __clk_hfpll_init_once()
32 	regmap_write(regmap, hd->m_reg, 0);  in __clk_hfpll_init_once()
33 	regmap_write(regmap, hd->n_reg, 1);  in __clk_hfpll_init_once()
35 	if (hd->user_reg) {  in __clk_hfpll_init_once()
36 		u32 regval = hd->user_val;  in __clk_hfpll_init_once()
42 		if (hd->user_vco_mask && rate > hd->low_vco_max_rate)  in __clk_hfpll_init_once()
43 			regval |= hd->user_vco_mask;  in __clk_hfpll_init_once()
44 		regmap_write(regmap, hd->user_reg, regval);  in __clk_hfpll_init_once()
47 	if (hd->droop_reg)  in __clk_hfpll_init_once()
48 		regmap_write(regmap, hd->droop_reg, hd->droop_val);  in __clk_hfpll_init_once()
50 	h->init_done = true;  in __clk_hfpll_init_once()
56 	struct hfpll_data const *hd = h->d;  in __clk_hfpll_enable()
57 	struct regmap *regmap = h->clkr.regmap;  in __clk_hfpll_enable()
63 	regmap_update_bits(regmap, hd->mode_reg, PLL_BYPASSNL, PLL_BYPASSNL);  in __clk_hfpll_enable()
67 	 * de-asserting the reset. Delay 10us just to be safe.  in __clk_hfpll_enable()
71 	/* De-assert active-low PLL reset. */  in __clk_hfpll_enable()
72 	regmap_update_bits(regmap, hd->mode_reg, PLL_RESET_N, PLL_RESET_N);  in __clk_hfpll_enable()
75 	if (hd->status_reg)  in __clk_hfpll_enable()
80 		regmap_read_poll_timeout(regmap, hd->status_reg, val,  in __clk_hfpll_enable()
81 					 !(val & BIT(hd->lock_bit)), 0,  in __clk_hfpll_enable()
87 	regmap_update_bits(regmap, hd->mode_reg, PLL_OUTCTRL, PLL_OUTCTRL);  in __clk_hfpll_enable()
90 /* Enable an already-configured HFPLL. */
95 	struct hfpll_data const *hd = h->d;  in clk_hfpll_enable()
96 	struct regmap *regmap = h->clkr.regmap;  in clk_hfpll_enable()
99 	spin_lock_irqsave(&h->lock, flags);  in clk_hfpll_enable()
100 	regmap_read(regmap, hd->mode_reg, &mode);  in clk_hfpll_enable()
103 	spin_unlock_irqrestore(&h->lock, flags);  in clk_hfpll_enable()
110 	struct hfpll_data const *hd = h->d;  in __clk_hfpll_disable()
111 	struct regmap *regmap = h->clkr.regmap;  in __clk_hfpll_disable()
117 	regmap_update_bits(regmap, hd->mode_reg,  in __clk_hfpll_disable()
126 	spin_lock_irqsave(&h->lock, flags);  in clk_hfpll_disable()
128 	spin_unlock_irqrestore(&h->lock, flags);  in clk_hfpll_disable()
134 	struct hfpll_data const *hd = h->d;  in clk_hfpll_determine_rate()
137 	req->rate = clamp(req->rate, hd->min_rate, hd->max_rate);  in clk_hfpll_determine_rate()
139 	rrate = DIV_ROUND_UP(req->rate, req->best_parent_rate) * req->best_parent_rate;  in clk_hfpll_determine_rate()
140 	if (rrate > hd->max_rate)  in clk_hfpll_determine_rate()
141 		rrate -= req->best_parent_rate;  in clk_hfpll_determine_rate()
143 	req->rate = rrate;  in clk_hfpll_determine_rate()
155 	struct hfpll_data const *hd = h->d;  in clk_hfpll_set_rate()
156 	struct regmap *regmap = h->clkr.regmap;  in clk_hfpll_set_rate()
163 	spin_lock_irqsave(&h->lock, flags);  in clk_hfpll_set_rate()
165 	enabled = __clk_is_enabled(hw->clk);  in clk_hfpll_set_rate()
170 	if (hd->user_reg && hd->user_vco_mask) {  in clk_hfpll_set_rate()
171 		regmap_read(regmap, hd->user_reg, &val);  in clk_hfpll_set_rate()
172 		if (rate <= hd->low_vco_max_rate)  in clk_hfpll_set_rate()
173 			val &= ~hd->user_vco_mask;  in clk_hfpll_set_rate()
175 			val |= hd->user_vco_mask;  in clk_hfpll_set_rate()
176 		regmap_write(regmap, hd->user_reg, val);  in clk_hfpll_set_rate()
179 	regmap_write(regmap, hd->l_reg, l_val);  in clk_hfpll_set_rate()
184 	spin_unlock_irqrestore(&h->lock, flags);  in clk_hfpll_set_rate()
193 	struct hfpll_data const *hd = h->d;  in clk_hfpll_recalc_rate()
194 	struct regmap *regmap = h->clkr.regmap;  in clk_hfpll_recalc_rate()
197 	regmap_read(regmap, hd->l_reg, &l_val);  in clk_hfpll_recalc_rate()
205 	struct hfpll_data const *hd = h->d;  in clk_hfpll_init()
206 	struct regmap *regmap = h->clkr.regmap;  in clk_hfpll_init()
209 	regmap_read(regmap, hd->mode_reg, &mode);  in clk_hfpll_init()
215 	if (hd->status_reg) {  in clk_hfpll_init()
216 		regmap_read(regmap, hd->status_reg, &status);  in clk_hfpll_init()
217 		if (!(status & BIT(hd->lock_bit))) {  in clk_hfpll_init()
219 			     __clk_get_name(hw->clk));  in clk_hfpll_init()
231 	struct hfpll_data const *hd = h->d;  in hfpll_is_enabled()
232 	struct regmap *regmap = h->clkr.regmap;  in hfpll_is_enabled()
235 	regmap_read(regmap, hd->mode_reg, &mode);  in hfpll_is_enabled()