Lines Matching full:ohci
3 * Driver for OHCI 1394 controllers
42 #include "ohci.h"
44 #define ohci_info(ohci, f, args...) dev_info(ohci->card.device, f, ##args) argument
45 #define ohci_notice(ohci, f, args...) dev_notice(ohci->card.device, f, ##args) argument
46 #define ohci_err(ohci, f, args...) dev_err(ohci->card.device, f, ##args) argument
88 struct fw_ohci *ohci; member
118 struct fw_ohci *ohci; member
291 static bool has_reboot_by_cycle_timer_read_quirk(const struct fw_ohci *ohci) in has_reboot_by_cycle_timer_read_quirk() argument
293 return !!(ohci->quirks & QUIRK_REBOOT_BY_CYCLE_TIMER_READ); in has_reboot_by_cycle_timer_read_quirk()
323 #define has_reboot_by_cycle_timer_read_quirk(ohci) false argument
411 static void log_irqs(struct fw_ohci *ohci, u32 evt) in log_irqs() argument
421 ohci_notice(ohci, "IRQ %08x%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n", evt, in log_irqs()
460 static void log_selfids(struct fw_ohci *ohci, int generation, int self_id_count) in log_selfids() argument
467 ohci_notice(ohci, "%d selfIDs, generation %d, local node ID %04x\n", in log_selfids()
468 self_id_count, generation, ohci->node_id); in log_selfids()
470 for (s = ohci->self_id_buffer; self_id_count--; ++s) in log_selfids()
472 ohci_notice(ohci, in log_selfids()
479 ohci_notice(ohci, in log_selfids()
516 static void log_ar_at_event(struct fw_ohci *ohci, in log_ar_at_event() argument
529 ohci_notice(ohci, "A%c evt_bus_reset, generation %d\n", in log_ar_at_event()
549 ohci_notice(ohci, "A%c %s, %s\n", in log_ar_at_event()
553 ohci_notice(ohci, "A%c %s, PHY %08x %08x\n", in log_ar_at_event()
557 ohci_notice(ohci, in log_ar_at_event()
564 ohci_notice(ohci, in log_ar_at_event()
572 static inline void reg_write(const struct fw_ohci *ohci, int offset, u32 data) in reg_write() argument
574 writel(data, ohci->registers + offset); in reg_write()
577 static inline u32 reg_read(const struct fw_ohci *ohci, int offset) in reg_read() argument
579 return readl(ohci->registers + offset); in reg_read()
582 static inline void flush_writes(const struct fw_ohci *ohci) in flush_writes() argument
585 reg_read(ohci, OHCI1394_Version); in flush_writes()
590 * read_paged_phy_reg() require the caller to hold ohci->phy_reg_mutex.
594 static int read_phy_reg(struct fw_ohci *ohci, int addr) in read_phy_reg() argument
599 reg_write(ohci, OHCI1394_PhyControl, OHCI1394_PhyControl_Read(addr)); in read_phy_reg()
601 val = reg_read(ohci, OHCI1394_PhyControl); in read_phy_reg()
615 ohci_err(ohci, "failed to read phy reg %d\n", addr); in read_phy_reg()
621 static int write_phy_reg(const struct fw_ohci *ohci, int addr, u32 val) in write_phy_reg() argument
625 reg_write(ohci, OHCI1394_PhyControl, in write_phy_reg()
628 val = reg_read(ohci, OHCI1394_PhyControl); in write_phy_reg()
638 ohci_err(ohci, "failed to write phy reg %d, val %u\n", addr, val); in write_phy_reg()
644 static int update_phy_reg(struct fw_ohci *ohci, int addr, in update_phy_reg() argument
647 int ret = read_phy_reg(ohci, addr); in update_phy_reg()
658 return write_phy_reg(ohci, addr, (ret & ~clear_bits) | set_bits); in update_phy_reg()
661 static int read_paged_phy_reg(struct fw_ohci *ohci, int page, int addr) in read_paged_phy_reg() argument
665 ret = update_phy_reg(ohci, 7, PHY_PAGE_SELECT, page << 5); in read_paged_phy_reg()
669 return read_phy_reg(ohci, addr); in read_paged_phy_reg()
674 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_phy_reg() local
677 mutex_lock(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
678 ret = read_phy_reg(ohci, addr); in ohci_read_phy_reg()
679 mutex_unlock(&ohci->phy_reg_mutex); in ohci_read_phy_reg()
687 struct fw_ohci *ohci = fw_ohci(card); in ohci_update_phy_reg() local
690 mutex_lock(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
691 ret = update_phy_reg(ohci, addr, clear_bits, set_bits); in ohci_update_phy_reg()
692 mutex_unlock(&ohci->phy_reg_mutex); in ohci_update_phy_reg()
717 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ar_context_link_page()
722 struct device *dev = ctx->ohci->card.device; in ar_context_release()
739 struct fw_ohci *ohci = ctx->ohci; in ar_context_abort() local
741 if (reg_read(ohci, CONTROL_CLEAR(ctx->regs)) & CONTEXT_RUN) { in ar_context_abort()
742 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in ar_context_abort()
743 flush_writes(ohci); in ar_context_abort()
745 ohci_err(ohci, "AR error: %s; DMA stopped\n", error_msg); in ar_context_abort()
827 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
833 dma_sync_single_for_cpu(ctx->ohci->card.device, in ar_sync_buffers_for_cpu()
840 (ohci->quirks & QUIRK_BE_HEADERS ? (__force __u32)(v) : le32_to_cpu(v))
847 struct fw_ohci *ohci = ctx->ohci; in handle_ar_packet() local
906 p.generation = ohci->request_generation; in handle_ar_packet()
908 log_ar_at_event(ohci, 'R', p.speed, p.header, evt); in handle_ar_packet()
919 * The OHCI bus reset handler synthesizes a PHY packet with in handle_ar_packet()
932 if (!(ohci->quirks & QUIRK_RESET_PACKET)) in handle_ar_packet()
933 ohci->request_generation = (p.header[2] >> 16) & 0xff; in handle_ar_packet()
934 } else if (ctx == &ohci->ar_request_ctx) { in handle_ar_packet()
935 fw_core_handle_request(&ohci->card, &p); in handle_ar_packet()
937 fw_core_handle_response(&ohci->card, &p); in handle_ar_packet()
963 dma_sync_single_for_device(ctx->ohci->card.device, in ar_recycle_buffers()
1017 static int ar_context_init(struct ar_context *ctx, struct fw_ohci *ohci, in ar_context_init() argument
1020 struct device *dev = ohci->card.device; in ar_context_init()
1027 ctx->ohci = ohci; in ar_context_init()
1048 ctx->descriptors = ohci->misc_buffer + descriptors_offset; in ar_context_init()
1049 ctx->descriptors_bus = ohci->misc_buffer_bus + descriptors_offset; in ar_context_init()
1079 reg_write(ctx->ohci, COMMAND_PTR(ctx->regs), ctx->descriptors_bus | 1); in ar_context_run()
1080 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN); in ar_context_run()
1131 spin_lock_irqsave(&ctx->ohci->lock, flags); in context_tasklet()
1133 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in context_tasklet()
1141 * context. Must be called with ohci->lock held.
1156 desc = dmam_alloc_coherent(ctx->ohci->card.device, PAGE_SIZE, &bus_addr, GFP_ATOMIC); in context_add_buffer()
1177 static int context_init(struct context *ctx, struct fw_ohci *ohci, in context_init() argument
1180 ctx->ohci = ohci; in context_init()
1212 struct fw_card *card = &ctx->ohci->card; in context_release()
1221 /* Must be called with ohci->lock held */
1255 struct fw_ohci *ohci = ctx->ohci; in context_run() local
1257 reg_write(ohci, COMMAND_PTR(ctx->regs), in context_run()
1259 reg_write(ohci, CONTROL_CLEAR(ctx->regs), ~0); in context_run()
1260 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_RUN | extra); in context_run()
1262 flush_writes(ohci); in context_run()
1290 if (unlikely(ctx->ohci->quirks & QUIRK_IR_WAKE) && in context_append()
1303 struct fw_ohci *ohci = ctx->ohci; in context_stop() local
1307 reg_write(ohci, CONTROL_CLEAR(ctx->regs), CONTEXT_RUN); in context_stop()
1311 reg = reg_read(ohci, CONTROL_SET(ctx->regs)); in context_stop()
1318 ohci_err(ohci, "DMA context still active (0x%08x)\n", reg); in context_stop()
1334 struct fw_ohci *ohci = ctx->ohci; in at_context_queue_packet() local
1413 payload_bus = dma_map_single(ohci->card.device, in at_context_queue_packet()
1417 if (dma_mapping_error(ohci->card.device, payload_bus)) { in at_context_queue_packet()
1443 if (ohci->generation != packet->generation) { in at_context_queue_packet()
1445 dma_unmap_single(ohci->card.device, payload_bus, in at_context_queue_packet()
1454 reg_write(ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in at_context_queue_packet()
1478 struct fw_ohci *ohci = context->ohci; in handle_at_packet() local
1492 dma_unmap_single(ohci->card.device, packet->payload_bus, in handle_at_packet()
1498 log_ar_at_event(ohci, 'T', packet->speed, packet->header, evt); in handle_at_packet()
1548 packet->callback(packet, &ohci->card, packet->ack); in handle_at_packet()
1559 static void handle_local_rom(struct fw_ohci *ohci, in handle_local_rom() argument
1580 (void *) ohci->config_rom + i, length); in handle_local_rom()
1583 fw_core_handle_response(&ohci->card, &response); in handle_local_rom()
1586 static void handle_local_lock(struct fw_ohci *ohci, in handle_local_lock() argument
1613 reg_write(ohci, OHCI1394_CSRData, lock_data); in handle_local_lock()
1614 reg_write(ohci, OHCI1394_CSRCompareData, lock_arg); in handle_local_lock()
1615 reg_write(ohci, OHCI1394_CSRControl, sel); in handle_local_lock()
1618 if (reg_read(ohci, OHCI1394_CSRControl) & 0x80000000) { in handle_local_lock()
1619 lock_old = cpu_to_be32(reg_read(ohci, in handle_local_lock()
1627 ohci_err(ohci, "swap not done (CSR lock timeout)\n"); in handle_local_lock()
1631 fw_core_handle_response(&ohci->card, &response); in handle_local_lock()
1638 if (ctx == &ctx->ohci->at_request_ctx) { in handle_local_request()
1640 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1651 handle_local_rom(ctx->ohci, packet, csr); in handle_local_request()
1657 handle_local_lock(ctx->ohci, packet, csr); in handle_local_request()
1660 if (ctx == &ctx->ohci->at_request_ctx) in handle_local_request()
1661 fw_core_handle_request(&ctx->ohci->card, packet); in handle_local_request()
1663 fw_core_handle_response(&ctx->ohci->card, packet); in handle_local_request()
1667 if (ctx == &ctx->ohci->at_response_ctx) { in handle_local_request()
1669 packet->callback(packet, &ctx->ohci->card, packet->ack); in handle_local_request()
1673 static u32 get_cycle_time(struct fw_ohci *ohci);
1680 spin_lock_irqsave(&ctx->ohci->lock, flags); in at_context_transmit()
1682 if (HEADER_GET_DESTINATION(packet->header[0]) == ctx->ohci->node_id && in at_context_transmit()
1683 ctx->ohci->generation == packet->generation) { in at_context_transmit()
1684 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1687 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ctx->ohci)); in at_context_transmit()
1694 spin_unlock_irqrestore(&ctx->ohci->lock, flags); in at_context_transmit()
1698 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ctx->ohci)); in at_context_transmit()
1700 packet->callback(packet, &ctx->ohci->card, packet->ack); in at_context_transmit()
1704 static void detect_dead_context(struct fw_ohci *ohci, in detect_dead_context() argument
1709 ctl = reg_read(ohci, CONTROL_SET(regs)); in detect_dead_context()
1711 ohci_err(ohci, "DMA context %s has stopped, error code: %s\n", in detect_dead_context()
1715 static void handle_dead_contexts(struct fw_ohci *ohci) in handle_dead_contexts() argument
1720 detect_dead_context(ohci, "ATReq", OHCI1394_AsReqTrContextBase); in handle_dead_contexts()
1721 detect_dead_context(ohci, "ATRsp", OHCI1394_AsRspTrContextBase); in handle_dead_contexts()
1722 detect_dead_context(ohci, "ARReq", OHCI1394_AsReqRcvContextBase); in handle_dead_contexts()
1723 detect_dead_context(ohci, "ARRsp", OHCI1394_AsRspRcvContextBase); in handle_dead_contexts()
1725 if (!(ohci->it_context_support & (1 << i))) in handle_dead_contexts()
1728 detect_dead_context(ohci, name, OHCI1394_IsoXmitContextBase(i)); in handle_dead_contexts()
1731 if (!(ohci->ir_context_support & (1 << i))) in handle_dead_contexts()
1734 detect_dead_context(ohci, name, OHCI1394_IsoRcvContextBase(i)); in handle_dead_contexts()
1765 static u32 get_cycle_time(struct fw_ohci *ohci) in get_cycle_time() argument
1772 if (has_reboot_by_cycle_timer_read_quirk(ohci)) in get_cycle_time()
1775 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1777 if (ohci->quirks & QUIRK_CYCLE_TIMER) { in get_cycle_time()
1780 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1784 c2 = reg_read(ohci, OHCI1394_IsochronousCycleTimer); in get_cycle_time()
1804 static u32 update_bus_time(struct fw_ohci *ohci) in update_bus_time() argument
1806 u32 cycle_time_seconds = get_cycle_time(ohci) >> 25; in update_bus_time()
1808 if (unlikely(!ohci->bus_time_running)) { in update_bus_time()
1809 reg_write(ohci, OHCI1394_IntMaskSet, OHCI1394_cycle64Seconds); in update_bus_time()
1810 ohci->bus_time = (lower_32_bits(ktime_get_seconds()) & ~0x7f) | in update_bus_time()
1812 ohci->bus_time_running = true; in update_bus_time()
1815 if ((ohci->bus_time & 0x40) != (cycle_time_seconds & 0x40)) in update_bus_time()
1816 ohci->bus_time += 0x40; in update_bus_time()
1818 return ohci->bus_time | cycle_time_seconds; in update_bus_time()
1821 static int get_status_for_port(struct fw_ohci *ohci, int port_index) in get_status_for_port() argument
1825 mutex_lock(&ohci->phy_reg_mutex); in get_status_for_port()
1826 reg = write_phy_reg(ohci, 7, port_index); in get_status_for_port()
1828 reg = read_phy_reg(ohci, 8); in get_status_for_port()
1829 mutex_unlock(&ohci->phy_reg_mutex); in get_status_for_port()
1842 static int get_self_id_pos(struct fw_ohci *ohci, u32 self_id, in get_self_id_pos() argument
1849 entry = ohci->self_id_buffer[i]; in get_self_id_pos()
1858 static int initiated_reset(struct fw_ohci *ohci) in initiated_reset() argument
1863 mutex_lock(&ohci->phy_reg_mutex); in initiated_reset()
1864 reg = write_phy_reg(ohci, 7, 0xe0); /* Select page 7 */ in initiated_reset()
1866 reg = read_phy_reg(ohci, 8); in initiated_reset()
1868 reg = write_phy_reg(ohci, 8, reg); /* set PMODE bit */ in initiated_reset()
1870 reg = read_phy_reg(ohci, 12); /* read register 12 */ in initiated_reset()
1879 mutex_unlock(&ohci->phy_reg_mutex); in initiated_reset()
1888 static int find_and_insert_self_id(struct fw_ohci *ohci, int self_id_count) in find_and_insert_self_id() argument
1894 reg = reg_read(ohci, OHCI1394_NodeID); in find_and_insert_self_id()
1896 ohci_notice(ohci, in find_and_insert_self_id()
1902 reg = ohci_read_phy_reg(&ohci->card, 4); in find_and_insert_self_id()
1907 reg = ohci_read_phy_reg(&ohci->card, 1); in find_and_insert_self_id()
1913 status = get_status_for_port(ohci, i); in find_and_insert_self_id()
1919 self_id |= initiated_reset(ohci); in find_and_insert_self_id()
1921 pos = get_self_id_pos(ohci, self_id, self_id_count); in find_and_insert_self_id()
1923 memmove(&(ohci->self_id_buffer[pos+1]), in find_and_insert_self_id()
1924 &(ohci->self_id_buffer[pos]), in find_and_insert_self_id()
1925 (self_id_count - pos) * sizeof(*ohci->self_id_buffer)); in find_and_insert_self_id()
1926 ohci->self_id_buffer[pos] = self_id; in find_and_insert_self_id()
1934 struct fw_ohci *ohci = in bus_reset_work() local
1942 reg = reg_read(ohci, OHCI1394_NodeID); in bus_reset_work()
1944 ohci_notice(ohci, in bus_reset_work()
1949 ohci_notice(ohci, "malconfigured bus\n"); in bus_reset_work()
1952 ohci->node_id = reg & (OHCI1394_NodeID_busNumber | in bus_reset_work()
1956 if (!(ohci->is_root && is_new_root)) in bus_reset_work()
1957 reg_write(ohci, OHCI1394_LinkControlSet, in bus_reset_work()
1959 ohci->is_root = is_new_root; in bus_reset_work()
1961 reg = reg_read(ohci, OHCI1394_SelfIDCount); in bus_reset_work()
1963 ohci_notice(ohci, "self ID receive error\n"); in bus_reset_work()
1975 ohci_notice(ohci, "bad selfIDSize (%08x)\n", reg); in bus_reset_work()
1979 generation = (cond_le32_to_cpu(ohci->self_id[0]) >> 16) & 0xff; in bus_reset_work()
1983 u32 id = cond_le32_to_cpu(ohci->self_id[i]); in bus_reset_work()
1984 u32 id2 = cond_le32_to_cpu(ohci->self_id[i + 1]); in bus_reset_work()
1995 ohci_notice(ohci, "ignoring spurious self IDs\n"); in bus_reset_work()
2000 ohci_notice(ohci, "bad self ID %d/%d (%08x != ~%08x)\n", in bus_reset_work()
2004 ohci->self_id_buffer[j] = id; in bus_reset_work()
2007 if (ohci->quirks & QUIRK_TI_SLLZ059) { in bus_reset_work()
2008 self_id_count = find_and_insert_self_id(ohci, self_id_count); in bus_reset_work()
2010 ohci_notice(ohci, in bus_reset_work()
2017 ohci_notice(ohci, "no self IDs\n"); in bus_reset_work()
2027 * will read out inconsistent data. The OHCI specification in bus_reset_work()
2036 new_generation = (reg_read(ohci, OHCI1394_SelfIDCount) >> 16) & 0xff; in bus_reset_work()
2038 ohci_notice(ohci, "new bus reset, discarding self ids\n"); in bus_reset_work()
2043 spin_lock_irq(&ohci->lock); in bus_reset_work()
2045 ohci->generation = -1; /* prevent AT packet queueing */ in bus_reset_work()
2046 context_stop(&ohci->at_request_ctx); in bus_reset_work()
2047 context_stop(&ohci->at_response_ctx); in bus_reset_work()
2049 spin_unlock_irq(&ohci->lock); in bus_reset_work()
2052 * Per OHCI 1.2 draft, clause 7.2.3.3, hardware may leave unsent in bus_reset_work()
2054 * Some OHCI 1.1 controllers (JMicron) apparently require this too. in bus_reset_work()
2056 at_context_flush(&ohci->at_request_ctx); in bus_reset_work()
2057 at_context_flush(&ohci->at_response_ctx); in bus_reset_work()
2059 spin_lock_irq(&ohci->lock); in bus_reset_work()
2061 ohci->generation = generation; in bus_reset_work()
2062 reg_write(ohci, OHCI1394_IntEventClear, OHCI1394_busReset); in bus_reset_work()
2064 if (ohci->quirks & QUIRK_RESET_PACKET) in bus_reset_work()
2065 ohci->request_generation = generation; in bus_reset_work()
2076 if (ohci->next_config_rom != NULL) { in bus_reset_work()
2077 if (ohci->next_config_rom != ohci->config_rom) { in bus_reset_work()
2078 free_rom = ohci->config_rom; in bus_reset_work()
2079 free_rom_bus = ohci->config_rom_bus; in bus_reset_work()
2081 ohci->config_rom = ohci->next_config_rom; in bus_reset_work()
2082 ohci->config_rom_bus = ohci->next_config_rom_bus; in bus_reset_work()
2083 ohci->next_config_rom = NULL; in bus_reset_work()
2091 reg_write(ohci, OHCI1394_BusOptions, in bus_reset_work()
2092 be32_to_cpu(ohci->config_rom[2])); in bus_reset_work()
2093 ohci->config_rom[0] = ohci->next_header; in bus_reset_work()
2094 reg_write(ohci, OHCI1394_ConfigROMhdr, in bus_reset_work()
2095 be32_to_cpu(ohci->next_header)); in bus_reset_work()
2099 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, ~0); in bus_reset_work()
2100 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, ~0); in bus_reset_work()
2103 spin_unlock_irq(&ohci->lock); in bus_reset_work()
2106 dmam_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, free_rom, free_rom_bus); in bus_reset_work()
2108 log_selfids(ohci, generation, self_id_count); in bus_reset_work()
2110 fw_core_handle_bus_reset(&ohci->card, ohci->node_id, generation, in bus_reset_work()
2111 self_id_count, ohci->self_id_buffer, in bus_reset_work()
2112 ohci->csr_state_setclear_abdicate); in bus_reset_work()
2113 ohci->csr_state_setclear_abdicate = false; in bus_reset_work()
2118 struct fw_ohci *ohci = data; in irq_handler() local
2122 event = reg_read(ohci, OHCI1394_IntEventClear); in irq_handler()
2129 * (OHCI 1.1 clauses 7.2.3.2 and 13.2.8.1) in irq_handler()
2131 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2133 log_irqs(ohci, event); in irq_handler()
2136 queue_work(selfid_workqueue, &ohci->bus_reset_work); in irq_handler()
2139 tasklet_schedule(&ohci->ar_request_ctx.tasklet); in irq_handler()
2142 tasklet_schedule(&ohci->ar_response_ctx.tasklet); in irq_handler()
2145 tasklet_schedule(&ohci->at_request_ctx.tasklet); in irq_handler()
2148 tasklet_schedule(&ohci->at_response_ctx.tasklet); in irq_handler()
2151 iso_event = reg_read(ohci, OHCI1394_IsoRecvIntEventClear); in irq_handler()
2152 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, iso_event); in irq_handler()
2157 &ohci->ir_context_list[i].context.tasklet); in irq_handler()
2163 iso_event = reg_read(ohci, OHCI1394_IsoXmitIntEventClear); in irq_handler()
2164 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, iso_event); in irq_handler()
2169 &ohci->it_context_list[i].context.tasklet); in irq_handler()
2175 ohci_err(ohci, "register access failure\n"); in irq_handler()
2178 reg_read(ohci, OHCI1394_PostedWriteAddressHi); in irq_handler()
2179 reg_read(ohci, OHCI1394_PostedWriteAddressLo); in irq_handler()
2180 reg_write(ohci, OHCI1394_IntEventClear, in irq_handler()
2183 ohci_err(ohci, "PCI posted write error\n"); in irq_handler()
2188 ohci_notice(ohci, "isochronous cycle too long\n"); in irq_handler()
2189 reg_write(ohci, OHCI1394_LinkControlSet, in irq_handler()
2201 ohci_notice(ohci, "isochronous cycle inconsistent\n"); in irq_handler()
2205 handle_dead_contexts(ohci); in irq_handler()
2208 spin_lock(&ohci->lock); in irq_handler()
2209 update_bus_time(ohci); in irq_handler()
2210 spin_unlock(&ohci->lock); in irq_handler()
2212 flush_writes(ohci); in irq_handler()
2217 static int software_reset(struct fw_ohci *ohci) in software_reset() argument
2222 reg_write(ohci, OHCI1394_HCControlSet, OHCI1394_HCControl_softReset); in software_reset()
2224 val = reg_read(ohci, OHCI1394_HCControlSet); in software_reset()
2246 static int configure_1394a_enhancements(struct fw_ohci *ohci) in configure_1394a_enhancements() argument
2252 if (!(reg_read(ohci, OHCI1394_HCControlSet) & in configure_1394a_enhancements()
2258 ret = read_phy_reg(ohci, 2); in configure_1394a_enhancements()
2262 ret = read_paged_phy_reg(ohci, 1, 8); in configure_1394a_enhancements()
2269 if (ohci->quirks & QUIRK_NO_1394A) in configure_1394a_enhancements()
2280 ret = update_phy_reg(ohci, 5, clear, set); in configure_1394a_enhancements()
2288 reg_write(ohci, offset, OHCI1394_HCControl_aPhyEnhanceEnable); in configure_1394a_enhancements()
2291 reg_write(ohci, OHCI1394_HCControlClear, in configure_1394a_enhancements()
2297 static int probe_tsb41ba3d(struct fw_ohci *ohci) in probe_tsb41ba3d() argument
2303 reg = read_phy_reg(ohci, 2); in probe_tsb41ba3d()
2310 reg = read_paged_phy_reg(ohci, 1, i + 10); in probe_tsb41ba3d()
2322 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable() local
2326 ret = software_reset(ohci); in ohci_enable()
2328 ohci_err(ohci, "failed to reset ohci card\n"); in ohci_enable()
2345 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2348 flush_writes(ohci); in ohci_enable()
2352 lps = reg_read(ohci, OHCI1394_HCControlSet) & in ohci_enable()
2357 ohci_err(ohci, "failed to set Link Power Status\n"); in ohci_enable()
2361 if (ohci->quirks & QUIRK_TI_SLLZ059) { in ohci_enable()
2362 ret = probe_tsb41ba3d(ohci); in ohci_enable()
2366 ohci_notice(ohci, "local TSB41BA3D phy\n"); in ohci_enable()
2368 ohci->quirks &= ~QUIRK_TI_SLLZ059; in ohci_enable()
2371 reg_write(ohci, OHCI1394_HCControlClear, in ohci_enable()
2374 reg_write(ohci, OHCI1394_SelfIDBuffer, ohci->self_id_bus); in ohci_enable()
2375 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2379 reg_write(ohci, OHCI1394_ATRetries, in ohci_enable()
2385 ohci->bus_time_running = false; in ohci_enable()
2388 if (ohci->ir_context_support & (1 << i)) in ohci_enable()
2389 reg_write(ohci, OHCI1394_IsoRcvContextControlClear(i), in ohci_enable()
2392 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in ohci_enable()
2394 reg_write(ohci, OHCI1394_InitialChannelsAvailableHi, in ohci_enable()
2400 reg_write(ohci, OHCI1394_FairnessControl, 0x3f); in ohci_enable()
2401 ohci->pri_req_max = reg_read(ohci, OHCI1394_FairnessControl) & 0x3f; in ohci_enable()
2402 reg_write(ohci, OHCI1394_FairnessControl, 0); in ohci_enable()
2403 card->priority_budget_implemented = ohci->pri_req_max != 0; in ohci_enable()
2405 reg_write(ohci, OHCI1394_PhyUpperBound, FW_MAX_PHYSICAL_RANGE >> 16); in ohci_enable()
2406 reg_write(ohci, OHCI1394_IntEventClear, ~0); in ohci_enable()
2407 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in ohci_enable()
2409 ret = configure_1394a_enhancements(ohci); in ohci_enable()
2425 * OHCI requires that ConfigROMhdr and BusOptions have valid in ohci_enable()
2438 ohci->next_config_rom = dmam_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_enable()
2439 &ohci->next_config_rom_bus, GFP_KERNEL); in ohci_enable()
2440 if (ohci->next_config_rom == NULL) in ohci_enable()
2443 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_enable()
2449 ohci->next_config_rom = ohci->config_rom; in ohci_enable()
2450 ohci->next_config_rom_bus = ohci->config_rom_bus; in ohci_enable()
2453 ohci->next_header = ohci->next_config_rom[0]; in ohci_enable()
2454 ohci->next_config_rom[0] = 0; in ohci_enable()
2455 reg_write(ohci, OHCI1394_ConfigROMhdr, 0); in ohci_enable()
2456 reg_write(ohci, OHCI1394_BusOptions, in ohci_enable()
2457 be32_to_cpu(ohci->next_config_rom[2])); in ohci_enable()
2458 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_enable()
2460 reg_write(ohci, OHCI1394_AsReqFilterHiSet, 0x80000000); in ohci_enable()
2474 reg_write(ohci, OHCI1394_IntMaskSet, irqs); in ohci_enable()
2476 reg_write(ohci, OHCI1394_HCControlSet, in ohci_enable()
2480 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_enable()
2484 ar_context_run(&ohci->ar_request_ctx); in ohci_enable()
2485 ar_context_run(&ohci->ar_response_ctx); in ohci_enable()
2487 flush_writes(ohci); in ohci_enable()
2490 fw_schedule_bus_reset(&ohci->card, false, true); in ohci_enable()
2498 struct fw_ohci *ohci; in ohci_set_config_rom() local
2502 ohci = fw_ohci(card); in ohci_set_config_rom()
2505 * When the OHCI controller is enabled, the config rom update in ohci_set_config_rom()
2507 * section 5.5.6 in the OHCI specification. in ohci_set_config_rom()
2509 * The OHCI controller caches the new config rom address in a in ohci_set_config_rom()
2527 * We use ohci->lock to avoid racing with the code that sets in ohci_set_config_rom()
2528 * ohci->next_config_rom to NULL (see bus_reset_work). in ohci_set_config_rom()
2531 next_config_rom = dmam_alloc_coherent(ohci->card.device, CONFIG_ROM_SIZE, in ohci_set_config_rom()
2536 spin_lock_irq(&ohci->lock); in ohci_set_config_rom()
2540 * push our new allocation into the ohci->next_config_rom in ohci_set_config_rom()
2549 if (ohci->next_config_rom == NULL) { in ohci_set_config_rom()
2550 ohci->next_config_rom = next_config_rom; in ohci_set_config_rom()
2551 ohci->next_config_rom_bus = next_config_rom_bus; in ohci_set_config_rom()
2555 copy_config_rom(ohci->next_config_rom, config_rom, length); in ohci_set_config_rom()
2557 ohci->next_header = config_rom[0]; in ohci_set_config_rom()
2558 ohci->next_config_rom[0] = 0; in ohci_set_config_rom()
2560 reg_write(ohci, OHCI1394_ConfigROMmap, ohci->next_config_rom_bus); in ohci_set_config_rom()
2562 spin_unlock_irq(&ohci->lock); in ohci_set_config_rom()
2566 dmam_free_coherent(ohci->card.device, CONFIG_ROM_SIZE, next_config_rom, in ohci_set_config_rom()
2573 * mappings in the bus reset tasklet, since the OHCI in ohci_set_config_rom()
2578 fw_schedule_bus_reset(&ohci->card, true, true); in ohci_set_config_rom()
2585 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_request() local
2587 at_context_transmit(&ohci->at_request_ctx, packet); in ohci_send_request()
2592 struct fw_ohci *ohci = fw_ohci(card); in ohci_send_response() local
2594 at_context_transmit(&ohci->at_response_ctx, packet); in ohci_send_response()
2599 struct fw_ohci *ohci = fw_ohci(card); in ohci_cancel_packet() local
2600 struct context *ctx = &ohci->at_request_ctx; in ohci_cancel_packet()
2610 dma_unmap_single(ohci->card.device, packet->payload_bus, in ohci_cancel_packet()
2613 log_ar_at_event(ohci, 'T', packet->speed, packet->header, 0x20); in ohci_cancel_packet()
2618 packet->timestamp = cycle_time_to_ohci_tstamp(get_cycle_time(ohci)); in ohci_cancel_packet()
2620 packet->callback(packet, &ohci->card, packet->ack); in ohci_cancel_packet()
2631 struct fw_ohci *ohci = fw_ohci(card); in ohci_enable_phys_dma() local
2643 spin_lock_irqsave(&ohci->lock, flags); in ohci_enable_phys_dma()
2645 if (ohci->generation != generation) { in ohci_enable_phys_dma()
2657 reg_write(ohci, OHCI1394_PhyReqFilterLoSet, 1 << n); in ohci_enable_phys_dma()
2659 reg_write(ohci, OHCI1394_PhyReqFilterHiSet, 1 << (n - 32)); in ohci_enable_phys_dma()
2661 flush_writes(ohci); in ohci_enable_phys_dma()
2663 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_enable_phys_dma()
2670 struct fw_ohci *ohci = fw_ohci(card); in ohci_read_csr() local
2677 if (ohci->is_root && in ohci_read_csr()
2678 (reg_read(ohci, OHCI1394_LinkControlSet) & in ohci_read_csr()
2683 if (ohci->csr_state_setclear_abdicate) in ohci_read_csr()
2689 return reg_read(ohci, OHCI1394_NodeID) << 16; in ohci_read_csr()
2692 return get_cycle_time(ohci); in ohci_read_csr()
2700 spin_lock_irqsave(&ohci->lock, flags); in ohci_read_csr()
2701 value = update_bus_time(ohci); in ohci_read_csr()
2702 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_read_csr()
2706 value = reg_read(ohci, OHCI1394_ATRetries); in ohci_read_csr()
2710 return (reg_read(ohci, OHCI1394_FairnessControl) & 0x3f) | in ohci_read_csr()
2711 (ohci->pri_req_max << 8); in ohci_read_csr()
2721 struct fw_ohci *ohci = fw_ohci(card); in ohci_write_csr() local
2726 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2727 reg_write(ohci, OHCI1394_LinkControlClear, in ohci_write_csr()
2729 flush_writes(ohci); in ohci_write_csr()
2732 ohci->csr_state_setclear_abdicate = false; in ohci_write_csr()
2736 if ((value & CSR_STATE_BIT_CMSTR) && ohci->is_root) { in ohci_write_csr()
2737 reg_write(ohci, OHCI1394_LinkControlSet, in ohci_write_csr()
2739 flush_writes(ohci); in ohci_write_csr()
2742 ohci->csr_state_setclear_abdicate = true; in ohci_write_csr()
2746 reg_write(ohci, OHCI1394_NodeID, value >> 16); in ohci_write_csr()
2747 flush_writes(ohci); in ohci_write_csr()
2751 reg_write(ohci, OHCI1394_IsochronousCycleTimer, value); in ohci_write_csr()
2752 reg_write(ohci, OHCI1394_IntEventSet, in ohci_write_csr()
2754 flush_writes(ohci); in ohci_write_csr()
2758 spin_lock_irqsave(&ohci->lock, flags); in ohci_write_csr()
2759 ohci->bus_time = (update_bus_time(ohci) & 0x40) | in ohci_write_csr()
2761 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_write_csr()
2767 reg_write(ohci, OHCI1394_ATRetries, value); in ohci_write_csr()
2768 flush_writes(ohci); in ohci_write_csr()
2772 reg_write(ohci, OHCI1394_FairnessControl, value & 0x3f); in ohci_write_csr()
2773 flush_writes(ohci); in ohci_write_csr()
2836 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_packet_per_buffer()
2875 dma_sync_single_range_for_cpu(context->ohci->card.device, in handle_ir_buffer_fill()
2892 dma_sync_single_range_for_cpu(ctx->context.ohci->card.device, in flush_ir_buffer_fill()
2930 dma_sync_single_range_for_cpu(context->ohci->card.device, in sync_it_packet_for_cpu()
2977 static void set_multichannel_mask(struct fw_ohci *ohci, u64 channels) in set_multichannel_mask() argument
2981 reg_write(ohci, OHCI1394_IRMultiChanMaskHiClear, ~hi); in set_multichannel_mask()
2982 reg_write(ohci, OHCI1394_IRMultiChanMaskLoClear, ~lo); in set_multichannel_mask()
2983 reg_write(ohci, OHCI1394_IRMultiChanMaskHiSet, hi); in set_multichannel_mask()
2984 reg_write(ohci, OHCI1394_IRMultiChanMaskLoSet, lo); in set_multichannel_mask()
2985 ohci->mc_channels = channels; in set_multichannel_mask()
2991 struct fw_ohci *ohci = fw_ohci(card); in ohci_allocate_iso_context() local
2998 spin_lock_irq(&ohci->lock); in ohci_allocate_iso_context()
3002 mask = &ohci->it_context_mask; in ohci_allocate_iso_context()
3008 ctx = &ohci->it_context_list[index]; in ohci_allocate_iso_context()
3013 channels = &ohci->ir_context_channels; in ohci_allocate_iso_context()
3014 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
3021 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
3026 mask = &ohci->ir_context_mask; in ohci_allocate_iso_context()
3028 index = !ohci->mc_allocated ? ffs(*mask) - 1 : -1; in ohci_allocate_iso_context()
3030 ohci->mc_allocated = true; in ohci_allocate_iso_context()
3033 ctx = &ohci->ir_context_list[index]; in ohci_allocate_iso_context()
3042 spin_unlock_irq(&ohci->lock); in ohci_allocate_iso_context()
3054 ret = context_init(&ctx->context, ohci, regs, callback); in ohci_allocate_iso_context()
3059 set_multichannel_mask(ohci, 0); in ohci_allocate_iso_context()
3068 spin_lock_irq(&ohci->lock); in ohci_allocate_iso_context()
3076 ohci->mc_allocated = false; in ohci_allocate_iso_context()
3081 spin_unlock_irq(&ohci->lock); in ohci_allocate_iso_context()
3090 struct fw_ohci *ohci = ctx->context.ohci; in ohci_start_iso() local
3100 index = ctx - ohci->it_context_list; in ohci_start_iso()
3106 reg_write(ohci, OHCI1394_IsoXmitIntEventClear, 1 << index); in ohci_start_iso()
3107 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, 1 << index); in ohci_start_iso()
3115 index = ctx - ohci->ir_context_list; in ohci_start_iso()
3122 reg_write(ohci, OHCI1394_IsoRecvIntEventClear, 1 << index); in ohci_start_iso()
3123 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, 1 << index); in ohci_start_iso()
3124 reg_write(ohci, CONTEXT_MATCH(ctx->context.regs), match); in ohci_start_iso()
3138 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_stop_iso() local
3144 index = ctx - ohci->it_context_list; in ohci_stop_iso()
3145 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, 1 << index); in ohci_stop_iso()
3150 index = ctx - ohci->ir_context_list; in ohci_stop_iso()
3151 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, 1 << index); in ohci_stop_iso()
3154 flush_writes(ohci); in ohci_stop_iso()
3163 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_free_iso_context() local
3172 spin_lock_irqsave(&ohci->lock, flags); in ohci_free_iso_context()
3176 index = ctx - ohci->it_context_list; in ohci_free_iso_context()
3177 ohci->it_context_mask |= 1 << index; in ohci_free_iso_context()
3181 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3182 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3183 ohci->ir_context_channels |= 1ULL << base->channel; in ohci_free_iso_context()
3187 index = ctx - ohci->ir_context_list; in ohci_free_iso_context()
3188 ohci->ir_context_mask |= 1 << index; in ohci_free_iso_context()
3189 ohci->ir_context_channels |= ohci->mc_channels; in ohci_free_iso_context()
3190 ohci->mc_channels = 0; in ohci_free_iso_context()
3191 ohci->mc_allocated = false; in ohci_free_iso_context()
3195 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_free_iso_context()
3200 struct fw_ohci *ohci = fw_ohci(base->card); in ohci_set_iso_channels() local
3207 spin_lock_irqsave(&ohci->lock, flags); in ohci_set_iso_channels()
3210 if (~ohci->ir_context_channels & ~ohci->mc_channels & *channels) { in ohci_set_iso_channels()
3211 *channels = ohci->ir_context_channels; in ohci_set_iso_channels()
3214 set_multichannel_mask(ohci, *channels); in ohci_set_iso_channels()
3218 spin_unlock_irqrestore(&ohci->lock, flags); in ohci_set_iso_channels()
3229 static void ohci_resume_iso_dma(struct fw_ohci *ohci) in ohci_resume_iso_dma() argument
3234 for (i = 0 ; i < ohci->n_ir ; i++) { in ohci_resume_iso_dma()
3235 ctx = &ohci->ir_context_list[i]; in ohci_resume_iso_dma()
3240 for (i = 0 ; i < ohci->n_it ; i++) { in ohci_resume_iso_dma()
3241 ctx = &ohci->it_context_list[i]; in ohci_resume_iso_dma()
3329 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_transmit()
3357 struct device *device = ctx->context.ohci->card.device; in queue_iso_packet_per_buffer()
3365 * The OHCI controller puts the isochronous header and trailer in the in queue_iso_packet_per_buffer()
3475 dma_sync_single_range_for_device(ctx->context.ohci->card.device, in queue_iso_buffer_fill()
3498 spin_lock_irqsave(&ctx->context.ohci->lock, flags); in ohci_queue_iso()
3510 spin_unlock_irqrestore(&ctx->context.ohci->lock, flags); in ohci_queue_iso()
3520 reg_write(ctx->ohci, CONTROL_SET(ctx->regs), CONTEXT_WAKE); in ohci_flush_queue_iso()
3610 struct fw_ohci *ohci = pci_get_drvdata(pdev); in release_ohci() local
3614 ar_context_release(&ohci->ar_response_ctx); in release_ohci()
3615 ar_context_release(&ohci->ar_request_ctx); in release_ohci()
3617 dev_notice(dev, "removed fw-ohci device\n"); in release_ohci()
3623 struct fw_ohci *ohci; in pci_probe() local
3634 ohci = devres_alloc(release_ohci, sizeof(*ohci), GFP_KERNEL); in pci_probe()
3635 if (ohci == NULL) in pci_probe()
3637 fw_card_initialize(&ohci->card, &ohci_driver, &dev->dev); in pci_probe()
3638 pci_set_drvdata(dev, ohci); in pci_probe()
3640 devres_add(&dev->dev, ohci); in pci_probe()
3644 dev_err(&dev->dev, "failed to enable OHCI hardware\n"); in pci_probe()
3651 spin_lock_init(&ohci->lock); in pci_probe()
3652 mutex_init(&ohci->phy_reg_mutex); in pci_probe()
3654 INIT_WORK(&ohci->bus_reset_work, bus_reset_work); in pci_probe()
3658 ohci_err(ohci, "invalid MMIO resource\n"); in pci_probe()
3664 ohci_err(ohci, "request and map MMIO resource unavailable\n"); in pci_probe()
3667 ohci->registers = pcim_iomap_table(dev)[0]; in pci_probe()
3675 ohci->quirks = ohci_quirks[i].flags; in pci_probe()
3679 ohci->quirks = param_quirks; in pci_probe()
3682 ohci->quirks |= QUIRK_REBOOT_BY_CYCLE_TIMER_READ; in pci_probe()
3691 ohci->misc_buffer = dmam_alloc_coherent(&dev->dev, PAGE_SIZE, &ohci->misc_buffer_bus, in pci_probe()
3693 if (!ohci->misc_buffer) in pci_probe()
3696 err = ar_context_init(&ohci->ar_request_ctx, ohci, 0, in pci_probe()
3701 err = ar_context_init(&ohci->ar_response_ctx, ohci, PAGE_SIZE/4, in pci_probe()
3706 err = context_init(&ohci->at_request_ctx, ohci, in pci_probe()
3711 err = context_init(&ohci->at_response_ctx, ohci, in pci_probe()
3716 reg_write(ohci, OHCI1394_IsoRecvIntMaskSet, ~0); in pci_probe()
3717 ohci->ir_context_channels = ~0ULL; in pci_probe()
3718 ohci->ir_context_support = reg_read(ohci, OHCI1394_IsoRecvIntMaskSet); in pci_probe()
3719 reg_write(ohci, OHCI1394_IsoRecvIntMaskClear, ~0); in pci_probe()
3720 ohci->ir_context_mask = ohci->ir_context_support; in pci_probe()
3721 ohci->n_ir = hweight32(ohci->ir_context_mask); in pci_probe()
3722 size = sizeof(struct iso_context) * ohci->n_ir; in pci_probe()
3723 ohci->ir_context_list = devm_kzalloc(&dev->dev, size, GFP_KERNEL); in pci_probe()
3724 if (!ohci->ir_context_list) in pci_probe()
3727 reg_write(ohci, OHCI1394_IsoXmitIntMaskSet, ~0); in pci_probe()
3728 ohci->it_context_support = reg_read(ohci, OHCI1394_IsoXmitIntMaskSet); in pci_probe()
3730 if (!ohci->it_context_support) { in pci_probe()
3731 ohci_notice(ohci, "overriding IsoXmitIntMask\n"); in pci_probe()
3732 ohci->it_context_support = 0xf; in pci_probe()
3734 reg_write(ohci, OHCI1394_IsoXmitIntMaskClear, ~0); in pci_probe()
3735 ohci->it_context_mask = ohci->it_context_support; in pci_probe()
3736 ohci->n_it = hweight32(ohci->it_context_mask); in pci_probe()
3737 size = sizeof(struct iso_context) * ohci->n_it; in pci_probe()
3738 ohci->it_context_list = devm_kzalloc(&dev->dev, size, GFP_KERNEL); in pci_probe()
3739 if (!ohci->it_context_list) in pci_probe()
3742 ohci->self_id = ohci->misc_buffer + PAGE_SIZE/2; in pci_probe()
3743 ohci->self_id_bus = ohci->misc_buffer_bus + PAGE_SIZE/2; in pci_probe()
3745 bus_options = reg_read(ohci, OHCI1394_BusOptions); in pci_probe()
3748 guid = ((u64) reg_read(ohci, OHCI1394_GUIDHi) << 32) | in pci_probe()
3749 reg_read(ohci, OHCI1394_GUIDLo); in pci_probe()
3751 if (!(ohci->quirks & QUIRK_NO_MSI)) in pci_probe()
3754 pci_dev_msi_enabled(dev) ? 0 : IRQF_SHARED, ohci_driver_name, ohci); in pci_probe()
3756 ohci_err(ohci, "failed to allocate interrupt %d\n", dev->irq); in pci_probe()
3760 err = fw_card_add(&ohci->card, max_receive, link_speed, guid); in pci_probe()
3764 version = reg_read(ohci, OHCI1394_Version) & 0x00ff00ff; in pci_probe()
3765 ohci_notice(ohci, in pci_probe()
3766 "added OHCI v%x.%x device as card %d, " in pci_probe()
3768 version >> 16, version & 0xff, ohci->card.index, in pci_probe()
3769 ohci->n_ir, ohci->n_it, ohci->quirks, in pci_probe()
3770 reg_read(ohci, OHCI1394_PhyUpperBound) ? in pci_probe()
3783 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_remove() local
3789 if (reg_read(ohci, OHCI1394_HCControlSet) & OHCI1394_HCControl_LPS) { in pci_remove()
3790 reg_write(ohci, OHCI1394_IntMaskClear, ~0); in pci_remove()
3791 flush_writes(ohci); in pci_remove()
3793 cancel_work_sync(&ohci->bus_reset_work); in pci_remove()
3794 fw_core_remove_card(&ohci->card); in pci_remove()
3801 software_reset(ohci); in pci_remove()
3805 dev_notice(&dev->dev, "removing fw-ohci device\n"); in pci_remove()
3811 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_suspend() local
3814 software_reset(ohci); in pci_suspend()
3817 ohci_err(ohci, "pci_save_state failed\n"); in pci_suspend()
3822 ohci_err(ohci, "pci_set_power_state failed with %d\n", err); in pci_suspend()
3830 struct fw_ohci *ohci = pci_get_drvdata(dev); in pci_resume() local
3838 ohci_err(ohci, "pci_enable_device failed\n"); in pci_resume()
3843 if (!reg_read(ohci, OHCI1394_GUIDLo) && in pci_resume()
3844 !reg_read(ohci, OHCI1394_GUIDHi)) { in pci_resume()
3845 reg_write(ohci, OHCI1394_GUIDLo, (u32)ohci->card.guid); in pci_resume()
3846 reg_write(ohci, OHCI1394_GUIDHi, (u32)(ohci->card.guid >> 32)); in pci_resume()
3849 err = ohci_enable(&ohci->card, NULL, 0); in pci_resume()
3853 ohci_resume_iso_dma(ohci); in pci_resume()
3896 MODULE_DESCRIPTION("Driver for PCI OHCI IEEE1394 controllers");