Lines Matching +full:0 +full:x1e6e2000
40 static const u8 extreginfo[] = { 0x0f, 0x04, 0x1c, 0xff };
41 static const u8 extreginfo_ast2300[] = { 0x0f, 0x04, 0x1f, 0xff };
51 for (i = 0x81; i <= 0x9f; i++) in ast_set_def_ext_reg()
52 ast_set_index_reg(ast, AST_IO_CRTC_PORT, i, 0x00); in ast_set_def_ext_reg()
59 index = 0xa0; in ast_set_def_ext_reg()
60 while (*ext_reg_info != 0xff) { in ast_set_def_ext_reg()
61 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, index, 0x00, *ext_reg_info); in ast_set_def_ext_reg()
67 /* ast_set_index_reg-mask(ast, AST_IO_CRTC_PORT, 0xa1, 0xff, 0x3); */ in ast_set_def_ext_reg()
70 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0x8c, 0x00, 0x01); in ast_set_def_ext_reg()
71 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb7, 0x00, 0x00); in ast_set_def_ext_reg()
74 reg = 0x04; in ast_set_def_ext_reg()
76 reg |= 0x20; in ast_set_def_ext_reg()
77 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xb6, 0xff, reg); in ast_set_def_ext_reg()
84 ast_write32(ast, 0xf004, r & 0xffff0000); in ast_mindwm()
85 ast_write32(ast, 0xf000, 0x1); in ast_mindwm()
88 data = ast_read32(ast, 0xf004) & 0xffff0000; in ast_mindwm()
89 } while (data != (r & 0xffff0000)); in ast_mindwm()
90 return ast_read32(ast, 0x10000 + (r & 0x0000ffff)); in ast_mindwm()
96 ast_write32(ast, 0xf004, r & 0xffff0000); in ast_moutdwm()
97 ast_write32(ast, 0xf000, 0x1); in ast_moutdwm()
99 data = ast_read32(ast, 0xf004) & 0xffff0000; in ast_moutdwm()
100 } while (data != (r & 0xffff0000)); in ast_moutdwm()
101 ast_write32(ast, 0x10000 + (r & 0x0000ffff), v); in ast_moutdwm()
116 0xFF00FF00,
117 0xCC33CC33,
118 0xAA55AA55,
119 0xFFFE0001,
120 0x683501FE,
121 0x0F1929B0,
122 0x2D0B4346,
123 0x60767F02,
124 0x6FBE36A6,
125 0x3A253035,
126 0x3019686D,
127 0x41C6167E,
128 0x620152BF,
129 0x20F050E0
136 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
137 ast_moutdwm(ast, 0x1e6e0070, 0x00000001 | (datagen << 3)); in mmctestburst2_ast2150()
138 timeout = 0; in mmctestburst2_ast2150()
140 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
142 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
143 return 0xffffffff; in mmctestburst2_ast2150()
146 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
147 ast_moutdwm(ast, 0x1e6e0070, 0x00000003 | (datagen << 3)); in mmctestburst2_ast2150()
148 timeout = 0; in mmctestburst2_ast2150()
150 data = ast_mindwm(ast, 0x1e6e0070) & 0x40; in mmctestburst2_ast2150()
152 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
153 return 0xffffffff; in mmctestburst2_ast2150()
156 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7; in mmctestburst2_ast2150()
157 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmctestburst2_ast2150()
161 #if 0 /* unused in DDX driver - here for completeness */
166 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
167 ast_moutdwm(ast, 0x1e6e0070, 0x00000005 | (datagen << 3));
168 timeout = 0;
170 data = ast_mindwm(ast, 0x1e6e0070) & 0x40;
172 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
173 return 0xffffffff;
176 data = (ast_mindwm(ast, 0x1e6e0070) & 0x80) >> 7;
177 ast_moutdwm(ast, 0x1e6e0070, 0x00000000);
186 for (i = 0; i < 8; i++) in cbrtest_ast2150()
188 return 0; in cbrtest_ast2150()
196 for (patcnt = 0; patcnt < CBR_PATNUM_AST2150; patcnt++) { in cbrscan_ast2150()
197 ast_moutdwm(ast, 0x1e6e007c, pattern_AST2150[patcnt]); in cbrscan_ast2150()
198 for (loop = 0; loop < CBR_PASSNUM_AST2150; loop++) { in cbrscan_ast2150()
203 return 0; in cbrscan_ast2150()
214 dll_min[0] = dll_min[1] = dll_min[2] = dll_min[3] = 0xff; in cbrdlli_ast2150()
215 dll_max[0] = dll_max[1] = dll_max[2] = dll_max[3] = 0x0; in cbrdlli_ast2150()
216 passcnt = 0; in cbrdlli_ast2150()
218 for (dlli = 0; dlli < 100; dlli++) { in cbrdlli_ast2150()
219 ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); in cbrdlli_ast2150()
221 if (data != 0) { in cbrdlli_ast2150()
222 if (data & 0x1) { in cbrdlli_ast2150()
223 if (dll_min[0] > dlli) in cbrdlli_ast2150()
224 dll_min[0] = dlli; in cbrdlli_ast2150()
225 if (dll_max[0] < dlli) in cbrdlli_ast2150()
226 dll_max[0] = dlli; in cbrdlli_ast2150()
232 if (dll_max[0] == 0 || (dll_max[0]-dll_min[0]) < CBR_THRESHOLD_AST2150) in cbrdlli_ast2150()
235 dlli = dll_min[0] + (((dll_max[0] - dll_min[0]) * 7) >> 4); in cbrdlli_ast2150()
236 ast_moutdwm(ast, 0x1e6e0068, dlli | (dlli << 8) | (dlli << 16) | (dlli << 24)); in cbrdlli_ast2150()
248 j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dram_reg()
250 if ((j & 0x80) == 0) { /* VGA only */ in ast_init_dram_reg()
253 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_reg()
254 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_reg()
255 ast_write32(ast, 0x10100, 0xa8); in ast_init_dram_reg()
259 } while (ast_read32(ast, 0x10100) != 0xa8); in ast_init_dram_reg()
266 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_init_dram_reg()
267 ast_write32(ast, 0xf000, 0x1); in ast_init_dram_reg()
268 ast_write32(ast, 0x12000, 0x1688A8A8); in ast_init_dram_reg()
271 } while (ast_read32(ast, 0x12000) != 0x01); in ast_init_dram_reg()
273 ast_write32(ast, 0x10000, 0xfc600309); in ast_init_dram_reg()
276 } while (ast_read32(ast, 0x10000) != 0x01); in ast_init_dram_reg()
279 while (dram_reg_info->index != 0xffff) { in ast_init_dram_reg()
280 if (dram_reg_info->index == 0xff00) {/* delay fn */ in ast_init_dram_reg()
281 for (i = 0; i < 15; i++) in ast_init_dram_reg()
283 } else if (dram_reg_info->index == 0x4 && !IS_AST_GEN1(ast)) { in ast_init_dram_reg()
286 data = 0x00000d89; in ast_init_dram_reg()
288 data = 0x00000c8d; in ast_init_dram_reg()
290 temp = ast_read32(ast, 0x12070); in ast_init_dram_reg()
291 temp &= 0xc; in ast_init_dram_reg()
293 ast_write32(ast, 0x10000 + dram_reg_info->index, data | temp); in ast_init_dram_reg()
295 ast_write32(ast, 0x10000 + dram_reg_info->index, dram_reg_info->data); in ast_init_dram_reg()
300 data = ast_read32(ast, 0x10120); in ast_init_dram_reg()
301 if (data == 0x5061) { /* 266Mhz */ in ast_init_dram_reg()
302 data = ast_read32(ast, 0x10004); in ast_init_dram_reg()
303 if (data & 0x40) in ast_init_dram_reg()
311 temp = ast_read32(ast, 0x10140); in ast_init_dram_reg()
312 ast_write32(ast, 0x10140, temp | 0x40); in ast_init_dram_reg()
316 temp = ast_read32(ast, 0x1200c); in ast_init_dram_reg()
317 ast_write32(ast, 0x1200c, temp & 0xfffffffd); in ast_init_dram_reg()
318 temp = ast_read32(ast, 0x12040); in ast_init_dram_reg()
319 ast_write32(ast, 0x12040, temp | 0x40); in ast_init_dram_reg()
328 j = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_init_dram_reg()
329 } while ((j & 0x40) == 0); in ast_init_dram_reg()
352 ast_set_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xa3, 0xcf, 0x80); /* Enable DVO */ in ast_post_gpu()
357 #define AST_DDR3 0
399 0xFF00FF00,
400 0xCC33CC33,
401 0xAA55AA55,
402 0x88778877,
403 0x92CC4D6E,
404 0x543D3CDE,
405 0xF1E843C7,
406 0x7C61D253
413 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test()
414 ast_moutdwm(ast, 0x1e6e0070, (datagen << 3) | test_ctl); in mmc_test()
415 timeout = 0; in mmc_test()
417 data = ast_mindwm(ast, 0x1e6e0070) & 0x3000; in mmc_test()
418 if (data & 0x2000) in mmc_test()
421 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test()
425 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test()
433 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test2()
434 ast_moutdwm(ast, 0x1e6e0070, (datagen << 3) | test_ctl); in mmc_test2()
435 timeout = 0; in mmc_test2()
437 data = ast_mindwm(ast, 0x1e6e0070) & 0x1000; in mmc_test2()
439 ast_moutdwm(ast, 0x1e6e0070, 0x0); in mmc_test2()
440 return 0xffffffff; in mmc_test2()
443 data = ast_mindwm(ast, 0x1e6e0078); in mmc_test2()
444 data = (data | (data >> 16)) & 0xffff; in mmc_test2()
445 ast_moutdwm(ast, 0x1e6e0070, 0x00000000); in mmc_test2()
452 return mmc_test(ast, datagen, 0xc1); in mmc_test_burst()
457 return mmc_test2(ast, datagen, 0x41); in mmc_test_burst2()
462 return mmc_test(ast, datagen, 0xc5); in mmc_test_single()
467 return mmc_test2(ast, datagen, 0x05); in mmc_test_single2()
472 return mmc_test(ast, datagen, 0x85); in mmc_test_single_2500()
479 data = mmc_test_single2(ast, 0); in cbr_test()
480 if ((data & 0xff) && (data & 0xff00)) in cbr_test()
481 return 0; in cbr_test()
482 for (i = 0; i < 8; i++) { in cbr_test()
484 if ((data & 0xff) && (data & 0xff00)) in cbr_test()
485 return 0; in cbr_test()
489 else if (data & 0xff) in cbr_test()
499 for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { in cbr_scan()
500 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan()
501 for (loop = 0; loop < CBR_PASSNUM2; loop++) { in cbr_scan()
502 if ((data = cbr_test(ast)) != 0) { in cbr_scan()
505 return 0; in cbr_scan()
510 return 0; in cbr_scan()
519 data = mmc_test_burst2(ast, 0); in cbr_test2()
520 if (data == 0xffff) in cbr_test2()
521 return 0; in cbr_test2()
522 data |= mmc_test_single2(ast, 0); in cbr_test2()
523 if (data == 0xffff) in cbr_test2()
524 return 0; in cbr_test2()
526 return ~data & 0xffff; in cbr_test2()
533 data2 = 0xffff; in cbr_scan2()
534 for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { in cbr_scan2()
535 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan2()
536 for (loop = 0; loop < CBR_PASSNUM2; loop++) { in cbr_scan2()
537 if ((data = cbr_test2(ast)) != 0) { in cbr_scan2()
540 return 0; in cbr_scan2()
545 return 0; in cbr_scan2()
552 if (!mmc_test_burst(ast, 0)) in cbr_test3()
554 if (!mmc_test_single(ast, 0)) in cbr_test3()
563 for (patcnt = 0; patcnt < CBR_PATNUM; patcnt++) { in cbr_scan3()
564 ast_moutdwm(ast, 0x1e6e007c, pattern[patcnt]); in cbr_scan3()
565 for (loop = 0; loop < 2; loop++) { in cbr_scan3()
577 u32 gold_sadj[2], dllmin[16], dllmax[16], dlli, data, cnt, mask, passcnt, retry = 0; in finetuneDQI_L()
580 for (cnt = 0; cnt < 16; cnt++) { in finetuneDQI_L()
581 dllmin[cnt] = 0xff; in finetuneDQI_L()
582 dllmax[cnt] = 0x0; in finetuneDQI_L()
584 passcnt = 0; in finetuneDQI_L()
585 for (dlli = 0; dlli < 76; dlli++) { in finetuneDQI_L()
586 ast_moutdwm(ast, 0x1E6E0068, 0x00001400 | (dlli << 16) | (dlli << 24)); in finetuneDQI_L()
587 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE1); in finetuneDQI_L()
589 if (data != 0) { in finetuneDQI_L()
590 mask = 0x00010001; in finetuneDQI_L()
591 for (cnt = 0; cnt < 16; cnt++) { in finetuneDQI_L()
607 gold_sadj[0] = 0x0; in finetuneDQI_L()
608 passcnt = 0; in finetuneDQI_L()
609 for (cnt = 0; cnt < 16; cnt++) { in finetuneDQI_L()
611 gold_sadj[0] += dllmin[cnt]; in finetuneDQI_L()
622 gold_sadj[0] = gold_sadj[0] >> 4; in finetuneDQI_L()
623 gold_sadj[1] = gold_sadj[0]; in finetuneDQI_L()
625 data = 0; in finetuneDQI_L()
626 for (cnt = 0; cnt < 8; cnt++) { in finetuneDQI_L()
630 if (gold_sadj[0] >= dlli) { in finetuneDQI_L()
631 dlli = ((gold_sadj[0] - dlli) * 19) >> 5; in finetuneDQI_L()
636 dlli = ((dlli - gold_sadj[0]) * 19) >> 5; in finetuneDQI_L()
640 dlli = (8 - dlli) & 0x7; in finetuneDQI_L()
645 ast_moutdwm(ast, 0x1E6E0080, data); in finetuneDQI_L()
647 data = 0; in finetuneDQI_L()
657 dlli = (dlli - 1) & 0x7; in finetuneDQI_L()
665 dlli = (8 - dlli) & 0x7; in finetuneDQI_L()
670 ast_moutdwm(ast, 0x1E6E0084, data); in finetuneDQI_L()
683 reg_mcr0c = ast_mindwm(ast, 0x1E6E000C); in finetuneDQSI()
684 reg_mcr18 = ast_mindwm(ast, 0x1E6E0018); in finetuneDQSI()
685 reg_mcr18 &= 0x0000ffff; in finetuneDQSI()
686 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); in finetuneDQSI()
688 for (dlli = 0; dlli < 76; dlli++) { in finetuneDQSI()
689 tag[0][dlli] = 0x0; in finetuneDQSI()
690 tag[1][dlli] = 0x0; in finetuneDQSI()
692 for (dqidly = 0; dqidly < 32; dqidly++) { in finetuneDQSI()
693 pass[dqidly][0][0] = 0xff; in finetuneDQSI()
694 pass[dqidly][0][1] = 0x0; in finetuneDQSI()
695 pass[dqidly][1][0] = 0xff; in finetuneDQSI()
696 pass[dqidly][1][1] = 0x0; in finetuneDQSI()
698 for (dqidly = 0; dqidly < 32; dqidly++) { in finetuneDQSI()
699 passcnt[0] = passcnt[1] = 0; in finetuneDQSI()
700 for (dqsip = 0; dqsip < 2; dqsip++) { in finetuneDQSI()
701 ast_moutdwm(ast, 0x1E6E000C, 0); in finetuneDQSI()
702 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18 | (dqidly << 16) | (dqsip << 23)); in finetuneDQSI()
703 ast_moutdwm(ast, 0x1E6E000C, reg_mcr0c); in finetuneDQSI()
704 for (dlli = 0; dlli < 76; dlli++) { in finetuneDQSI()
705 ast_moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); in finetuneDQSI()
706 ast_moutdwm(ast, 0x1E6E0070, 0); in finetuneDQSI()
707 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE0); in finetuneDQSI()
709 if (dlli == 0) in finetuneDQSI()
713 if (dlli < pass[dqidly][dqsip][0]) in finetuneDQSI()
714 pass[dqidly][dqsip][0] = (u16) dlli; in finetuneDQSI()
720 pass[dqidly][dqsip][0] = 0xff; in finetuneDQSI()
721 pass[dqidly][dqsip][1] = 0x0; in finetuneDQSI()
725 if (passcnt[0] == 0 && passcnt[1] == 0) in finetuneDQSI()
729 g_dqidly = g_dqsip = g_margin = g_side = 0; in finetuneDQSI()
731 for (dqidly = 0; dqidly < 32; dqidly++) { in finetuneDQSI()
732 for (dqsip = 0; dqsip < 2; dqsip++) { in finetuneDQSI()
733 if (pass[dqidly][dqsip][0] > pass[dqidly][dqsip][1]) in finetuneDQSI()
735 diff = pass[dqidly][dqsip][1] - pass[dqidly][dqsip][0]; in finetuneDQSI()
738 passcnt[0] = passcnt[1] = 0; in finetuneDQSI()
739 for (dlli = pass[dqidly][dqsip][0]; dlli > 0 && tag[dqsip][dlli] != 0; dlli--, passcnt[0]++); in finetuneDQSI()
740 for (dlli = pass[dqidly][dqsip][1]; dlli < 76 && tag[dqsip][dlli] != 0; dlli++, passcnt[1]++); in finetuneDQSI()
741 if (passcnt[0] > passcnt[1]) in finetuneDQSI()
742 passcnt[0] = passcnt[1]; in finetuneDQSI()
743 passcnt[1] = 0; in finetuneDQSI()
744 if (passcnt[0] > g_side) in finetuneDQSI()
745 passcnt[1] = passcnt[0] - g_side; in finetuneDQSI()
746 if (diff > (g_margin+1) && (passcnt[1] > 0 || passcnt[0] > 8)) { in finetuneDQSI()
750 g_side = passcnt[0]; in finetuneDQSI()
756 g_side = passcnt[0]; in finetuneDQSI()
761 ast_moutdwm(ast, 0x1E6E0018, reg_mcr18); in finetuneDQSI()
766 u32 dllmin[2], dllmax[2], dlli, data, passcnt, retry = 0; in cbr_dll2()
774 dllmin[0] = dllmin[1] = 0xff; in cbr_dll2()
775 dllmax[0] = dllmax[1] = 0x0; in cbr_dll2()
776 passcnt = 0; in cbr_dll2()
777 for (dlli = 0; dlli < 76; dlli++) { in cbr_dll2()
778 ast_moutdwm(ast, 0x1E6E0068, 0x00001300 | (dlli << 16) | (dlli << 24)); in cbr_dll2()
779 ast_moutdwm(ast, 0x1E6E0074, CBR_SIZE2); in cbr_dll2()
781 if (data != 0) { in cbr_dll2()
782 if (data & 0x1) { in cbr_dll2()
783 if (dllmin[0] > dlli) { in cbr_dll2()
784 dllmin[0] = dlli; in cbr_dll2()
786 if (dllmax[0] < dlli) { in cbr_dll2()
787 dllmax[0] = dlli; in cbr_dll2()
790 if (data & 0x2) { in cbr_dll2()
805 if (dllmax[0] == 0 || (dllmax[0]-dllmin[0]) < CBR_THRESHOLD) { in cbr_dll2()
808 if (dllmax[1] == 0 || (dllmax[1]-dllmin[1]) < CBR_THRESHOLD) { in cbr_dll2()
815 dlli += (dllmin[0] + dllmax[0]) >> 1; in cbr_dll2()
816 ast_moutdwm(ast, 0x1E6E0068, ast_mindwm(ast, 0x1E720058) | (dlli << 16)); in cbr_dll2()
824 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in get_ddr3_info()
827 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr3_info()
828 trap_AC2 = 0x00020000 + (trap << 16); in get_ddr3_info()
829 trap_AC2 |= 0x00300000 + ((trap & 0x2) << 19); in get_ddr3_info()
830 trap_MRS = 0x00000010 + (trap << 4); in get_ddr3_info()
831 trap_MRS |= ((trap & 0x2) << 18); in get_ddr3_info()
833 param->reg_MADJ = 0x00034C4C; in get_ddr3_info()
834 param->reg_SADJ = 0x00001800; in get_ddr3_info()
835 param->reg_DRV = 0x000000F0; in get_ddr3_info()
837 param->rodt = 0; in get_ddr3_info()
841 ast_moutdwm(ast, 0x1E6E2020, 0x0190); in get_ddr3_info()
842 param->wodt = 0; in get_ddr3_info()
843 param->reg_AC1 = 0x22202725; in get_ddr3_info()
844 param->reg_AC2 = 0xAA007613 | trap_AC2; in get_ddr3_info()
845 param->reg_DQSIC = 0x000000BA; in get_ddr3_info()
846 param->reg_MRS = 0x04001400 | trap_MRS; in get_ddr3_info()
847 param->reg_EMRS = 0x00000000; in get_ddr3_info()
848 param->reg_IOZ = 0x00000023; in get_ddr3_info()
849 param->reg_DQIDLY = 0x00000074; in get_ddr3_info()
850 param->reg_FREQ = 0x00004DC0; in get_ddr3_info()
857 param->reg_AC2 = 0xAA007613 | trap_AC2; in get_ddr3_info()
860 param->reg_AC2 = 0xAA00761C | trap_AC2; in get_ddr3_info()
863 param->reg_AC2 = 0xAA007636 | trap_AC2; in get_ddr3_info()
869 ast_moutdwm(ast, 0x1E6E2020, 0x03F1); in get_ddr3_info()
871 param->reg_AC1 = 0x33302825; in get_ddr3_info()
872 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
873 param->reg_DQSIC = 0x000000E2; in get_ddr3_info()
874 param->reg_MRS = 0x04001600 | trap_MRS; in get_ddr3_info()
875 param->reg_EMRS = 0x00000000; in get_ddr3_info()
876 param->reg_IOZ = 0x00000034; in get_ddr3_info()
877 param->reg_DRV = 0x000000FA; in get_ddr3_info()
878 param->reg_DQIDLY = 0x00000089; in get_ddr3_info()
879 param->reg_FREQ = 0x00005040; in get_ddr3_info()
887 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
890 param->reg_AC2 = 0xCC009622 | trap_AC2; in get_ddr3_info()
893 param->reg_AC2 = 0xCC00963F | trap_AC2; in get_ddr3_info()
899 ast_moutdwm(ast, 0x1E6E2020, 0x01F0); in get_ddr3_info()
901 param->reg_AC1 = 0x33302825; in get_ddr3_info()
902 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
903 param->reg_DQSIC = 0x000000E2; in get_ddr3_info()
904 param->reg_MRS = 0x04001600 | trap_MRS; in get_ddr3_info()
905 param->reg_EMRS = 0x00000000; in get_ddr3_info()
906 param->reg_IOZ = 0x00000023; in get_ddr3_info()
907 param->reg_DRV = 0x000000FA; in get_ddr3_info()
908 param->reg_DQIDLY = 0x00000089; in get_ddr3_info()
909 param->reg_FREQ = 0x000050C0; in get_ddr3_info()
917 param->reg_AC2 = 0xCC009617 | trap_AC2; in get_ddr3_info()
920 param->reg_AC2 = 0xCC009622 | trap_AC2; in get_ddr3_info()
923 param->reg_AC2 = 0xCC00963F | trap_AC2; in get_ddr3_info()
929 ast_moutdwm(ast, 0x1E6E2020, 0x0230); in get_ddr3_info()
930 param->wodt = 0; in get_ddr3_info()
931 param->reg_AC1 = 0x33302926; in get_ddr3_info()
932 param->reg_AC2 = 0xCD44961A; in get_ddr3_info()
933 param->reg_DQSIC = 0x000000FC; in get_ddr3_info()
934 param->reg_MRS = 0x00081830; in get_ddr3_info()
935 param->reg_EMRS = 0x00000000; in get_ddr3_info()
936 param->reg_IOZ = 0x00000045; in get_ddr3_info()
937 param->reg_DQIDLY = 0x00000097; in get_ddr3_info()
938 param->reg_FREQ = 0x000052C0; in get_ddr3_info()
943 ast_moutdwm(ast, 0x1E6E2020, 0x0270); in get_ddr3_info()
945 param->reg_AC1 = 0x33302926; in get_ddr3_info()
946 param->reg_AC2 = 0xDE44A61D; in get_ddr3_info()
947 param->reg_DQSIC = 0x00000117; in get_ddr3_info()
948 param->reg_MRS = 0x00081A30; in get_ddr3_info()
949 param->reg_EMRS = 0x00000000; in get_ddr3_info()
950 param->reg_IOZ = 0x070000BB; in get_ddr3_info()
951 param->reg_DQIDLY = 0x000000A0; in get_ddr3_info()
952 param->reg_FREQ = 0x000054C0; in get_ddr3_info()
957 ast_moutdwm(ast, 0x1E6E2020, 0x0290); in get_ddr3_info()
960 param->reg_AC1 = 0x33302926; in get_ddr3_info()
961 param->reg_AC2 = 0xEF44B61E; in get_ddr3_info()
962 param->reg_DQSIC = 0x00000125; in get_ddr3_info()
963 param->reg_MRS = 0x00081A30; in get_ddr3_info()
964 param->reg_EMRS = 0x00000040; in get_ddr3_info()
965 param->reg_DRV = 0x000000F5; in get_ddr3_info()
966 param->reg_IOZ = 0x00000023; in get_ddr3_info()
967 param->reg_DQIDLY = 0x00000088; in get_ddr3_info()
968 param->reg_FREQ = 0x000055C0; in get_ddr3_info()
973 ast_moutdwm(ast, 0x1E6E2020, 0x0140); in get_ddr3_info()
974 param->reg_MADJ = 0x00136868; in get_ddr3_info()
975 param->reg_SADJ = 0x00004534; in get_ddr3_info()
978 param->reg_AC1 = 0x33302A37; in get_ddr3_info()
979 param->reg_AC2 = 0xEF56B61E; in get_ddr3_info()
980 param->reg_DQSIC = 0x0000013F; in get_ddr3_info()
981 param->reg_MRS = 0x00101A50; in get_ddr3_info()
982 param->reg_EMRS = 0x00000040; in get_ddr3_info()
983 param->reg_DRV = 0x000000FA; in get_ddr3_info()
984 param->reg_IOZ = 0x00000023; in get_ddr3_info()
985 param->reg_DQIDLY = 0x00000078; in get_ddr3_info()
986 param->reg_FREQ = 0x000057C0; in get_ddr3_info()
991 ast_moutdwm(ast, 0x1E6E2020, 0x02E1); in get_ddr3_info()
992 param->reg_MADJ = 0x00136868; in get_ddr3_info()
993 param->reg_SADJ = 0x00004534; in get_ddr3_info()
996 param->reg_AC1 = 0x32302A37; in get_ddr3_info()
997 param->reg_AC2 = 0xDF56B61F; in get_ddr3_info()
998 param->reg_DQSIC = 0x0000014D; in get_ddr3_info()
999 param->reg_MRS = 0x00101A50; in get_ddr3_info()
1000 param->reg_EMRS = 0x00000004; in get_ddr3_info()
1001 param->reg_DRV = 0x000000F5; in get_ddr3_info()
1002 param->reg_IOZ = 0x00000023; in get_ddr3_info()
1003 param->reg_DQIDLY = 0x00000078; in get_ddr3_info()
1004 param->reg_FREQ = 0x000058C0; in get_ddr3_info()
1009 ast_moutdwm(ast, 0x1E6E2020, 0x0160); in get_ddr3_info()
1010 param->reg_MADJ = 0x00136868; in get_ddr3_info()
1011 param->reg_SADJ = 0x00004534; in get_ddr3_info()
1014 param->reg_AC1 = 0x32302A37; in get_ddr3_info()
1015 param->reg_AC2 = 0xEF56B621; in get_ddr3_info()
1016 param->reg_DQSIC = 0x0000015A; in get_ddr3_info()
1017 param->reg_MRS = 0x02101A50; in get_ddr3_info()
1018 param->reg_EMRS = 0x00000004; in get_ddr3_info()
1019 param->reg_DRV = 0x000000F5; in get_ddr3_info()
1020 param->reg_IOZ = 0x00000034; in get_ddr3_info()
1021 param->reg_DQIDLY = 0x00000078; in get_ddr3_info()
1022 param->reg_FREQ = 0x000059C0; in get_ddr3_info()
1030 param->dram_config = 0x130; in get_ddr3_info()
1034 param->dram_config = 0x131; in get_ddr3_info()
1037 param->dram_config = 0x132; in get_ddr3_info()
1040 param->dram_config = 0x133; in get_ddr3_info()
1047 param->dram_config |= 0x00; in get_ddr3_info()
1050 param->dram_config |= 0x04; in get_ddr3_info()
1053 param->dram_config |= 0x08; in get_ddr3_info()
1056 param->dram_config |= 0x0c; in get_ddr3_info()
1064 u32 data, data2, retry = 0; in ddr3_init()
1067 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in ddr3_init()
1068 ast_moutdwm(ast, 0x1E6E0018, 0x00000100); in ddr3_init()
1069 ast_moutdwm(ast, 0x1E6E0024, 0x00000000); in ddr3_init()
1070 ast_moutdwm(ast, 0x1E6E0034, 0x00000000); in ddr3_init()
1072 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ); in ddr3_init()
1073 ast_moutdwm(ast, 0x1E6E0068, param->reg_SADJ); in ddr3_init()
1075 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); in ddr3_init()
1078 ast_moutdwm(ast, 0x1E6E0004, param->dram_config); in ddr3_init()
1079 ast_moutdwm(ast, 0x1E6E0008, 0x90040f); in ddr3_init()
1080 ast_moutdwm(ast, 0x1E6E0010, param->reg_AC1); in ddr3_init()
1081 ast_moutdwm(ast, 0x1E6E0014, param->reg_AC2); in ddr3_init()
1082 ast_moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); in ddr3_init()
1083 ast_moutdwm(ast, 0x1E6E0080, 0x00000000); in ddr3_init()
1084 ast_moutdwm(ast, 0x1E6E0084, 0x00000000); in ddr3_init()
1085 ast_moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); in ddr3_init()
1086 ast_moutdwm(ast, 0x1E6E0018, 0x4000A170); in ddr3_init()
1087 ast_moutdwm(ast, 0x1E6E0018, 0x00002370); in ddr3_init()
1088 ast_moutdwm(ast, 0x1E6E0038, 0x00000000); in ddr3_init()
1089 ast_moutdwm(ast, 0x1E6E0040, 0xFF444444); in ddr3_init()
1090 ast_moutdwm(ast, 0x1E6E0044, 0x22222222); in ddr3_init()
1091 ast_moutdwm(ast, 0x1E6E0048, 0x22222222); in ddr3_init()
1092 ast_moutdwm(ast, 0x1E6E004C, 0x00000002); in ddr3_init()
1093 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr3_init()
1094 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr3_init()
1095 ast_moutdwm(ast, 0x1E6E0054, 0); in ddr3_init()
1096 ast_moutdwm(ast, 0x1E6E0060, param->reg_DRV); in ddr3_init()
1097 ast_moutdwm(ast, 0x1E6E006C, param->reg_IOZ); in ddr3_init()
1098 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr3_init()
1099 ast_moutdwm(ast, 0x1E6E0074, 0x00000000); in ddr3_init()
1100 ast_moutdwm(ast, 0x1E6E0078, 0x00000000); in ddr3_init()
1101 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr3_init()
1104 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1105 } while (!(data & 0x08000000)); in ddr3_init()
1106 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1107 data = (data >> 8) & 0xff; in ddr3_init()
1108 while ((data & 0x08) || ((data & 0x7) < 2) || (data < 4)) { in ddr3_init()
1109 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr3_init()
1110 if ((data2 & 0xff) > param->madj_max) { in ddr3_init()
1113 ast_moutdwm(ast, 0x1E6E0064, data2); in ddr3_init()
1114 if (data2 & 0x00100000) { in ddr3_init()
1115 data2 = ((data2 & 0xff) >> 3) + 3; in ddr3_init()
1117 data2 = ((data2 & 0xff) >> 2) + 5; in ddr3_init()
1119 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr3_init()
1120 data2 += data & 0xff; in ddr3_init()
1122 ast_moutdwm(ast, 0x1E6E0068, data); in ddr3_init()
1124 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr3_init()
1126 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr3_init()
1127 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1128 data = data | 0x200; in ddr3_init()
1129 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1131 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1132 } while (!(data & 0x08000000)); in ddr3_init()
1134 data = ast_mindwm(ast, 0x1E6E001C); in ddr3_init()
1135 data = (data >> 8) & 0xff; in ddr3_init()
1137 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0068) & 0xffff); in ddr3_init()
1138 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr3_init()
1139 ast_moutdwm(ast, 0x1E6E0018, data); in ddr3_init()
1141 ast_moutdwm(ast, 0x1E6E0034, 0x00000001); in ddr3_init()
1142 ast_moutdwm(ast, 0x1E6E000C, 0x00000040); in ddr3_init()
1145 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); in ddr3_init()
1146 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr3_init()
1147 ast_moutdwm(ast, 0x1E6E0028, 0x00000005); in ddr3_init()
1148 ast_moutdwm(ast, 0x1E6E0028, 0x00000007); in ddr3_init()
1149 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr3_init()
1150 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr3_init()
1151 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS); in ddr3_init()
1152 ast_moutdwm(ast, 0x1E6E000C, 0x00005C08); in ddr3_init()
1153 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr3_init()
1155 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr3_init()
1156 data = 0; in ddr3_init()
1158 data = 0x300; in ddr3_init()
1161 data = data | 0x3000 | ((param->reg_AC2 & 0x60000) >> 3); in ddr3_init()
1163 ast_moutdwm(ast, 0x1E6E0034, data | 0x3); in ddr3_init()
1169 ast_moutdwm(ast, 0x1E6E0120, param->reg_FREQ); in ddr3_init()
1172 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr3_init()
1173 ast_moutdwm(ast, 0x1E6E0070, 0x221); in ddr3_init()
1175 data = ast_mindwm(ast, 0x1E6E0070); in ddr3_init()
1176 } while (!(data & 0x00001000)); in ddr3_init()
1177 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr3_init()
1178 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr3_init()
1179 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr3_init()
1189 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in get_ddr2_info()
1192 trap = (ast_mindwm(ast, 0x1E6E2070) >> 25) & 0x3; in get_ddr2_info()
1194 trap_AC2 += 0x00110000; in get_ddr2_info()
1195 trap_MRS = 0x00000040 | (trap << 4); in get_ddr2_info()
1198 param->reg_MADJ = 0x00034C4C; in get_ddr2_info()
1199 param->reg_SADJ = 0x00001800; in get_ddr2_info()
1200 param->reg_DRV = 0x000000F0; in get_ddr2_info()
1202 param->rodt = 0; in get_ddr2_info()
1206 ast_moutdwm(ast, 0x1E6E2020, 0x0130); in get_ddr2_info()
1207 param->wodt = 0; in get_ddr2_info()
1208 param->reg_AC1 = 0x11101513; in get_ddr2_info()
1209 param->reg_AC2 = 0x78117011; in get_ddr2_info()
1210 param->reg_DQSIC = 0x00000092; in get_ddr2_info()
1211 param->reg_MRS = 0x00000842; in get_ddr2_info()
1212 param->reg_EMRS = 0x00000000; in get_ddr2_info()
1213 param->reg_DRV = 0x000000F0; in get_ddr2_info()
1214 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1215 param->reg_DQIDLY = 0x0000005A; in get_ddr2_info()
1216 param->reg_FREQ = 0x00004AC0; in get_ddr2_info()
1221 ast_moutdwm(ast, 0x1E6E2020, 0x0190); in get_ddr2_info()
1223 param->reg_AC1 = 0x22202613; in get_ddr2_info()
1224 param->reg_AC2 = 0xAA009016 | trap_AC2; in get_ddr2_info()
1225 param->reg_DQSIC = 0x000000BA; in get_ddr2_info()
1226 param->reg_MRS = 0x00000A02 | trap_MRS; in get_ddr2_info()
1227 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1228 param->reg_DRV = 0x000000FA; in get_ddr2_info()
1229 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1230 param->reg_DQIDLY = 0x00000074; in get_ddr2_info()
1231 param->reg_FREQ = 0x00004DC0; in get_ddr2_info()
1237 param->reg_AC2 = 0xAA009012 | trap_AC2; in get_ddr2_info()
1240 param->reg_AC2 = 0xAA009016 | trap_AC2; in get_ddr2_info()
1243 param->reg_AC2 = 0xAA009023 | trap_AC2; in get_ddr2_info()
1246 param->reg_AC2 = 0xAA00903B | trap_AC2; in get_ddr2_info()
1252 ast_moutdwm(ast, 0x1E6E2020, 0x03F1); in get_ddr2_info()
1254 param->rodt = 0; in get_ddr2_info()
1255 param->reg_AC1 = 0x33302714; in get_ddr2_info()
1256 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1257 param->reg_DQSIC = 0x000000E2; in get_ddr2_info()
1258 param->reg_MRS = 0x00000C02 | trap_MRS; in get_ddr2_info()
1259 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1260 param->reg_DRV = 0x000000FA; in get_ddr2_info()
1261 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1262 param->reg_DQIDLY = 0x00000089; in get_ddr2_info()
1263 param->reg_FREQ = 0x00005040; in get_ddr2_info()
1269 param->reg_AC2 = 0xCC00B016 | trap_AC2; in get_ddr2_info()
1273 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1276 param->reg_AC2 = 0xCC00B02B | trap_AC2; in get_ddr2_info()
1279 param->reg_AC2 = 0xCC00B03F | trap_AC2; in get_ddr2_info()
1286 ast_moutdwm(ast, 0x1E6E2020, 0x01F0); in get_ddr2_info()
1288 param->rodt = 0; in get_ddr2_info()
1289 param->reg_AC1 = 0x33302714; in get_ddr2_info()
1290 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1291 param->reg_DQSIC = 0x000000E2; in get_ddr2_info()
1292 param->reg_MRS = 0x00000C02 | trap_MRS; in get_ddr2_info()
1293 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1294 param->reg_DRV = 0x000000FA; in get_ddr2_info()
1295 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1296 param->reg_DQIDLY = 0x00000089; in get_ddr2_info()
1297 param->reg_FREQ = 0x000050C0; in get_ddr2_info()
1303 param->reg_AC2 = 0xCC00B016 | trap_AC2; in get_ddr2_info()
1307 param->reg_AC2 = 0xCC00B01B | trap_AC2; in get_ddr2_info()
1310 param->reg_AC2 = 0xCC00B02B | trap_AC2; in get_ddr2_info()
1313 param->reg_AC2 = 0xCC00B03F | trap_AC2; in get_ddr2_info()
1319 ast_moutdwm(ast, 0x1E6E2020, 0x0230); in get_ddr2_info()
1320 param->wodt = 0; in get_ddr2_info()
1321 param->reg_AC1 = 0x33302815; in get_ddr2_info()
1322 param->reg_AC2 = 0xCD44B01E; in get_ddr2_info()
1323 param->reg_DQSIC = 0x000000FC; in get_ddr2_info()
1324 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1325 param->reg_EMRS = 0x00000000; in get_ddr2_info()
1326 param->reg_DRV = 0x00000000; in get_ddr2_info()
1327 param->reg_IOZ = 0x00000034; in get_ddr2_info()
1328 param->reg_DQIDLY = 0x00000097; in get_ddr2_info()
1329 param->reg_FREQ = 0x000052C0; in get_ddr2_info()
1334 ast_moutdwm(ast, 0x1E6E2020, 0x0261); in get_ddr2_info()
1337 param->reg_AC1 = 0x33302815; in get_ddr2_info()
1338 param->reg_AC2 = 0xDE44C022; in get_ddr2_info()
1339 param->reg_DQSIC = 0x00000117; in get_ddr2_info()
1340 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1341 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1342 param->reg_DRV = 0x0000000A; in get_ddr2_info()
1343 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1344 param->reg_DQIDLY = 0x000000A0; in get_ddr2_info()
1345 param->reg_FREQ = 0x000054C0; in get_ddr2_info()
1350 ast_moutdwm(ast, 0x1E6E2020, 0x0120); in get_ddr2_info()
1353 param->reg_AC1 = 0x33302815; in get_ddr2_info()
1354 param->reg_AC2 = 0xEF44D024; in get_ddr2_info()
1355 param->reg_DQSIC = 0x00000125; in get_ddr2_info()
1356 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1357 param->reg_EMRS = 0x00000004; in get_ddr2_info()
1358 param->reg_DRV = 0x000000F9; in get_ddr2_info()
1359 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1360 param->reg_DQIDLY = 0x000000A7; in get_ddr2_info()
1361 param->reg_FREQ = 0x000055C0; in get_ddr2_info()
1366 ast_moutdwm(ast, 0x1E6E2020, 0x02A1); in get_ddr2_info()
1369 param->reg_AC1 = 0x43402915; in get_ddr2_info()
1370 param->reg_AC2 = 0xFF44E025; in get_ddr2_info()
1371 param->reg_DQSIC = 0x00000132; in get_ddr2_info()
1372 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1373 param->reg_EMRS = 0x00000040; in get_ddr2_info()
1374 param->reg_DRV = 0x0000000A; in get_ddr2_info()
1375 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1376 param->reg_DQIDLY = 0x000000AD; in get_ddr2_info()
1377 param->reg_FREQ = 0x000056C0; in get_ddr2_info()
1382 ast_moutdwm(ast, 0x1E6E2020, 0x0140); in get_ddr2_info()
1385 param->reg_AC1 = 0x43402915; in get_ddr2_info()
1386 param->reg_AC2 = 0xFF44E027; in get_ddr2_info()
1387 param->reg_DQSIC = 0x0000013F; in get_ddr2_info()
1388 param->reg_MRS = 0x00000E72; in get_ddr2_info()
1389 param->reg_EMRS = 0x00000004; in get_ddr2_info()
1390 param->reg_DRV = 0x000000F5; in get_ddr2_info()
1391 param->reg_IOZ = 0x00000045; in get_ddr2_info()
1392 param->reg_DQIDLY = 0x000000B3; in get_ddr2_info()
1393 param->reg_FREQ = 0x000057C0; in get_ddr2_info()
1401 param->dram_config = 0x100; in get_ddr2_info()
1405 param->dram_config = 0x121; in get_ddr2_info()
1408 param->dram_config = 0x122; in get_ddr2_info()
1411 param->dram_config = 0x123; in get_ddr2_info()
1418 param->dram_config |= 0x00; in get_ddr2_info()
1421 param->dram_config |= 0x04; in get_ddr2_info()
1424 param->dram_config |= 0x08; in get_ddr2_info()
1427 param->dram_config |= 0x0c; in get_ddr2_info()
1434 u32 data, data2, retry = 0; in ddr2_init()
1437 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in ddr2_init()
1438 ast_moutdwm(ast, 0x1E6E0018, 0x00000100); in ddr2_init()
1439 ast_moutdwm(ast, 0x1E6E0024, 0x00000000); in ddr2_init()
1440 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ); in ddr2_init()
1441 ast_moutdwm(ast, 0x1E6E0068, param->reg_SADJ); in ddr2_init()
1443 ast_moutdwm(ast, 0x1E6E0064, param->reg_MADJ | 0xC0000); in ddr2_init()
1446 ast_moutdwm(ast, 0x1E6E0004, param->dram_config); in ddr2_init()
1447 ast_moutdwm(ast, 0x1E6E0008, 0x90040f); in ddr2_init()
1448 ast_moutdwm(ast, 0x1E6E0010, param->reg_AC1); in ddr2_init()
1449 ast_moutdwm(ast, 0x1E6E0014, param->reg_AC2); in ddr2_init()
1450 ast_moutdwm(ast, 0x1E6E0020, param->reg_DQSIC); in ddr2_init()
1451 ast_moutdwm(ast, 0x1E6E0080, 0x00000000); in ddr2_init()
1452 ast_moutdwm(ast, 0x1E6E0084, 0x00000000); in ddr2_init()
1453 ast_moutdwm(ast, 0x1E6E0088, param->reg_DQIDLY); in ddr2_init()
1454 ast_moutdwm(ast, 0x1E6E0018, 0x4000A130); in ddr2_init()
1455 ast_moutdwm(ast, 0x1E6E0018, 0x00002330); in ddr2_init()
1456 ast_moutdwm(ast, 0x1E6E0038, 0x00000000); in ddr2_init()
1457 ast_moutdwm(ast, 0x1E6E0040, 0xFF808000); in ddr2_init()
1458 ast_moutdwm(ast, 0x1E6E0044, 0x88848466); in ddr2_init()
1459 ast_moutdwm(ast, 0x1E6E0048, 0x44440008); in ddr2_init()
1460 ast_moutdwm(ast, 0x1E6E004C, 0x00000000); in ddr2_init()
1461 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr2_init()
1462 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr2_init()
1463 ast_moutdwm(ast, 0x1E6E0054, 0); in ddr2_init()
1464 ast_moutdwm(ast, 0x1E6E0060, param->reg_DRV); in ddr2_init()
1465 ast_moutdwm(ast, 0x1E6E006C, param->reg_IOZ); in ddr2_init()
1466 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr2_init()
1467 ast_moutdwm(ast, 0x1E6E0074, 0x00000000); in ddr2_init()
1468 ast_moutdwm(ast, 0x1E6E0078, 0x00000000); in ddr2_init()
1469 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr2_init()
1473 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1474 } while (!(data & 0x08000000)); in ddr2_init()
1475 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1476 data = (data >> 8) & 0xff; in ddr2_init()
1477 while ((data & 0x08) || ((data & 0x7) < 2) || (data < 4)) { in ddr2_init()
1478 data2 = (ast_mindwm(ast, 0x1E6E0064) & 0xfff3ffff) + 4; in ddr2_init()
1479 if ((data2 & 0xff) > param->madj_max) { in ddr2_init()
1482 ast_moutdwm(ast, 0x1E6E0064, data2); in ddr2_init()
1483 if (data2 & 0x00100000) { in ddr2_init()
1484 data2 = ((data2 & 0xff) >> 3) + 3; in ddr2_init()
1486 data2 = ((data2 & 0xff) >> 2) + 5; in ddr2_init()
1488 data = ast_mindwm(ast, 0x1E6E0068) & 0xffff00ff; in ddr2_init()
1489 data2 += data & 0xff; in ddr2_init()
1491 ast_moutdwm(ast, 0x1E6E0068, data); in ddr2_init()
1493 ast_moutdwm(ast, 0x1E6E0064, ast_mindwm(ast, 0x1E6E0064) | 0xC0000); in ddr2_init()
1495 data = ast_mindwm(ast, 0x1E6E0018) & 0xfffff1ff; in ddr2_init()
1496 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1497 data = data | 0x200; in ddr2_init()
1498 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1500 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1501 } while (!(data & 0x08000000)); in ddr2_init()
1503 data = ast_mindwm(ast, 0x1E6E001C); in ddr2_init()
1504 data = (data >> 8) & 0xff; in ddr2_init()
1506 ast_moutdwm(ast, 0x1E720058, ast_mindwm(ast, 0x1E6E0008) & 0xffff); in ddr2_init()
1507 data = ast_mindwm(ast, 0x1E6E0018) | 0xC00; in ddr2_init()
1508 ast_moutdwm(ast, 0x1E6E0018, data); in ddr2_init()
1510 ast_moutdwm(ast, 0x1E6E0034, 0x00000001); in ddr2_init()
1511 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr2_init()
1514 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS | 0x100); in ddr2_init()
1515 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr2_init()
1516 ast_moutdwm(ast, 0x1E6E0028, 0x00000005); in ddr2_init()
1517 ast_moutdwm(ast, 0x1E6E0028, 0x00000007); in ddr2_init()
1518 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1519 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr2_init()
1521 ast_moutdwm(ast, 0x1E6E000C, 0x00005C08); in ddr2_init()
1522 ast_moutdwm(ast, 0x1E6E002C, param->reg_MRS); in ddr2_init()
1523 ast_moutdwm(ast, 0x1E6E0028, 0x00000001); in ddr2_init()
1524 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS | 0x380); in ddr2_init()
1525 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1526 ast_moutdwm(ast, 0x1E6E0030, param->reg_EMRS); in ddr2_init()
1527 ast_moutdwm(ast, 0x1E6E0028, 0x00000003); in ddr2_init()
1529 ast_moutdwm(ast, 0x1E6E000C, 0x7FFF5C01); in ddr2_init()
1530 data = 0; in ddr2_init()
1532 data = 0x500; in ddr2_init()
1535 data = data | 0x3000 | ((param->reg_AC2 & 0x60000) >> 3); in ddr2_init()
1537 ast_moutdwm(ast, 0x1E6E0034, data | 0x3); in ddr2_init()
1538 ast_moutdwm(ast, 0x1E6E0120, param->reg_FREQ); in ddr2_init()
1546 ast_moutdwm(ast, 0x1E6E007C, 0x00000000); in ddr2_init()
1547 ast_moutdwm(ast, 0x1E6E0070, 0x221); in ddr2_init()
1549 data = ast_mindwm(ast, 0x1E6E0070); in ddr2_init()
1550 } while (!(data & 0x00001000)); in ddr2_init()
1551 ast_moutdwm(ast, 0x1E6E0070, 0x00000000); in ddr2_init()
1552 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr2_init()
1553 ast_moutdwm(ast, 0x1E6E0050, 0x00000000); in ddr2_init()
1565 reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_post_chip_2300()
1566 if ((reg & 0x80) == 0) {/* vga only */ in ast_post_chip_2300()
1567 ast_write32(ast, 0xf004, 0x1e6e0000); in ast_post_chip_2300()
1568 ast_write32(ast, 0xf000, 0x1); in ast_post_chip_2300()
1569 ast_write32(ast, 0x12000, 0x1688a8a8); in ast_post_chip_2300()
1572 } while (ast_read32(ast, 0x12000) != 0x1); in ast_post_chip_2300()
1574 ast_write32(ast, 0x10000, 0xfc600309); in ast_post_chip_2300()
1577 } while (ast_read32(ast, 0x10000) != 0x1); in ast_post_chip_2300()
1580 temp = ast_read32(ast, 0x12008); in ast_post_chip_2300()
1581 temp |= 0x73; in ast_post_chip_2300()
1582 ast_write32(ast, 0x12008, temp); in ast_post_chip_2300()
1586 temp = ast_mindwm(ast, 0x1e6e2070); in ast_post_chip_2300()
1587 if (temp & 0x01000000) in ast_post_chip_2300()
1589 switch (temp & 0x18000000) { in ast_post_chip_2300()
1590 case 0: in ast_post_chip_2300()
1594 case 0x08000000: in ast_post_chip_2300()
1597 case 0x10000000: in ast_post_chip_2300()
1600 case 0x18000000: in ast_post_chip_2300()
1604 switch (temp & 0x0c) { in ast_post_chip_2300()
1606 case 0x00: in ast_post_chip_2300()
1610 case 0x04: in ast_post_chip_2300()
1614 case 0x08: in ast_post_chip_2300()
1618 case 0x0c: in ast_post_chip_2300()
1631 temp = ast_mindwm(ast, 0x1e6e2040); in ast_post_chip_2300()
1632 ast_moutdwm(ast, 0x1e6e2040, temp | 0x40); in ast_post_chip_2300()
1637 reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_post_chip_2300()
1638 } while ((reg & 0x40) == 0); in ast_post_chip_2300()
1643 ast_moutdwm(ast, 0x1E6E0074, 0x0000FFFF); in cbr_test_2500()
1644 ast_moutdwm(ast, 0x1E6E007C, 0xFF00FF00); in cbr_test_2500()
1645 if (!mmc_test_burst(ast, 0)) in cbr_test_2500()
1647 if (!mmc_test_single_2500(ast, 0)) in cbr_test_2500()
1654 ast_moutdwm(ast, 0x1E6E0074, 0x0000FFFF); in ddr_test_2500()
1655 ast_moutdwm(ast, 0x1E6E007C, 0xFF00FF00); in ddr_test_2500()
1656 if (!mmc_test_burst(ast, 0)) in ddr_test_2500()
1664 if (!mmc_test_single_2500(ast, 0)) in ddr_test_2500()
1671 ast_moutdwm(ast, 0x1E6E0034, 0x00020080); in ddr_init_common_2500()
1672 ast_moutdwm(ast, 0x1E6E0008, 0x2003000F); in ddr_init_common_2500()
1673 ast_moutdwm(ast, 0x1E6E0038, 0x00000FFF); in ddr_init_common_2500()
1674 ast_moutdwm(ast, 0x1E6E0040, 0x88448844); in ddr_init_common_2500()
1675 ast_moutdwm(ast, 0x1E6E0044, 0x24422288); in ddr_init_common_2500()
1676 ast_moutdwm(ast, 0x1E6E0048, 0x22222222); in ddr_init_common_2500()
1677 ast_moutdwm(ast, 0x1E6E004C, 0x22222222); in ddr_init_common_2500()
1678 ast_moutdwm(ast, 0x1E6E0050, 0x80000000); in ddr_init_common_2500()
1679 ast_moutdwm(ast, 0x1E6E0208, 0x00000000); in ddr_init_common_2500()
1680 ast_moutdwm(ast, 0x1E6E0218, 0x00000000); in ddr_init_common_2500()
1681 ast_moutdwm(ast, 0x1E6E0220, 0x00000000); in ddr_init_common_2500()
1682 ast_moutdwm(ast, 0x1E6E0228, 0x00000000); in ddr_init_common_2500()
1683 ast_moutdwm(ast, 0x1E6E0230, 0x00000000); in ddr_init_common_2500()
1684 ast_moutdwm(ast, 0x1E6E02A8, 0x00000000); in ddr_init_common_2500()
1685 ast_moutdwm(ast, 0x1E6E02B0, 0x00000000); in ddr_init_common_2500()
1686 ast_moutdwm(ast, 0x1E6E0240, 0x86000000); in ddr_init_common_2500()
1687 ast_moutdwm(ast, 0x1E6E0244, 0x00008600); in ddr_init_common_2500()
1688 ast_moutdwm(ast, 0x1E6E0248, 0x80000000); in ddr_init_common_2500()
1689 ast_moutdwm(ast, 0x1E6E024C, 0x80808080); in ddr_init_common_2500()
1696 pass = 0; in ddr_phy_init_2500()
1697 ast_moutdwm(ast, 0x1E6E0060, 0x00000005); in ddr_phy_init_2500()
1699 for (timecnt = 0; timecnt < TIMEOUT; timecnt++) { in ddr_phy_init_2500()
1700 data = ast_mindwm(ast, 0x1E6E0060) & 0x1; in ddr_phy_init_2500()
1705 data = ast_mindwm(ast, 0x1E6E0300) & 0x000A0000; in ddr_phy_init_2500()
1710 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr_phy_init_2500()
1712 ast_moutdwm(ast, 0x1E6E0060, 0x00000005); in ddr_phy_init_2500()
1716 ast_moutdwm(ast, 0x1E6E0060, 0x00000006); in ddr_phy_init_2500()
1721 * 1Gb : 0x80000000 ~ 0x87FFFFFF
1722 * 2Gb : 0x80000000 ~ 0x8FFFFFFF
1723 * 4Gb : 0x80000000 ~ 0x9FFFFFFF
1724 * 8Gb : 0x80000000 ~ 0xBFFFFFFF
1730 reg_04 = ast_mindwm(ast, 0x1E6E0004) & 0xfffffffc; in check_dram_size_2500()
1731 reg_14 = ast_mindwm(ast, 0x1E6E0014) & 0xffffff00; in check_dram_size_2500()
1733 ast_moutdwm(ast, 0xA0100000, 0x41424344); in check_dram_size_2500()
1734 ast_moutdwm(ast, 0x90100000, 0x35363738); in check_dram_size_2500()
1735 ast_moutdwm(ast, 0x88100000, 0x292A2B2C); in check_dram_size_2500()
1736 ast_moutdwm(ast, 0x80100000, 0x1D1E1F10); in check_dram_size_2500()
1739 if (ast_mindwm(ast, 0xA0100000) == 0x41424344) { in check_dram_size_2500()
1740 reg_04 |= 0x03; in check_dram_size_2500()
1741 reg_14 |= (tRFC >> 24) & 0xFF; in check_dram_size_2500()
1743 } else if (ast_mindwm(ast, 0x90100000) == 0x35363738) { in check_dram_size_2500()
1744 reg_04 |= 0x02; in check_dram_size_2500()
1745 reg_14 |= (tRFC >> 16) & 0xFF; in check_dram_size_2500()
1747 } else if (ast_mindwm(ast, 0x88100000) == 0x292A2B2C) { in check_dram_size_2500()
1748 reg_04 |= 0x01; in check_dram_size_2500()
1749 reg_14 |= (tRFC >> 8) & 0xFF; in check_dram_size_2500()
1751 reg_14 |= tRFC & 0xFF; in check_dram_size_2500()
1753 ast_moutdwm(ast, 0x1E6E0004, reg_04); in check_dram_size_2500()
1754 ast_moutdwm(ast, 0x1E6E0014, reg_14); in check_dram_size_2500()
1761 reg_04 = ast_mindwm(ast, 0x1E6E0004); in enable_cache_2500()
1762 ast_moutdwm(ast, 0x1E6E0004, reg_04 | 0x1000); in enable_cache_2500()
1765 data = ast_mindwm(ast, 0x1E6E0004); in enable_cache_2500()
1766 while (!(data & 0x80000)); in enable_cache_2500()
1767 ast_moutdwm(ast, 0x1E6E0004, reg_04 | 0x400); in enable_cache_2500()
1775 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in set_mpll_2500()
1776 ast_moutdwm(ast, 0x1E6E0034, 0x00020080); in set_mpll_2500()
1777 for (addr = 0x1e6e0004; addr < 0x1e6e0090;) { in set_mpll_2500()
1778 ast_moutdwm(ast, addr, 0x0); in set_mpll_2500()
1781 ast_moutdwm(ast, 0x1E6E0034, 0x00020000); in set_mpll_2500()
1783 ast_moutdwm(ast, 0x1E6E2000, 0x1688A8A8); in set_mpll_2500()
1784 data = ast_mindwm(ast, 0x1E6E2070) & 0x00800000; in set_mpll_2500()
1787 param = 0x930023E0; in set_mpll_2500()
1788 ast_moutdwm(ast, 0x1E6E2160, 0x00011320); in set_mpll_2500()
1791 param = 0x93002400; in set_mpll_2500()
1793 ast_moutdwm(ast, 0x1E6E2020, param); in set_mpll_2500()
1799 ast_moutdwm(ast, 0x1E78505C, 0x00000004); in reset_mmc_2500()
1800 ast_moutdwm(ast, 0x1E785044, 0x00000001); in reset_mmc_2500()
1801 ast_moutdwm(ast, 0x1E785048, 0x00004755); in reset_mmc_2500()
1802 ast_moutdwm(ast, 0x1E78504C, 0x00000013); in reset_mmc_2500()
1804 ast_moutdwm(ast, 0x1E785054, 0x00000077); in reset_mmc_2500()
1805 ast_moutdwm(ast, 0x1E6E0000, 0xFC600309); in reset_mmc_2500()
1811 ast_moutdwm(ast, 0x1E6E0004, 0x00000303); in ddr3_init_2500()
1812 ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]); in ddr3_init_2500()
1813 ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]); in ddr3_init_2500()
1814 ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]); in ddr3_init_2500()
1815 ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]); /* MODEREG4/6 */ in ddr3_init_2500()
1816 ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]); /* MODEREG5 */ in ddr3_init_2500()
1817 ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */ in ddr3_init_2500()
1818 ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]); /* MODEREG1/3 */ in ddr3_init_2500()
1821 ast_moutdwm(ast, 0x1E6E0200, 0x02492AAE); in ddr3_init_2500()
1822 ast_moutdwm(ast, 0x1E6E0204, 0x00001001); in ddr3_init_2500()
1823 ast_moutdwm(ast, 0x1E6E020C, 0x55E00B0B); in ddr3_init_2500()
1824 ast_moutdwm(ast, 0x1E6E0210, 0x20000000); in ddr3_init_2500()
1825 ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]); in ddr3_init_2500()
1826 ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]); in ddr3_init_2500()
1827 ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]); in ddr3_init_2500()
1828 ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]); in ddr3_init_2500()
1829 ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]); in ddr3_init_2500()
1830 ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]); in ddr3_init_2500()
1831 ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]); in ddr3_init_2500()
1832 ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]); in ddr3_init_2500()
1833 ast_moutdwm(ast, 0x1E6E0290, 0x00100008); in ddr3_init_2500()
1834 ast_moutdwm(ast, 0x1E6E02C0, 0x00000006); in ddr3_init_2500()
1837 ast_moutdwm(ast, 0x1E6E0034, 0x00020091); in ddr3_init_2500()
1842 ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]); in ddr3_init_2500()
1843 ast_moutdwm(ast, 0x1E6E000C, 0x42AA5C81); in ddr3_init_2500()
1844 ast_moutdwm(ast, 0x1E6E0034, 0x0001AF93); in ddr3_init_2500()
1848 ast_moutdwm(ast, 0x1E6E001C, 0x00000008); in ddr3_init_2500()
1849 ast_moutdwm(ast, 0x1E6E0038, 0xFFFFFF00); in ddr3_init_2500()
1856 u32 min_ddr_vref = 0, min_phy_vref = 0; in ddr4_init_2500()
1857 u32 max_ddr_vref = 0, max_phy_vref = 0; in ddr4_init_2500()
1859 ast_moutdwm(ast, 0x1E6E0004, 0x00000313); in ddr4_init_2500()
1860 ast_moutdwm(ast, 0x1E6E0010, ddr_table[REGIDX_010]); in ddr4_init_2500()
1861 ast_moutdwm(ast, 0x1E6E0014, ddr_table[REGIDX_014]); in ddr4_init_2500()
1862 ast_moutdwm(ast, 0x1E6E0018, ddr_table[REGIDX_018]); in ddr4_init_2500()
1863 ast_moutdwm(ast, 0x1E6E0020, ddr_table[REGIDX_020]); /* MODEREG4/6 */ in ddr4_init_2500()
1864 ast_moutdwm(ast, 0x1E6E0024, ddr_table[REGIDX_024]); /* MODEREG5 */ in ddr4_init_2500()
1865 ast_moutdwm(ast, 0x1E6E002C, ddr_table[REGIDX_02C] | 0x100); /* MODEREG0/2 */ in ddr4_init_2500()
1866 ast_moutdwm(ast, 0x1E6E0030, ddr_table[REGIDX_030]); /* MODEREG1/3 */ in ddr4_init_2500()
1869 ast_moutdwm(ast, 0x1E6E0200, 0x42492AAE); in ddr4_init_2500()
1870 ast_moutdwm(ast, 0x1E6E0204, 0x09002000); in ddr4_init_2500()
1871 ast_moutdwm(ast, 0x1E6E020C, 0x55E00B0B); in ddr4_init_2500()
1872 ast_moutdwm(ast, 0x1E6E0210, 0x20000000); in ddr4_init_2500()
1873 ast_moutdwm(ast, 0x1E6E0214, ddr_table[REGIDX_214]); in ddr4_init_2500()
1874 ast_moutdwm(ast, 0x1E6E02E0, ddr_table[REGIDX_2E0]); in ddr4_init_2500()
1875 ast_moutdwm(ast, 0x1E6E02E4, ddr_table[REGIDX_2E4]); in ddr4_init_2500()
1876 ast_moutdwm(ast, 0x1E6E02E8, ddr_table[REGIDX_2E8]); in ddr4_init_2500()
1877 ast_moutdwm(ast, 0x1E6E02EC, ddr_table[REGIDX_2EC]); in ddr4_init_2500()
1878 ast_moutdwm(ast, 0x1E6E02F0, ddr_table[REGIDX_2F0]); in ddr4_init_2500()
1879 ast_moutdwm(ast, 0x1E6E02F4, ddr_table[REGIDX_2F4]); in ddr4_init_2500()
1880 ast_moutdwm(ast, 0x1E6E02F8, ddr_table[REGIDX_2F8]); in ddr4_init_2500()
1881 ast_moutdwm(ast, 0x1E6E0290, 0x00100008); in ddr4_init_2500()
1882 ast_moutdwm(ast, 0x1E6E02C4, 0x3C183C3C); in ddr4_init_2500()
1883 ast_moutdwm(ast, 0x1E6E02C8, 0x00631E0E); in ddr4_init_2500()
1886 ast_moutdwm(ast, 0x1E6E0034, 0x0001A991); in ddr4_init_2500()
1889 pass = 0; in ddr4_init_2500()
1891 for (retrycnt = 0; retrycnt < 4 && pass == 0; retrycnt++) { in ddr4_init_2500()
1892 max_phy_vref = 0x0; in ddr4_init_2500()
1893 pass = 0; in ddr4_init_2500()
1894 ast_moutdwm(ast, 0x1E6E02C0, 0x00001C06); in ddr4_init_2500()
1895 for (phy_vref = 0x40; phy_vref < 0x80; phy_vref++) { in ddr4_init_2500()
1896 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr4_init_2500()
1897 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr4_init_2500()
1898 ast_moutdwm(ast, 0x1E6E02CC, phy_vref | (phy_vref << 8)); in ddr4_init_2500()
1901 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr4_init_2500()
1904 data = ast_mindwm(ast, 0x1E6E03D0); in ddr4_init_2500()
1906 data = data & 0xff; in ddr4_init_2500()
1913 } else if (pass > 0) in ddr4_init_2500()
1917 ast_moutdwm(ast, 0x1E6E02CC, min_phy_vref | (min_phy_vref << 8)); in ddr4_init_2500()
1920 pass = 0; in ddr4_init_2500()
1922 for (retrycnt = 0; retrycnt < 4 && pass == 0; retrycnt++) { in ddr4_init_2500()
1923 min_ddr_vref = 0xFF; in ddr4_init_2500()
1924 max_ddr_vref = 0x0; in ddr4_init_2500()
1925 pass = 0; in ddr4_init_2500()
1926 for (ddr_vref = 0x00; ddr_vref < 0x40; ddr_vref++) { in ddr4_init_2500()
1927 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr4_init_2500()
1928 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr4_init_2500()
1929 ast_moutdwm(ast, 0x1E6E02C0, 0x00000006 | (ddr_vref << 8)); in ddr4_init_2500()
1932 ast_moutdwm(ast, 0x1E6E000C, 0x00005C01); in ddr4_init_2500()
1939 } else if (pass != 0) in ddr4_init_2500()
1944 ast_moutdwm(ast, 0x1E6E000C, 0x00000000); in ddr4_init_2500()
1945 ast_moutdwm(ast, 0x1E6E0060, 0x00000000); in ddr4_init_2500()
1947 ast_moutdwm(ast, 0x1E6E02C0, 0x00000006 | (ddr_vref << 8)); in ddr4_init_2500()
1952 ast_moutdwm(ast, 0x1E6E0120, ddr_table[REGIDX_PLL]); in ddr4_init_2500()
1953 ast_moutdwm(ast, 0x1E6E000C, 0x42AA5C81); in ddr4_init_2500()
1954 ast_moutdwm(ast, 0x1E6E0034, 0x0001AF93); in ddr4_init_2500()
1958 ast_moutdwm(ast, 0x1E6E001C, 0x00000008); in ddr4_init_2500()
1959 ast_moutdwm(ast, 0x1E6E0038, 0xFFFFFF00); in ddr4_init_2500()
1968 if (max_tries-- == 0) in ast_dram_init_2500()
1974 data = ast_mindwm(ast, 0x1E6E2070); in ast_dram_init_2500()
1975 if (data & 0x01000000) in ast_dram_init_2500()
1981 ast_moutdwm(ast, 0x1E6E2040, ast_mindwm(ast, 0x1E6E2040) | 0x41); in ast_dram_init_2500()
1984 data = ast_mindwm(ast, 0x1E6E200C) & 0xF9FFFFFF; in ast_dram_init_2500()
1985 ast_moutdwm(ast, 0x1E6E200C, data | 0x10000000); in ast_dram_init_2500()
1995 ast_moutdwm(ast, 0x1e600000, 0xAEED1A03); in ast_patch_ahb_2500()
1996 ast_moutdwm(ast, 0x1e600084, 0x00010000); in ast_patch_ahb_2500()
1997 ast_moutdwm(ast, 0x1e600088, 0x00000000); in ast_patch_ahb_2500()
1998 ast_moutdwm(ast, 0x1e6e2000, 0x1688A8A8); in ast_patch_ahb_2500()
1999 data = ast_mindwm(ast, 0x1e6e2070); in ast_patch_ahb_2500()
2000 if (data & 0x08000000) { /* check fast reset */ in ast_patch_ahb_2500()
2010 * [0]:= 1:WDT enable in ast_patch_ahb_2500()
2012 ast_moutdwm(ast, 0x1E785004, 0x00000010); in ast_patch_ahb_2500()
2013 ast_moutdwm(ast, 0x1E785008, 0x00004755); in ast_patch_ahb_2500()
2014 ast_moutdwm(ast, 0x1E78500c, 0x00000033); in ast_patch_ahb_2500()
2018 ast_moutdwm(ast, 0x1e6e2000, 0x1688A8A8); in ast_patch_ahb_2500()
2019 data = ast_mindwm(ast, 0x1e6e2000); in ast_patch_ahb_2500()
2021 ast_moutdwm(ast, 0x1e6e207c, 0x08000000); /* clear fast reset */ in ast_patch_ahb_2500()
2030 reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_post_chip_2500()
2031 if ((reg & AST_VRAM_INIT_STATUS_MASK) == 0) {/* vga only */ in ast_post_chip_2500()
2036 ast_moutdwm(ast, 0x1E78502C, 0x00000000); in ast_post_chip_2500()
2037 ast_moutdwm(ast, 0x1E78504C, 0x00000000); in ast_post_chip_2500()
2042 * [29]:= 1:Enable USB2.0 Host port#1 (that the mutually shared USB2.0 Hub in ast_post_chip_2500()
2045 * [14:13]:= 1x:USB2.0 Host2 controller in ast_post_chip_2500()
2048 * [18]: 0(24)/1(48) MHz) in ast_post_chip_2500()
2050 * [23]:= write 1 and then SCU70[23] will be clear as 0b. in ast_post_chip_2500()
2052 ast_moutdwm(ast, 0x1E6E2090, 0x20000000); in ast_post_chip_2500()
2053 ast_moutdwm(ast, 0x1E6E2094, 0x00004000); in ast_post_chip_2500()
2054 if (ast_mindwm(ast, 0x1E6E2070) & 0x00800000) { in ast_post_chip_2500()
2055 ast_moutdwm(ast, 0x1E6E207C, 0x00800000); in ast_post_chip_2500()
2057 ast_moutdwm(ast, 0x1E6E2070, 0x00800000); in ast_post_chip_2500()
2060 temp = ast_mindwm(ast, 0x1E6E2070); in ast_post_chip_2500()
2061 if (temp & 0x02000000) in ast_post_chip_2500()
2062 ast_moutdwm(ast, 0x1E6E207C, 0x00004000); in ast_post_chip_2500()
2065 temp = ast_read32(ast, 0x12008); in ast_post_chip_2500()
2066 temp |= 0x73; in ast_post_chip_2500()
2067 ast_write32(ast, 0x12008, temp); in ast_post_chip_2500()
2072 temp = ast_mindwm(ast, 0x1e6e2040); in ast_post_chip_2500()
2073 ast_moutdwm(ast, 0x1e6e2040, temp | 0x40); in ast_post_chip_2500()
2078 reg = ast_get_index_reg_mask(ast, AST_IO_CRTC_PORT, 0xd0, 0xff); in ast_post_chip_2500()
2079 } while ((reg & 0x40) == 0); in ast_post_chip_2500()