1 // SPDX-License-Identifier: GPL-2.0
4  *  Loongson PCH PIC support
7 #define pr_fmt(fmt) "pch-pic: " fmt
40 	void __iomem		*base;  member
58 	void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4;  in pch_pic_bitset()
60 	raw_spin_lock(&priv->pic_lock);  in pch_pic_bitset()
64 	raw_spin_unlock(&priv->pic_lock);  in pch_pic_bitset()
70 	void __iomem *addr = priv->base + offset + PIC_REG_IDX(bit) * 4;  in pch_pic_bitclr()
72 	raw_spin_lock(&priv->pic_lock);  in pch_pic_bitclr()
76 	raw_spin_unlock(&priv->pic_lock);  in pch_pic_bitclr()
83 	pch_pic_bitset(priv, PCH_PIC_MASK, d->hwirq);  in pch_pic_mask_irq()
91 	writel(BIT(PIC_REG_BIT(d->hwirq)),  in pch_pic_unmask_irq()
92 			priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4);  in pch_pic_unmask_irq()
95 	pch_pic_bitclr(priv, PCH_PIC_MASK, d->hwirq);  in pch_pic_unmask_irq()
105 		pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
106 		pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
110 		pch_pic_bitset(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
111 		pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
115 		pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
116 		pch_pic_bitclr(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
120 		pch_pic_bitclr(priv, PCH_PIC_EDGE, d->hwirq);  in pch_pic_set_type()
121 		pch_pic_bitset(priv, PCH_PIC_POL, d->hwirq);  in pch_pic_set_type()
125 		ret = -EINVAL;  in pch_pic_set_type()
137 	reg = readl(priv->base + PCH_PIC_EDGE + PIC_REG_IDX(d->hwirq) * 4);  in pch_pic_ack_irq()
138 	if (reg & BIT(PIC_REG_BIT(d->hwirq))) {  in pch_pic_ack_irq()
139 		writel(BIT(PIC_REG_BIT(d->hwirq)),  in pch_pic_ack_irq()
140 			priv->base + PCH_PIC_CLR + PIC_REG_IDX(d->hwirq) * 4);  in pch_pic_ack_irq()
146 	.name			= "PCH PIC",
160 	struct pch_pic *priv = d->host_data;  in pch_pic_domain_translate()
161 	struct device_node *of_node = to_of_node(fwspec->fwnode);  in pch_pic_domain_translate()
164 		if (fwspec->param_count < 2)  in pch_pic_domain_translate()
165 			return -EINVAL;  in pch_pic_domain_translate()
167 		*hwirq = fwspec->param[0];  in pch_pic_domain_translate()
168 		*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;  in pch_pic_domain_translate()
170 		if (fwspec->param_count < 1)  in pch_pic_domain_translate()
171 			return -EINVAL;  in pch_pic_domain_translate()
173 		*hwirq = fwspec->param[0] - priv->gsi_base;  in pch_pic_domain_translate()
174 		if (fwspec->param_count > 1)  in pch_pic_domain_translate()
175 			*type = fwspec->param[1] & IRQ_TYPE_SENSE_MASK;  in pch_pic_domain_translate()
191 	struct pch_pic *priv = domain->host_data;  in pch_pic_alloc()
197 	parent_fwspec.fwnode = domain->parent->fwnode;  in pch_pic_alloc()
199 	parent_fwspec.param[0] = hwirq + priv->ht_vec_base;  in pch_pic_alloc()
225 		writeb(priv->ht_vec_base + i, priv->base + PCH_INT_HTVEC(i));  in pch_pic_reset()
227 		writeb(1, priv->base + PCH_INT_ROUTE(i));  in pch_pic_reset()
232 		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_MASK + 4 * i);  in pch_pic_reset()
233 		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_CLR + 4 * i);  in pch_pic_reset()
235 		writel_relaxed(0, priv->base + PCH_PIC_AUTO0 + 4 * i);  in pch_pic_reset()
236 		writel_relaxed(0, priv->base + PCH_PIC_AUTO1 + 4 * i);  in pch_pic_reset()
238 		writel_relaxed(0xFFFFFFFF, priv->base + PCH_PIC_HTMSI_EN + 4 * i);  in pch_pic_reset()
248 			pch_pic_priv[i]->saved_vec_pol[j] =  in pch_pic_suspend()
249 				readl(pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);  in pch_pic_suspend()
250 			pch_pic_priv[i]->saved_vec_edge[j] =  in pch_pic_suspend()
251 				readl(pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);  in pch_pic_suspend()
252 			pch_pic_priv[i]->saved_vec_en[j] =  in pch_pic_suspend()
253 				readl(pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);  in pch_pic_suspend()
267 			writel(pch_pic_priv[i]->saved_vec_pol[j],  in pch_pic_resume()
268 					pch_pic_priv[i]->base + PCH_PIC_POL + 4 * j);  in pch_pic_resume()
269 			writel(pch_pic_priv[i]->saved_vec_edge[j],  in pch_pic_resume()
270 					pch_pic_priv[i]->base + PCH_PIC_EDGE + 4 * j);  in pch_pic_resume()
271 			writel(pch_pic_priv[i]->saved_vec_en[j],  in pch_pic_resume()
272 					pch_pic_priv[i]->base + PCH_PIC_MASK + 4 * j);  in pch_pic_resume()
290 		return -ENOMEM;  in pch_pic_init()
292 	raw_spin_lock_init(&priv->pic_lock);  in pch_pic_init()
293 	priv->base = ioremap(addr, size);  in pch_pic_init()
294 	if (!priv->base)  in pch_pic_init()
297 	priv->ht_vec_base = vec_base;  in pch_pic_init()
298 	priv->vec_count = ((readq(priv->base) >> 48) & 0xff) + 1;  in pch_pic_init()
299 	priv->gsi_base = gsi_base;  in pch_pic_init()
301 	priv->pic_domain = irq_domain_create_hierarchy(parent_domain, 0,  in pch_pic_init()
302 						priv->vec_count, domain_handle,  in pch_pic_init()
305 	if (!priv->pic_domain) {  in pch_pic_init()
320 	iounmap(priv->base);  in pch_pic_init()
324 	return -EINVAL;  in pch_pic_init()
337 		return -EINVAL;  in pch_pic_of_init()
342 		return -ENXIO;  in pch_pic_of_init()
345 	if (of_property_read_u32(node, "loongson,pic-base-vec", &vec_base)) {  in pch_pic_of_init()
346 		pr_err("Failed to determine pic-base-vec\n");  in pch_pic_of_init()
347 		return -EINVAL;  in pch_pic_of_init()
358 IRQCHIP_DECLARE(pch_pic, "loongson,pch-pic-1.0", pch_pic_of_init);
372 			return -1;  in find_pch_pic()
374 		if (gsi >= priv->gsi_base && gsi < (priv->gsi_base + priv->vec_count))  in find_pch_pic()
379 	return -1;  in find_pch_pic()
387 	return pch_lpc_acpi_init(pch_pic_priv[0]->pic_domain, pchlpc_entry);  in pch_lpc_parse_madt()
407 	if (find_pch_pic(acpi_pchpic->gsi_base) >= 0)  in pch_pic_acpi_init()
410 	domain_handle = irq_domain_alloc_fwnode(&acpi_pchpic->address);  in pch_pic_acpi_init()
413 		return -ENOMEM;  in pch_pic_acpi_init()
416 	ret = pch_pic_init(acpi_pchpic->address, acpi_pchpic->size,  in pch_pic_acpi_init()
417 				0, parent, domain_handle, acpi_pchpic->gsi_base);  in pch_pic_acpi_init()
424 	if (acpi_pchpic->id == 0)  in pch_pic_acpi_init()