Lines Matching +full:manual +full:- +full:strobe
1 // SPDX-License-Identifier: GPL-2.0
3 * sdhci_am654.c - SDHCI driver for TI's AM654 SOCs
5 * Copyright (C) 2018 Texas Instruments Incorporated - https://www.ti.com
18 #include "sdhci-cqhci.h"
19 #include "sdhci-pltfm.h"
88 #define SDHCI_AM654_AUTOSUSPEND_DELAY -1
107 [MMC_TIMING_LEGACY] = {"ti,otap-del-sel-legacy",
108 "ti,itap-del-sel-legacy",
110 [MMC_TIMING_MMC_HS] = {"ti,otap-del-sel-mmc-hs",
111 "ti,itap-del-sel-mmc-hs",
113 [MMC_TIMING_SD_HS] = {"ti,otap-del-sel-sd-hs",
114 "ti,itap-del-sel-sd-hs",
116 [MMC_TIMING_UHS_SDR12] = {"ti,otap-del-sel-sdr12",
117 "ti,itap-del-sel-sdr12",
119 [MMC_TIMING_UHS_SDR25] = {"ti,otap-del-sel-sdr25",
120 "ti,itap-del-sel-sdr25",
122 [MMC_TIMING_UHS_SDR50] = {"ti,otap-del-sel-sdr50",
125 [MMC_TIMING_UHS_SDR104] = {"ti,otap-del-sel-sdr104",
128 [MMC_TIMING_UHS_DDR50] = {"ti,otap-del-sel-ddr50",
131 [MMC_TIMING_MMC_DDR52] = {"ti,otap-del-sel-ddr52",
132 "ti,itap-del-sel-ddr52",
134 [MMC_TIMING_MMC_HS200] = {"ti,otap-del-sel-hs200",
137 [MMC_TIMING_MMC_HS400] = {"ti,otap-del-sel-hs400",
176 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, in sdhci_am654_setup_dll()
179 if (sdhci_am654->flags & FREQSEL_2_BIT) { in sdhci_am654_setup_dll()
197 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val); in sdhci_am654_setup_dll()
208 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, FREQSEL_MASK, in sdhci_am654_setup_dll()
213 val = sdhci_am654->trm_icp << DLL_TRIM_ICP_SHIFT; in sdhci_am654_setup_dll()
217 val |= sdhci_am654->drv_strength << DR_TY_SHIFT; in sdhci_am654_setup_dll()
218 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, mask, val); in sdhci_am654_setup_dll()
221 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, in sdhci_am654_setup_dll()
227 ret = regmap_read_poll_timeout(sdhci_am654->base, PHY_STAT1, val, in sdhci_am654_setup_dll()
230 dev_err(mmc_dev(host->mmc), "DLL failed to relock\n"); in sdhci_am654_setup_dll()
239 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, in sdhci_am654_write_itapdly()
241 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYSEL_MASK, in sdhci_am654_write_itapdly()
243 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPCHGWIN_MASK, 0); in sdhci_am654_write_itapdly()
251 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); in sdhci_am654_setup_delay_chain()
255 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, mask, val); in sdhci_am654_setup_delay_chain()
258 sdhci_am654->itap_del_sel[timing]); in sdhci_am654_setup_delay_chain()
265 unsigned char timing = host->mmc->ios.timing; in sdhci_am654_set_clock()
270 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, ENDLL_MASK, 0); in sdhci_am654_set_clock()
275 if (sdhci_am654->legacy_otapdly) in sdhci_am654_set_clock()
276 otap_del_sel = sdhci_am654->otap_del_sel[0]; in sdhci_am654_set_clock()
278 otap_del_sel = sdhci_am654->otap_del_sel[timing]; in sdhci_am654_set_clock()
288 if (sdhci_am654->flags & STRBSEL_4_BIT) in sdhci_am654_set_clock()
293 val |= sdhci_am654->strb_sel << STRBSEL_SHIFT; in sdhci_am654_set_clock()
296 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val); in sdhci_am654_set_clock()
303 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, in sdhci_am654_set_clock()
304 sdhci_am654->clkbuf_sel); in sdhci_am654_set_clock()
312 unsigned char timing = host->mmc->ios.timing; in sdhci_j721e_4bit_set_clock()
317 if (sdhci_am654->legacy_otapdly) in sdhci_j721e_4bit_set_clock()
318 otap_del_sel = sdhci_am654->otap_del_sel[0]; in sdhci_j721e_4bit_set_clock()
320 otap_del_sel = sdhci_am654->otap_del_sel[timing]; in sdhci_j721e_4bit_set_clock()
325 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, val); in sdhci_j721e_4bit_set_clock()
327 regmap_update_bits(sdhci_am654->base, PHY_CTRL5, CLKBUFSEL_MASK, in sdhci_j721e_4bit_set_clock()
328 sdhci_am654->clkbuf_sel); in sdhci_j721e_4bit_set_clock()
335 writeb(val, host->ioaddr + reg); in sdhci_am654_write_power_on()
337 return readb(host->ioaddr + reg); in sdhci_am654_write_power_on()
343 unsigned char timing = host->mmc->ios.timing; in sdhci_am654_write_b()
350 * According to the data manual, HISPD bit in sdhci_am654_write_b()
359 writeb(val, host->ioaddr + reg); in sdhci_am654_write_b()
371 dev_info(mmc_dev(host->mmc), "Power on failed\n"); in sdhci_am654_write_b()
383 if (sdhci_am654->quirks & SDHCI_AM654_QUIRK_FORCE_CDTEST) { in sdhci_am654_reset()
414 cqhci_irq(host->mmc, intmask, cmd_error, data_error); in sdhci_am654_cqhci_irq()
429 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, ITAPDLYENA_MASK, in sdhci_am654_platform_execute_tuning()
435 cur_val = !mmc_send_tuning(host->mmc, opcode, NULL); in sdhci_am654_platform_execute_tuning()
450 pass_len = ITAP_MAX - fail_len; in sdhci_am654_platform_execute_tuning()
558 cq_host = devm_kzalloc(mmc_dev(host->mmc), sizeof(struct cqhci_host), in sdhci_am654_cqe_add_host()
561 return -ENOMEM; in sdhci_am654_cqe_add_host()
563 cq_host->mmio = host->ioaddr + SDHCI_AM654_CQE_BASE_ADDR; in sdhci_am654_cqe_add_host()
564 cq_host->quirks |= CQHCI_QUIRK_SHORT_TXFR_DESC_SZ; in sdhci_am654_cqe_add_host()
565 cq_host->caps |= CQHCI_TASK_DESC_SZ_128; in sdhci_am654_cqe_add_host()
566 cq_host->ops = &sdhci_am654_cqhci_ops; in sdhci_am654_cqe_add_host()
568 host->mmc->caps2 |= MMC_CAP2_CQE; in sdhci_am654_cqe_add_host()
570 return cqhci_init(cq_host, host->mmc, 1); in sdhci_am654_cqe_add_host()
576 struct device *dev = mmc_dev(host->mmc); in sdhci_am654_get_otap_delay()
581 &sdhci_am654->otap_del_sel[MMC_TIMING_LEGACY]); in sdhci_am654_get_otap_delay()
584 * ti,otap-del-sel-legacy is mandatory, look for old binding in sdhci_am654_get_otap_delay()
587 ret = device_property_read_u32(dev, "ti,otap-del-sel", in sdhci_am654_get_otap_delay()
588 &sdhci_am654->otap_del_sel[0]); in sdhci_am654_get_otap_delay()
590 dev_err(dev, "Couldn't find otap-del-sel\n"); in sdhci_am654_get_otap_delay()
595 dev_info(dev, "Using legacy binding ti,otap-del-sel\n"); in sdhci_am654_get_otap_delay()
596 sdhci_am654->legacy_otapdly = true; in sdhci_am654_get_otap_delay()
604 &sdhci_am654->otap_del_sel[i]); in sdhci_am654_get_otap_delay()
610 * if an otap-del-sel value is not found in sdhci_am654_get_otap_delay()
613 host->mmc->caps &= ~td[i].capability; in sdhci_am654_get_otap_delay()
615 host->mmc->caps2 &= ~td[i].capability; in sdhci_am654_get_otap_delay()
620 &sdhci_am654->itap_del_sel[i]); in sdhci_am654_get_otap_delay()
637 regmap_update_bits(sdhci_am654->base, PHY_CTRL4, mask, 0x0); in sdhci_am654_init()
639 if (sdhci_am654->flags & DLL_CALIB) { in sdhci_am654_init()
640 regmap_read(sdhci_am654->base, PHY_STAT1, &val); in sdhci_am654_init()
643 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_init()
645 ret = regmap_read_poll_timeout(sdhci_am654->base, in sdhci_am654_init()
655 if (sdhci_am654->flags & IOMUX_PRESENT) in sdhci_am654_init()
656 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_init()
660 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) in sdhci_am654_init()
663 regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK, in sdhci_am654_init()
667 regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK, in sdhci_am654_init()
696 struct device *dev = &pdev->dev; in sdhci_am654_get_of_property()
700 if (sdhci_am654->flags & DLL_PRESENT) { in sdhci_am654_get_of_property()
701 ret = device_property_read_u32(dev, "ti,trm-icp", in sdhci_am654_get_of_property()
702 &sdhci_am654->trm_icp); in sdhci_am654_get_of_property()
706 ret = device_property_read_u32(dev, "ti,driver-strength-ohm", in sdhci_am654_get_of_property()
713 sdhci_am654->drv_strength = DRIVER_STRENGTH_50_OHM; in sdhci_am654_get_of_property()
716 sdhci_am654->drv_strength = DRIVER_STRENGTH_33_OHM; in sdhci_am654_get_of_property()
719 sdhci_am654->drv_strength = DRIVER_STRENGTH_66_OHM; in sdhci_am654_get_of_property()
722 sdhci_am654->drv_strength = DRIVER_STRENGTH_100_OHM; in sdhci_am654_get_of_property()
725 sdhci_am654->drv_strength = DRIVER_STRENGTH_40_OHM; in sdhci_am654_get_of_property()
729 return -EINVAL; in sdhci_am654_get_of_property()
733 device_property_read_u32(dev, "ti,strobe-sel", &sdhci_am654->strb_sel); in sdhci_am654_get_of_property()
734 device_property_read_u32(dev, "ti,clkbuf-sel", in sdhci_am654_get_of_property()
735 &sdhci_am654->clkbuf_sel); in sdhci_am654_get_of_property()
737 if (device_property_read_bool(dev, "ti,fails-without-test-cd")) in sdhci_am654_get_of_property()
738 sdhci_am654->quirks |= SDHCI_AM654_QUIRK_FORCE_CDTEST; in sdhci_am654_get_of_property()
747 .compatible = "ti,am654-sdhci-5.1",
751 .compatible = "ti,j721e-sdhci-8bit",
755 .compatible = "ti,j721e-sdhci-4bit",
759 .compatible = "ti,am64-sdhci-8bit",
763 .compatible = "ti,am64-sdhci-4bit",
767 .compatible = "ti,am62-sdhci",
783 struct device *dev = &pdev->dev; in sdhci_am654_probe()
787 match = of_match_node(sdhci_am654_of_match, pdev->dev.of_node); in sdhci_am654_probe()
788 drvdata = match->data; in sdhci_am654_probe()
792 if (soc && soc->data) in sdhci_am654_probe()
793 drvdata = soc->data; in sdhci_am654_probe()
795 host = sdhci_pltfm_init(pdev, drvdata->pdata, sizeof(*sdhci_am654)); in sdhci_am654_probe()
801 sdhci_am654->flags = drvdata->flags; in sdhci_am654_probe()
810 pltfm_host->clk = clk_xin; in sdhci_am654_probe()
818 sdhci_am654->base = devm_regmap_init_mmio(dev, base, in sdhci_am654_probe()
820 if (IS_ERR(sdhci_am654->base)) { in sdhci_am654_probe()
822 ret = PTR_ERR(sdhci_am654->base); in sdhci_am654_probe()
830 ret = mmc_of_parse(host->mmc); in sdhci_am654_probe()
836 host->mmc_host_ops.execute_tuning = sdhci_am654_execute_tuning; in sdhci_am654_probe()
843 ret = clk_prepare_enable(pltfm_host->clk); in sdhci_am654_probe()
859 clk_disable_unprepare(pltfm_host->clk); in sdhci_am654_probe()
873 struct device *dev = &pdev->dev; in sdhci_am654_remove()
881 clk_disable_unprepare(pltfm_host->clk); in sdhci_am654_remove()
896 if (sdhci_am654->flags & DLL_CALIB) { in sdhci_am654_restore()
897 regmap_read(sdhci_am654->base, PHY_STAT1, &val); in sdhci_am654_restore()
900 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_restore()
902 ret = regmap_read_poll_timeout(sdhci_am654->base, in sdhci_am654_restore()
912 if (sdhci_am654->flags & IOMUX_PRESENT) in sdhci_am654_restore()
913 regmap_update_bits(sdhci_am654->base, PHY_CTRL1, in sdhci_am654_restore()
917 if (host->mmc->caps & MMC_CAP_NONREMOVABLE) in sdhci_am654_restore()
920 regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK, in sdhci_am654_restore()
923 regmap_read(sdhci_am654->base, CTL_CFG_3, &val); in sdhci_am654_restore()
926 regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK, in sdhci_am654_restore()
938 if (host->tuning_mode != SDHCI_TUNING_MODE_3) in sdhci_am654_runtime_suspend()
939 mmc_retune_needed(host->mmc); in sdhci_am654_runtime_suspend()
941 ret = cqhci_suspend(host->mmc); in sdhci_am654_runtime_suspend()
950 clk_disable_unprepare(pltfm_host->clk); in sdhci_am654_runtime_suspend()
961 ret = clk_prepare_enable(pltfm_host->clk); in sdhci_am654_runtime_resume()
973 ret = cqhci_resume(host->mmc); in sdhci_am654_runtime_resume()
990 .name = "sdhci-am654",