Lines Matching +full:perst +full:- +full:regs
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2014 Texas Instruments., Ltd.
8 * Author: Murali Karicheri <m-karicheri2@ti.com>
9 * Implementation based on pci-exynos.c and pcie-designware.c
31 #include "pcie-designware.h"
54 #define PCIE_LEGACY_IRQ_ENABLE_SET(n) (0x188 + (0x10 * ((n) - 1)))
55 #define PCIE_LEGACY_IRQ_ENABLE_CLR(n) (0x18c + (0x10 * ((n) - 1)))
79 #define ERR_NONFATAL BIT(2) /* Non-fatal error */
105 #define to_keystone_pcie(x) dev_get_drvdata((x)->dev)
138 return readl(ks_pcie->va_app_base + offset); in ks_pcie_app_readl()
144 writel(val, ks_pcie->va_app_base + offset); in ks_pcie_app_writel()
151 u32 irq = data->hwirq; in ks_pcie_msi_irq_ack()
177 msi_target = ks_pcie->app.start + MSI_IRQ; in ks_pcie_compose_msi_msg()
178 msg->address_lo = lower_32_bits(msi_target); in ks_pcie_compose_msi_msg()
179 msg->address_hi = upper_32_bits(msi_target); in ks_pcie_compose_msi_msg()
180 msg->data = data->hwirq; in ks_pcie_compose_msi_msg()
182 dev_dbg(pci->dev, "msi#%d address_hi %#x address_lo %#x\n", in ks_pcie_compose_msi_msg()
183 (int)data->hwirq, msg->address_hi, msg->address_lo); in ks_pcie_compose_msi_msg()
189 return -EINVAL; in ks_pcie_msi_set_affinity()
196 u32 irq = data->hwirq; in ks_pcie_msi_mask()
202 raw_spin_lock_irqsave(&pp->lock, flags); in ks_pcie_msi_mask()
213 raw_spin_unlock_irqrestore(&pp->lock, flags); in ks_pcie_msi_mask()
220 u32 irq = data->hwirq; in ks_pcie_msi_unmask()
226 raw_spin_lock_irqsave(&pp->lock, flags); in ks_pcie_msi_unmask()
237 raw_spin_unlock_irqrestore(&pp->lock, flags); in ks_pcie_msi_unmask()
241 .name = "KEYSTONE-PCI-MSI",
251 pp->msi_irq_chip = &ks_pcie_msi_irq_chip; in ks_pcie_msi_host_init()
258 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_handle_legacy_irq()
259 struct device *dev = pci->dev; in ks_pcie_handle_legacy_irq()
266 generic_handle_domain_irq(ks_pcie->legacy_irq_domain, offset); in ks_pcie_handle_legacy_irq()
281 struct device *dev = ks_pcie->pci->dev; in ks_pcie_handle_error_irq()
299 if (!ks_pcie->is_am6 && (reg & ERR_AXI)) in ks_pcie_handle_error_irq()
302 if (reg & ERR_AER || (ks_pcie->is_am6 && (reg & AM6_ERR_AER))) in ks_pcie_handle_error_irq()
323 .name = "Keystone-PCI-Legacy-IRQ",
335 irq_set_chip_data(irq, d->host_data); in ks_pcie_init_legacy_irq_map()
346 * ks_pcie_set_dbi_mode() - Set DBI mode to access overlaid BAR mask registers
367 * ks_pcie_clear_dbi_mode() - Disable DBI mode
390 u32 num_viewport = ks_pcie->num_viewport; in ks_pcie_setup_rc_app_regs()
391 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_setup_rc_app_regs()
392 struct dw_pcie_rp *pp = &pci->pp; in ks_pcie_setup_rc_app_regs()
397 mem = resource_list_first_type(&pp->bridge->windows, IORESOURCE_MEM)->res; in ks_pcie_setup_rc_app_regs()
398 start = mem->start; in ks_pcie_setup_rc_app_regs()
399 end = mem->end; in ks_pcie_setup_rc_app_regs()
407 if (ks_pcie->is_am6) in ks_pcie_setup_rc_app_regs()
413 /* Using Direct 1:1 mapping of RC <-> PCI memory space */ in ks_pcie_setup_rc_app_regs()
430 struct dw_pcie_rp *pp = bus->sysdata; in ks_pcie_other_map_bus()
435 reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) | in ks_pcie_other_map_bus()
437 if (!pci_is_root_bus(bus->parent)) in ks_pcie_other_map_bus()
441 return pp->va_cfg0_base + where; in ks_pcie_other_map_bus()
451 * ks_pcie_v3_65_add_bus() - keystone add_bus post initialization
458 struct dw_pcie_rp *pp = bus->sysdata; in ks_pcie_v3_65_add_bus()
470 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1); in ks_pcie_v3_65_add_bus()
478 dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start); in ks_pcie_v3_65_add_bus()
491 * ks_pcie_link_up() - Check if link up
529 struct pci_bus *bus = dev->bus; in ks_pcie_quirk()
548 bridge = bus->self; in ks_pcie_quirk()
549 bus = bus->parent; in ks_pcie_quirk()
563 dev_info(&dev->dev, "limiting MRRS to 256\n"); in ks_pcie_quirk()
572 unsigned int irq = desc->irq_data.hwirq; in ks_pcie_msi_irq_handler()
574 u32 offset = irq - ks_pcie->msi_host_irq; in ks_pcie_msi_irq_handler()
575 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_msi_irq_handler()
576 struct dw_pcie_rp *pp = &pci->pp; in ks_pcie_msi_irq_handler()
577 struct device *dev = pci->dev; in ks_pcie_msi_irq_handler()
592 * MSI0 status bit 0-3 shows vectors 0, 8, 16, 24, MSI1 status bit in ks_pcie_msi_irq_handler()
601 generic_handle_domain_irq(pp->irq_domain, vector); in ks_pcie_msi_irq_handler()
608 * ks_pcie_legacy_irq_handler() - Handle legacy interrupt
618 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_legacy_irq_handler()
619 struct device *dev = pci->dev; in ks_pcie_legacy_irq_handler()
620 u32 irq_offset = irq - ks_pcie->legacy_host_irqs[0]; in ks_pcie_legacy_irq_handler()
637 struct device *dev = ks_pcie->pci->dev; in ks_pcie_config_msi_irq()
638 struct device_node *np = ks_pcie->np; in ks_pcie_config_msi_irq()
646 intc_np = of_get_child_by_name(np, "msi-interrupt-controller"); in ks_pcie_config_msi_irq()
648 if (ks_pcie->is_am6) in ks_pcie_config_msi_irq()
650 dev_warn(dev, "msi-interrupt-controller node is absent\n"); in ks_pcie_config_msi_irq()
651 return -EINVAL; in ks_pcie_config_msi_irq()
656 dev_err(dev, "No IRQ entries in msi-interrupt-controller\n"); in ks_pcie_config_msi_irq()
657 ret = -EINVAL; in ks_pcie_config_msi_irq()
664 ret = -EINVAL; in ks_pcie_config_msi_irq()
668 if (!ks_pcie->msi_host_irq) { in ks_pcie_config_msi_irq()
671 ret = -EINVAL; in ks_pcie_config_msi_irq()
674 ks_pcie->msi_host_irq = irq_data->hwirq; in ks_pcie_config_msi_irq()
691 struct device *dev = ks_pcie->pci->dev; in ks_pcie_config_legacy_irq()
693 struct device_node *np = ks_pcie->np; in ks_pcie_config_legacy_irq()
697 intc_np = of_get_child_by_name(np, "legacy-interrupt-controller"); in ks_pcie_config_legacy_irq()
700 * Since legacy interrupts are modeled as edge-interrupts in in ks_pcie_config_legacy_irq()
703 if (ks_pcie->is_am6) in ks_pcie_config_legacy_irq()
705 dev_warn(dev, "legacy-interrupt-controller node is absent\n"); in ks_pcie_config_legacy_irq()
706 return -EINVAL; in ks_pcie_config_legacy_irq()
711 dev_err(dev, "No IRQ entries in legacy-interrupt-controller\n"); in ks_pcie_config_legacy_irq()
712 ret = -EINVAL; in ks_pcie_config_legacy_irq()
719 ret = -EINVAL; in ks_pcie_config_legacy_irq()
722 ks_pcie->legacy_host_irqs[i] = irq; in ks_pcie_config_legacy_irq()
734 ret = -EINVAL; in ks_pcie_config_legacy_irq()
737 ks_pcie->legacy_irq_domain = legacy_irq_domain; in ks_pcie_config_legacy_irq()
754 struct pt_regs *regs) in ks_pcie_fault() argument
756 unsigned long instr = *(unsigned long *) instruction_pointer(regs); in ks_pcie_fault()
761 regs->uregs[reg] = -1; in ks_pcie_fault()
762 regs->ARM_pc += 4; in ks_pcie_fault()
774 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_init_id()
775 struct device *dev = pci->dev; in ks_pcie_init_id()
776 struct device_node *np = dev->of_node; in ks_pcie_init_id()
780 devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-id"); in ks_pcie_init_id()
785 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-id", 1, 0, &args); in ks_pcie_init_id()
807 pp->bridge->ops = &ks_pcie_ops; in ks_pcie_host_init()
808 if (!ks_pcie->is_am6) in ks_pcie_host_init()
809 pp->bridge->child_ops = &ks_child_pcie_ops; in ks_pcie_host_init()
822 pci->dbi_base + PCI_IO_BASE); in ks_pcie_host_init()
878 ep->page_size = AM654_WIN_SIZE; in ks_pcie_am654_ep_init()
880 dw_pcie_writel_dbi2(pci, PCI_BASE_ADDRESS_0, APP_ADDR_SPACE_0 - 1); in ks_pcie_am654_ep_init()
886 struct dw_pcie *pci = ks_pcie->pci; in ks_pcie_am654_raise_legacy_irq()
920 dev_err(pci->dev, "UNKNOWN IRQ type\n"); in ks_pcie_am654_raise_irq()
921 return -EINVAL; in ks_pcie_am654_raise_irq()
954 int num_lanes = ks_pcie->num_lanes; in ks_pcie_disable_phy()
956 while (num_lanes--) { in ks_pcie_disable_phy()
957 phy_power_off(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
958 phy_exit(ks_pcie->phy[num_lanes]); in ks_pcie_disable_phy()
966 int num_lanes = ks_pcie->num_lanes; in ks_pcie_enable_phy()
969 ret = phy_reset(ks_pcie->phy[i]); in ks_pcie_enable_phy()
973 ret = phy_init(ks_pcie->phy[i]); in ks_pcie_enable_phy()
977 ret = phy_power_on(ks_pcie->phy[i]); in ks_pcie_enable_phy()
979 phy_exit(ks_pcie->phy[i]); in ks_pcie_enable_phy()
987 while (--i >= 0) { in ks_pcie_enable_phy()
988 phy_power_off(ks_pcie->phy[i]); in ks_pcie_enable_phy()
989 phy_exit(ks_pcie->phy[i]); in ks_pcie_enable_phy()
997 struct device_node *np = dev->of_node; in ks_pcie_set_mode()
1005 syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); in ks_pcie_set_mode()
1010 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args); in ks_pcie_set_mode()
1029 struct device_node *np = dev->of_node; in ks_pcie_am654_set_mode()
1037 syscon = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-mode"); in ks_pcie_am654_set_mode()
1042 ret = of_parse_phandle_with_fixed_args(np, "ti,syscon-pcie-mode", 1, 0, &args); in ks_pcie_am654_set_mode()
1057 return -EINVAL; in ks_pcie_am654_set_mode()
1090 .compatible = "ti,keystone-pcie",
1094 .compatible = "ti,am654-pcie-rc",
1098 .compatible = "ti,am654-pcie-ep",
1107 struct device *dev = &pdev->dev; in ks_pcie_probe()
1108 struct device_node *np = dev->of_node; in ks_pcie_probe()
1128 return -EINVAL; in ks_pcie_probe()
1130 version = data->version; in ks_pcie_probe()
1131 host_ops = data->host_ops; in ks_pcie_probe()
1132 ep_ops = data->ep_ops; in ks_pcie_probe()
1133 mode = data->mode; in ks_pcie_probe()
1137 return -ENOMEM; in ks_pcie_probe()
1141 return -ENOMEM; in ks_pcie_probe()
1144 ks_pcie->va_app_base = devm_ioremap_resource(dev, res); in ks_pcie_probe()
1145 if (IS_ERR(ks_pcie->va_app_base)) in ks_pcie_probe()
1146 return PTR_ERR(ks_pcie->va_app_base); in ks_pcie_probe()
1148 ks_pcie->app = *res; in ks_pcie_probe()
1155 if (of_device_is_compatible(np, "ti,am654-pcie-rc")) in ks_pcie_probe()
1156 ks_pcie->is_am6 = true; in ks_pcie_probe()
1158 pci->dbi_base = base; in ks_pcie_probe()
1159 pci->dbi_base2 = base; in ks_pcie_probe()
1160 pci->dev = dev; in ks_pcie_probe()
1161 pci->ops = &ks_pcie_dw_pcie_ops; in ks_pcie_probe()
1162 pci->version = version; in ks_pcie_probe()
1169 "ks-pcie-error-irq", ks_pcie); in ks_pcie_probe()
1176 ret = of_property_read_u32(np, "num-lanes", &num_lanes); in ks_pcie_probe()
1182 return -ENOMEM; in ks_pcie_probe()
1186 return -ENOMEM; in ks_pcie_probe()
1189 snprintf(name, sizeof(name), "pcie-phy%d", i); in ks_pcie_probe()
1199 link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS); in ks_pcie_probe()
1201 ret = -EINVAL; in ks_pcie_probe()
1206 ks_pcie->np = np; in ks_pcie_probe()
1207 ks_pcie->pci = pci; in ks_pcie_probe()
1208 ks_pcie->link = link; in ks_pcie_probe()
1209 ks_pcie->num_lanes = num_lanes; in ks_pcie_probe()
1210 ks_pcie->phy = phy; in ks_pcie_probe()
1216 if (ret != -EPROBE_DEFER) in ks_pcie_probe()
1223 phy_pm_runtime_get_sync(ks_pcie->phy[i]); in ks_pcie_probe()
1229 phy_pm_runtime_put_sync(ks_pcie->phy[i]); in ks_pcie_probe()
1254 ret = -ENODEV; in ks_pcie_probe()
1258 ret = of_property_read_u32(np, "num-viewport", &num_viewport); in ks_pcie_probe()
1260 dev_err(dev, "unable to read *num-viewport* property\n"); in ks_pcie_probe()
1267 * indicates PERST# should be deasserted after minimum of 100us in ks_pcie_probe()
1269 * mode is selected while enabling the PHY. So deassert PERST# in ks_pcie_probe()
1277 ks_pcie->num_viewport = num_viewport; in ks_pcie_probe()
1278 pci->pp.ops = host_ops; in ks_pcie_probe()
1279 ret = dw_pcie_host_init(&pci->pp); in ks_pcie_probe()
1285 ret = -ENODEV; in ks_pcie_probe()
1289 pci->ep.ops = ep_ops; in ks_pcie_probe()
1290 ret = dw_pcie_ep_init(&pci->ep); in ks_pcie_probe()
1308 while (--i >= 0 && link[i]) in ks_pcie_probe()
1317 struct device_link **link = ks_pcie->link; in ks_pcie_remove()
1318 int num_lanes = ks_pcie->num_lanes; in ks_pcie_remove()
1319 struct device *dev = &pdev->dev; in ks_pcie_remove()
1324 while (num_lanes--) in ks_pcie_remove()
1334 .name = "keystone-pcie",