Lines Matching full:dtc
123 /* The DTC node is where the magic happens */
127 /* DTC counters are paired in 64-bit registers on a 16-byte stride. Yuck */
153 * Even in the worst case a DTC counter can't wrap in fewer than 2^42 cycles,
292 u8 dtc; member
349 struct arm_cmn_dtc *dtc; member
543 u8 dtc = cmn->xps[xp_base + x].dtc; in arm_cmn_map_show() local
545 if (dtc & (dtc - 1)) in arm_cmn_map_show()
546 seq_puts(s, " DTC ?? |"); in arm_cmn_map_show()
548 seq_printf(s, " DTC %ld |", __ffs(dtc)); in arm_cmn_map_show()
1369 writel_relaxed(0, cmn->dtc[0].base + CMN_DT_PMCR); in arm_cmn_set_state()
1378 cmn->dtc[0].base + CMN_DT_PMCR); in arm_cmn_clear_state()
1411 static u64 arm_cmn_read_cc(struct arm_cmn_dtc *dtc) in arm_cmn_read_cc() argument
1413 u64 val = readq_relaxed(dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
1415 writeq_relaxed(CMN_CC_INIT, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_read_cc()
1419 static u32 arm_cmn_read_counter(struct arm_cmn_dtc *dtc, int idx) in arm_cmn_read_counter() argument
1423 val = readl_relaxed(dtc->base + pmevcnt); in arm_cmn_read_counter()
1424 writel_relaxed(CMN_COUNTER_INIT, dtc->base + pmevcnt); in arm_cmn_read_counter()
1436 writel_relaxed(CMN_COUNTER_INIT, cmn->dtc[i].base + pmevcnt); in arm_cmn_init_counter()
1437 cmn->dtc[i].counters[hw->dtc_idx] = event; in arm_cmn_init_counter()
1454 delta = arm_cmn_read_cc(cmn->dtc + i); in arm_cmn_event_read()
1465 new = arm_cmn_read_counter(cmn->dtc + i, hw->dtc_idx); in arm_cmn_event_read()
1522 writeq_relaxed(CMN_CC_INIT, cmn->dtc[i].base + CMN_DT_PMCCNTR); in arm_cmn_event_start()
1523 cmn->dtc[i].cc_active = true; in arm_cmn_event_start()
1553 cmn->dtc[i].cc_active = false; in arm_cmn_event_stop()
1711 /* DTC events (i.e. cycles) already have everything they need */ in arm_cmn_event_init()
1756 * Keep assuming non-cycles events count in all DTC domains; turns out in arm_cmn_event_init()
1787 cmn->dtc[i].counters[hw->dtc_idx] = NULL; in arm_cmn_event_clear()
1794 struct arm_cmn_dtc *dtc = &cmn->dtc[0]; in arm_cmn_event_add() local
1801 while (cmn->dtc[i].cycles) in arm_cmn_event_add()
1805 cmn->dtc[i].cycles = event; in arm_cmn_event_add()
1816 while (dtc->counters[dtc_idx]) in arm_cmn_event_add()
1844 CMN_EVENT_WP_COMBINE(dtc->counters[tmp])) in arm_cmn_event_add()
1896 cmn->dtc[__ffs(hw->dtcs_used)].cycles = NULL; in arm_cmn_event_del()
1929 irq_set_affinity(cmn->dtc[i].irq, cpumask_of(cpu)); in arm_cmn_migrate()
1969 struct arm_cmn_dtc *dtc = dev_id; in arm_cmn_handle_irq() local
1973 u32 status = readl_relaxed(dtc->base + CMN_DT_PMOVSR); in arm_cmn_handle_irq()
1980 if (WARN_ON(!dtc->counters[i])) in arm_cmn_handle_irq()
1982 delta = (u64)arm_cmn_read_counter(dtc, i) << 16; in arm_cmn_handle_irq()
1983 local64_add(delta, &dtc->counters[i]->count); in arm_cmn_handle_irq()
1989 if (dtc->cc_active && !WARN_ON(!dtc->cycles)) { in arm_cmn_handle_irq()
1990 delta = arm_cmn_read_cc(dtc); in arm_cmn_handle_irq()
1991 local64_add(delta, &dtc->cycles->count); in arm_cmn_handle_irq()
1995 writel_relaxed(status, dtc->base + CMN_DT_PMOVSR_CLR); in arm_cmn_handle_irq()
1997 if (!dtc->irq_friend) in arm_cmn_handle_irq()
1999 dtc += dtc->irq_friend; in arm_cmn_handle_irq()
2009 irq = cmn->dtc[i].irq; in arm_cmn_init_irqs()
2011 if (cmn->dtc[j].irq == irq) { in arm_cmn_init_irqs()
2012 cmn->dtc[j].irq_friend = i - j; in arm_cmn_init_irqs()
2018 dev_name(cmn->dev), &cmn->dtc[i]); in arm_cmn_init_irqs()
2047 struct arm_cmn_dtc *dtc = cmn->dtc + idx; in arm_cmn_init_dtc() local
2049 dtc->base = dn->pmu_base - CMN_PMU_OFFSET; in arm_cmn_init_dtc()
2050 dtc->irq = platform_get_irq(to_platform_device(cmn->dev), idx); in arm_cmn_init_dtc()
2051 if (dtc->irq < 0) in arm_cmn_init_dtc()
2052 return dtc->irq; in arm_cmn_init_dtc()
2054 writel_relaxed(CMN_DT_DTC_CTL_DT_EN, dtc->base + CMN_DT_DTC_CTL); in arm_cmn_init_dtc()
2055 writel_relaxed(CMN_DT_PMCR_PMU_EN | CMN_DT_PMCR_OVFL_INTR_EN, dtc->base + CMN_DT_PMCR); in arm_cmn_init_dtc()
2056 writeq_relaxed(0, dtc->base + CMN_DT_PMCCNTR); in arm_cmn_init_dtc()
2057 writel_relaxed(0x1ff, dtc->base + CMN_DT_PMOVSR_CLR); in arm_cmn_init_dtc()
2079 cmn->dtc = devm_kcalloc(cmn->dev, cmn->num_dtcs, sizeof(cmn->dtc[0]), GFP_KERNEL); in arm_cmn_init_dtcs()
2080 if (!cmn->dtc) in arm_cmn_init_dtcs()
2089 dn->dtc &= dtcs_present; in arm_cmn_init_dtcs()
2100 /* We do at least know that a DTC's XP must be in that DTC's domain */ in arm_cmn_init_dtcs()
2101 if (xp->dtc == 0xf) in arm_cmn_init_dtcs()
2102 xp->dtc = 1 << dtc_idx; in arm_cmn_init_dtcs()
2261 xp->dtc = 0xf; in arm_cmn_discover()
2263 xp->dtc = 1 << arm_cmn_dtc_domain(cmn, xp_region); in arm_cmn_discover()
2518 writel_relaxed(0, cmn->dtc[0].base + CMN_DT_DTC_CTL); in arm_cmn_remove()