Lines Matching +full:pin +full:- +full:group
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
11 * functions. The SoC function enabled on a pin is determined on a priority
12 * basis where a given pin can provide a number of different signal types.
14 * The signal active on a pin is described by both a priority level and
16 * bits. Some difficulty arises as the pin's function bit masks for each
21 * read-only).
23 * SoC Multi-function Pin Expression Examples
24 * ------------------------------------------
30 * D6 is a pin with a single function (beside GPIO); a high priority signal
34 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
36 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
38 * C5 is a multi-signal pin (high and low priority signals). Here we touch
41 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
43 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
45 * E19 is a single-signal pin with two functions that influence the active
46 * signal. In this case both bits have the same meaning - enable a dedicated
47 * LPC reset pin. However it's not always the case that the bits in the
48 * OR-relationship have the same meaning.
50 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
52 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
54 * For example, pin B19 has a low-priority signal that's enabled by two
61 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
63 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
65 * For pin E18, the SoC ANDs the expected state of three bits to determine the
66 * pin's active signal:
69 * * SCU80[15]: Enable SPICS1# or EXTRST# function pin
72 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
74 …* -----+---------+-----------+-----------------------------------------+-----------+--------------…
77 * selecting the signals on pin E18)
79 * Pin T5 is a multi-signal pin with a more complex configuration:
82 * -----+---------+-----------+------------------------------+-----------+---------------+----------
84 * -----+---------+-----------+------------------------------+-----------+---------------+----------
94 * Re-writing:
96 * -----+---------+-----------+------------------------------+-----------+---------------+----------
100 * -----+---------+-----------+------------------------------+-----------+---------------+----------
103 * function pin", where the signal itself is determined by whether SCU94[5:4]
106 * Other video-input-related pins require an explicit state in SCU90[5:4], e.g.
109 * -----+---------+-----------+------------------------------+-----------+---------------+----------
112 * -----+---------+-----------+------------------------------+-----------+---------------+----------
119 * signals are required. However, this isn't done consistently - UART1 is
120 * enabled on a per-pin basis, and by contrast, all signals for UART6 are
129 * fails in this instance where applying the configuration for the UART pin of
131 * VPI functions on the current pin.
134 …* -----+------------+-----------+---------------------------+-----------+---------------+---------…
137 …* -----+------------+-----------+---------------------------+-----------+---------------+---------…
139 * A12 demonstrates that the "Other" signal isn't always GPIO - in this case
140 * GPIOT0 is a high-priority signal and RGMII1TXCK is Other. Thus, GPIO
144 * pins in the function's group to disable the higher-priority signals such
159 * * For priorities levels defined on a pin, each priority provides one signal
174 * comparisons must evaluate 'true' for a signal to be enabled on a pin.
176 * * A signal participating in a function is active on a pin if evaluating all
177 * signal descriptors in the pin's signal expression for the function yields
180 * * A signal at a given priority on a given pin is active if any of the
182 * priority signal on the pin is active
184 * * GPIO is configured per-pin
191 * * Each pin must know the signal expressions of functions in which it
194 * pin.
214 * --------------
216 * If pinctrl allows us to allocate a pin we can configure a function without
217 * concern for the function of already allocated pins, if pin groups are
219 * intuitive, but it did not feel obvious from the bit/pin relationships.
221 * Conversely, failing to allocate all pins in a group indicates some bits (as
222 * well as pins) required for the group's configuration will already be in use,
224 * group.
227 * --------------
238 * 1. Use a data-driven solution rather than embedding state into code
243 * properties associated with a given mux configuration: The pin, the signal,
244 * the group and the function. In this way copy/paste errors cause duplicate
248 * no override errors in the pin, group and function arrays.
254 * Here's a complete, concrete "pre-processed" example of the table structures
453 * @signal: The signal name for the priority level on the pin. If the signal
457 * associated expression. For pin-specific GPIO, the function
472 * for a given pin. The signal configuration for a priority level is evaluated
476 * @name: A name for the pin
491 * Short-hand macro for describing an SCU descriptor enabled by the state of
504 * A further short-hand macro expanding to an SCU descriptor enabled by a set
513 #define SIG_DESC_LIST_SYM(sig, group) sig_descs_ ## sig ## _ ## group argument
514 #define SIG_DESC_LIST_DECL(sig, group, ...) \ argument
515 static const struct aspeed_sig_desc SIG_DESC_LIST_SYM(sig, group)[] = \
518 #define SIG_EXPR_SYM(sig, group) sig_expr_ ## sig ## _ ## group argument
519 #define SIG_EXPR_DECL_(sig, group, func) \ argument
520 static const struct aspeed_sig_expr SIG_EXPR_SYM(sig, group) = \
524 .ndescs = ARRAY_SIZE(SIG_DESC_LIST_SYM(sig, group)), \
525 .descs = &(SIG_DESC_LIST_SYM(sig, group))[0], \
545 #define SIG_EXPR_DECL(sig, group, func, ...) \ argument
546 SIG_DESC_LIST_DECL(sig, group, __VA_ARGS__); \
547 SIG_EXPR_DECL_(sig, group, func)
555 #define SIG_EXPR_PTR(sig, group) (&SIG_EXPR_SYM(sig, group)) argument
557 #define SIG_EXPR_LIST_SYM(sig, group) sig_exprs_ ## sig ## _ ## group argument
565 * For example, the 16-bit ROM bus can be enabled by one of two possible signal
574 #define SIG_EXPR_LIST_DECL(sig, group, ...) \ argument
575 static const struct aspeed_sig_expr *SIG_EXPR_LIST_SYM(sig, group)[] =\
582 * Create an expression symbol alias from (signal, group) to (pin, signal).
584 * @pin: The pin number
586 * @group: The name of the group of which the pin is a member that is
590 * the signal for a group multiple times) whilst enabling multiple pin groups
591 * to exist for a signal without intrusive side-effects on defining the list of
592 * signals available on a pin.
594 #define SIG_EXPR_LIST_ALIAS(pin, sig, group) \ argument
596 SIG_EXPR_LIST_SYM(pin, sig)[ARRAY_SIZE(SIG_EXPR_LIST_SYM(sig, group))] \
597 __attribute__((alias(istringify(SIG_EXPR_LIST_SYM(sig, group)))))
600 * A short-hand macro for declaring a function expression and an expression
601 * list with a single expression (SE) and a single group (SG) of pins.
603 * @pin: The pin the signal will be routed to
604 * @sig: The signal that will be routed to the pin for the function
608 * For example, signal NCTS6 participates in its own function with one group:
612 #define SIG_EXPR_LIST_DECL_SESG(pin, sig, func, ...) \ argument
616 SIG_EXPR_LIST_ALIAS(pin, sig, func)
622 * @pin: The pin the signal will be routed to
623 * @sig: The signal that will be routed to the pin for the function
624 * @group: The name of the function's pin group in which the pin participates
628 #define SIG_EXPR_LIST_DECL_SEMG(pin, sig, group, func, ...) \ argument
629 SIG_DESC_LIST_DECL(sig, group, __VA_ARGS__); \
630 SIG_EXPR_DECL_(sig, group, func); \
631 SIG_EXPR_LIST_DECL(sig, group, SIG_EXPR_PTR(sig, group)); \
632 SIG_EXPR_LIST_ALIAS(pin, sig, group)
636 * and a single group (SG) of pins.
638 * @pin: The pin the signal will be routed to
639 * @sig: The signal that will be routed to the pin for the function
640 * @group: The name of the function's pin group in which the pin participates
644 #define SIG_EXPR_LIST_DECL_DESG(pin, sig, f0, f1) \ argument
648 SIG_EXPR_LIST_ALIAS(pin, sig, f0)
650 #define SIG_EXPR_LIST_PTR(sig, group) SIG_EXPR_LIST_SYM(sig, group) argument
652 #define PIN_EXPRS_SYM(pin) pin_exprs_ ## pin argument
653 #define PIN_EXPRS_PTR(pin) (&PIN_EXPRS_SYM(pin)[0]) argument
654 #define PIN_SYM(pin) pin_ ## pin argument
656 #define PIN_DECL_(pin, ...) \ argument
657 static const struct aspeed_sig_expr **PIN_EXPRS_SYM(pin)[] = \
659 static const struct aspeed_pin_desc PIN_SYM(pin) = \
660 { #pin, PIN_EXPRS_PTR(pin) }
663 * Declare a single signal pin
665 * @pin: The pin number
675 #define PIN_DECL_1(pin, other, sig) \ argument
676 SIG_EXPR_LIST_DECL_SESG(pin, other, other); \
677 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \
678 SIG_EXPR_LIST_PTR(pin, other))
681 * Single signal, single function pin declaration
683 * @pin: The pin number
692 #define SSSF_PIN_DECL(pin, other, sig, ...) \ argument
693 SIG_EXPR_LIST_DECL_SESG(pin, sig, sig, __VA_ARGS__); \
694 SIG_EXPR_LIST_DECL_SESG(pin, other, other); \
695 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, sig), \
696 SIG_EXPR_LIST_PTR(pin, other)); \
697 FUNC_GROUP_DECL(sig, pin)
699 * Declare a two-signal pin
701 * @pin: The pin number
717 #define PIN_DECL_2(pin, other, high, low) \ argument
718 SIG_EXPR_LIST_DECL_SESG(pin, other, other); \
719 PIN_DECL_(pin, \
720 SIG_EXPR_LIST_PTR(pin, high), \
721 SIG_EXPR_LIST_PTR(pin, low), \
722 SIG_EXPR_LIST_PTR(pin, other))
724 #define PIN_DECL_3(pin, other, high, medium, low) \ argument
725 SIG_EXPR_LIST_DECL_SESG(pin, other, other); \
726 PIN_DECL_(pin, \
727 SIG_EXPR_LIST_PTR(pin, high), \
728 SIG_EXPR_LIST_PTR(pin, medium), \
729 SIG_EXPR_LIST_PTR(pin, low), \
730 SIG_EXPR_LIST_PTR(pin, other))
732 #define PIN_DECL_4(pin, other, prio1, prio2, prio3, prio4) \ argument
733 SIG_EXPR_LIST_DECL_SESG(pin, other, other); \
734 PIN_DECL_(pin, \
735 SIG_EXPR_LIST_PTR(pin, prio1), \
736 SIG_EXPR_LIST_PTR(pin, prio2), \
737 SIG_EXPR_LIST_PTR(pin, prio3), \
738 SIG_EXPR_LIST_PTR(pin, prio4), \
739 SIG_EXPR_LIST_PTR(pin, other))
741 #define GROUP_SYM(group) group_pins_ ## group argument
742 #define GROUP_DECL(group, ...) \ argument
743 static const int GROUP_SYM(group)[] = { __VA_ARGS__ }
749 #define FUNC_DECL_1(func, group) FUNC_DECL_(func, #group) argument
758 #define GPIO_PIN_DECL(pin, gpio) \ argument
759 SIG_EXPR_LIST_DECL_SESG(pin, gpio, gpio); \
760 PIN_DECL_(pin, SIG_EXPR_LIST_PTR(pin, gpio))
818 return ctx->ops->set(ctx, expr, enabled); in aspeed_sig_expr_set()