Lines Matching +full:spkr +full:- +full:short +full:- +full:circuit
1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2022-2023 Cirrus Logic, Inc. and
15 #include <linux/mfd/cs42l43-regs.h>
22 #include <sound/soc-component.h>
23 #include <sound/soc-dapm.h>
24 #include <sound/soc-dai.h>
126 dev_err(priv->dev, "Error " #name " IRQ\n"); \
147 dev_dbg(priv->dev, #name " completed\n"); \ in CS42L43_IRQ_ERROR()
148 complete(&priv->name); \ in CS42L43_IRQ_ERROR()
173 dev_dbg(priv->dev, "Microphone shutter changed\n");
175 if (!priv->component)
179 ret = snd_soc_component_notify_control(priv->component,
193 dev_dbg(priv->dev, "Speaker shutter changed\n"); in cs42l43_spk_shutter()
195 if (!priv->component) in cs42l43_spk_shutter()
198 ret = snd_soc_component_notify_control(priv->component, in cs42l43_spk_shutter()
220 struct snd_soc_component *component = dai->component; in cs42l43_startup()
222 struct cs42l43 *cs42l43 = priv->core; in cs42l43_startup()
223 int provider = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_startup()
227 priv->constraint.mask = CS42L43_PROVIDER_RATE_MASK; in cs42l43_startup()
229 priv->constraint.mask = CS42L43_CONSUMER_RATE_MASK; in cs42l43_startup()
231 return snd_pcm_hw_constraint_list(substream->runtime, 0, in cs42l43_startup()
233 &priv->constraint); in cs42l43_startup()
256 return -EINVAL; in cs42l43_convert_sample_rate()
264 struct cs42l43_codec *priv = snd_soc_component_get_drvdata(dai->component); in cs42l43_set_sample_rate()
265 struct cs42l43 *cs42l43 = priv->core; in cs42l43_set_sample_rate()
270 dev_err(priv->dev, "Failed to convert sample rate: %d\n", ret); in cs42l43_set_sample_rate()
275 regmap_update_bits(cs42l43->regmap, CS42L43_SAMPLE_RATE1, in cs42l43_set_sample_rate()
285 struct cs42l43_codec *priv = snd_soc_component_get_drvdata(dai->component); in cs42l43_asp_hw_params()
286 struct cs42l43 *cs42l43 = priv->core; in cs42l43_asp_hw_params()
287 int dsp_mode = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CTRL, in cs42l43_asp_hw_params()
289 int provider = !!regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_asp_hw_params()
299 if (priv->n_slots) { in cs42l43_asp_hw_params()
300 n_slots = priv->n_slots; in cs42l43_asp_hw_params()
301 slot_width = priv->slot_width; in cs42l43_asp_hw_params()
305 dev_dbg(priv->dev, "Forcing balanced channels on ASP\n"); in cs42l43_asp_hw_params()
319 dev_err(priv->dev, "Can't produce %dHz bclk\n", bclk_target); in cs42l43_asp_hw_params()
320 return -EINVAL; in cs42l43_asp_hw_params()
323 dev_dbg(priv->dev, "bclk %d/%d = %dHz, with %dx%d frame\n", in cs42l43_asp_hw_params()
326 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG1, in cs42l43_asp_hw_params()
330 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL1, in cs42l43_asp_hw_params()
334 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL4, in cs42l43_asp_hw_params()
338 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { in cs42l43_asp_hw_params()
340 slots = priv->tx_slots; in cs42l43_asp_hw_params()
343 slots = priv->rx_slots; in cs42l43_asp_hw_params()
355 dev_dbg(priv->dev, "Configure channel %d at slot %d (%d,%d)\n", in cs42l43_asp_hw_params()
358 regmap_update_bits(cs42l43->regmap, reg, in cs42l43_asp_hw_params()
362 ((data_width - 1) << CS42L43_ASP_CH_WIDTH_SHIFT) | in cs42l43_asp_hw_params()
372 struct snd_soc_component *component = dai->component; in cs42l43_asp_set_fmt()
375 struct cs42l43 *cs42l43 = priv->core; in cs42l43_asp_set_fmt()
376 int provider = regmap_test_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_asp_set_fmt()
401 dev_err(priv->dev, "Unsupported DAI format 0x%x\n", in cs42l43_asp_set_fmt()
403 return -EINVAL; in cs42l43_asp_set_fmt()
417 dev_err(priv->dev, "Unsupported ASP mode 0x%x\n", in cs42l43_asp_set_fmt()
419 return -EINVAL; in cs42l43_asp_set_fmt()
438 dev_err(priv->dev, "Unsupported invert mode 0x%x\n", in cs42l43_asp_set_fmt()
440 return -EINVAL; in cs42l43_asp_set_fmt()
443 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CTRL, in cs42l43_asp_set_fmt()
446 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_DATA_CTRL, in cs42l43_asp_set_fmt()
450 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_CLK_CONFIG2, in cs42l43_asp_set_fmt()
454 regmap_update_bits(cs42l43->regmap, CS42L43_ASP_FSYNC_CTRL3, in cs42l43_asp_set_fmt()
467 int slot = ffs(mask) - 1; in cs42l43_mask_to_slots()
478 dev_warn(priv->dev, "Too many channels in TDM mask\n"); in cs42l43_mask_to_slots()
484 struct snd_soc_component *component = dai->component; in cs42l43_asp_set_tdm_slot()
487 priv->n_slots = slots; in cs42l43_asp_set_tdm_slot()
488 priv->slot_width = slot_width; in cs42l43_asp_set_tdm_slot()
495 cs42l43_mask_to_slots(priv, tx_mask, priv->tx_slots); in cs42l43_asp_set_tdm_slot()
496 cs42l43_mask_to_slots(priv, rx_mask, priv->rx_slots); in cs42l43_asp_set_tdm_slot()
534 .name = "cs42l43-asp",
553 .name = "cs42l43-dp1",
565 .name = "cs42l43-dp2",
577 .name = "cs42l43-dp3",
589 .name = "cs42l43-dp4",
601 .name = "cs42l43-dp5",
613 .name = "cs42l43-dp6",
625 .name = "cs42l43-dp7",
638 static const DECLARE_TLV_DB_SCALE(cs42l43_mixer_tlv, -3200, 100, 0);
673 static DECLARE_TLV_DB_SCALE(cs42l43_adc_tlv, -600, 600, 0);
674 static DECLARE_TLV_DB_SCALE(cs42l43_dec_tlv, -6400, 50, 0);
719 static DECLARE_TLV_DB_SCALE(cs42l43_speaker_tlv, -6400, 50, 0);
727 static DECLARE_TLV_DB_SCALE(cs42l43_headphone_tlv, -11450, 50, 1);
888 memcpy(ucontrol->value.integer.value, priv->eq_coeffs, sizeof(priv->eq_coeffs)); in cs42l43_eq_get()
902 memcpy(priv->eq_coeffs, ucontrol->value.integer.value, sizeof(priv->eq_coeffs)); in cs42l43_eq_put()
911 struct cs42l43 *cs42l43 = priv->core; in cs42l43_spk_vu_sync()
913 mutex_lock(&priv->spk_vu_lock); in cs42l43_spk_vu_sync()
915 regmap_update_bits(cs42l43->regmap, CS42L43_INTP_VOLUME_CTRL1, in cs42l43_spk_vu_sync()
917 regmap_update_bits(cs42l43->regmap, CS42L43_INTP_VOLUME_CTRL1, in cs42l43_spk_vu_sync()
920 mutex_unlock(&priv->spk_vu_lock); in cs42l43_spk_vu_sync()
925 struct cs42l43 *cs42l43 = priv->core; in cs42l43_shutter_get()
929 ret = pm_runtime_resume_and_get(priv->dev); in cs42l43_shutter_get()
931 dev_err(priv->dev, "Failed to resume for shutters: %d\n", ret); in cs42l43_shutter_get()
936 * SHUTTER_CONTROL is a mix of volatile and non-volatile bits, so must in cs42l43_shutter_get()
937 * be cached for the non-volatiles, so drop it from the cache here so in cs42l43_shutter_get()
940 ret = regcache_drop_region(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, in cs42l43_shutter_get()
943 dev_err(priv->dev, "Failed to drop shutter from cache: %d\n", ret); in cs42l43_shutter_get()
947 ret = regmap_read(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, &val); in cs42l43_shutter_get()
949 dev_err(priv->dev, "Failed to check shutter status: %d\n", ret); in cs42l43_shutter_get()
955 dev_dbg(priv->dev, "%s shutter is %s\n", in cs42l43_shutter_get()
960 pm_runtime_mark_last_busy(priv->dev); in cs42l43_shutter_get()
961 pm_runtime_put_autosuspend(priv->dev); in cs42l43_shutter_get()
977 ucontrol->value.integer.value[0] = ret; in cs42l43_decim_get()
995 ucontrol->value.integer.value[0] = ret; in cs42l43_spk_get()
1148 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_eq_ev()
1150 struct cs42l43 *cs42l43 = priv->core; in cs42l43_eq_ev()
1156 regmap_update_bits(cs42l43->regmap, CS42L43_MUTE_EQ_IN0, in cs42l43_eq_ev()
1160 regmap_update_bits(cs42l43->regmap, CS42L43_COEFF_RD_WR0, in cs42l43_eq_ev()
1164 regmap_write(cs42l43->regmap, CS42L43_COEFF_DATA_IN0, in cs42l43_eq_ev()
1165 priv->eq_coeffs[i]); in cs42l43_eq_ev()
1167 regmap_update_bits(cs42l43->regmap, CS42L43_COEFF_RD_WR0, in cs42l43_eq_ev()
1172 ret = regmap_read_poll_timeout(cs42l43->regmap, CS42L43_INIT_DONE0, in cs42l43_eq_ev()
1176 dev_err(priv->dev, "Failed to start EQs: %d\n", ret); in cs42l43_eq_ev()
1178 regmap_update_bits(cs42l43->regmap, CS42L43_MUTE_EQ_IN0, in cs42l43_eq_ev()
1203 struct cs42l43 *cs42l43 = priv->core; in cs42l43_set_pll()
1205 lockdep_assert_held(&cs42l43->pll_lock); in cs42l43_set_pll()
1207 if (priv->refclk_src == src && priv->refclk_freq == freq) in cs42l43_set_pll()
1210 if (regmap_test_bits(cs42l43->regmap, CS42L43_CTRL_REG, CS42L43_PLL_EN_MASK)) { in cs42l43_set_pll()
1211 dev_err(priv->dev, "PLL active, can't change configuration\n"); in cs42l43_set_pll()
1212 return -EBUSY; in cs42l43_set_pll()
1218 dev_dbg(priv->dev, "Source PLL from %s at %uHz\n", in cs42l43_set_pll()
1221 priv->refclk_src = src; in cs42l43_set_pll()
1222 priv->refclk_freq = freq; in cs42l43_set_pll()
1226 dev_err(priv->dev, "Invalid PLL source: 0x%x\n", src); in cs42l43_set_pll()
1227 return -EINVAL; in cs42l43_set_pll()
1237 struct cs42l43 *cs42l43 = priv->core; in cs42l43_enable_pll()
1240 unsigned int freq = priv->refclk_freq; in cs42l43_enable_pll()
1243 lockdep_assert_held(&cs42l43->pll_lock); in cs42l43_enable_pll()
1245 if (priv->refclk_src == CS42L43_SYSCLK_SDW) { in cs42l43_enable_pll()
1247 freq = cs42l43->sdw_freq; in cs42l43_enable_pll()
1248 else if (!cs42l43->sdw_freq) in cs42l43_enable_pll()
1249 cs42l43->sdw_freq = freq; in cs42l43_enable_pll()
1252 dev_dbg(priv->dev, "Enabling PLL at %uHz\n", freq); in cs42l43_enable_pll()
1254 while (freq > cs42l43_pll_configs[ARRAY_SIZE(cs42l43_pll_configs) - 1].freq) { in cs42l43_enable_pll()
1271 dev_err(priv->dev, "No suitable PLL config: 0x%x, %uHz\n", div, freq); in cs42l43_enable_pll()
1272 return -EINVAL; in cs42l43_enable_pll()
1275 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_enable_pll()
1278 priv->refclk_src << CS42L43_PLL_REFCLK_SRC_SHIFT); in cs42l43_enable_pll()
1279 regmap_write(cs42l43->regmap, CS42L43_FDIV_FRAC, config->div); in cs42l43_enable_pll()
1280 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, in cs42l43_enable_pll()
1283 config->mode << CS42L43_PLL_MODE_BYPASS_1029_SHIFT); in cs42l43_enable_pll()
1284 regmap_update_bits(cs42l43->regmap, CS42L43_CAL_RATIO, in cs42l43_enable_pll()
1285 CS42L43_PLL_CAL_RATIO_MASK, config->cal); in cs42l43_enable_pll()
1286 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_enable_pll()
1289 reinit_completion(&priv->pll_ready); in cs42l43_enable_pll()
1291 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, in cs42l43_enable_pll()
1294 time_left = wait_for_completion_timeout(&priv->pll_ready, in cs42l43_enable_pll()
1297 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, in cs42l43_enable_pll()
1299 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_enable_pll()
1302 dev_err(priv->dev, "Timeout out waiting for PLL\n"); in cs42l43_enable_pll()
1303 return -ETIMEDOUT; in cs42l43_enable_pll()
1306 if (priv->refclk_src == CS42L43_SYSCLK_SDW) in cs42l43_enable_pll()
1307 cs42l43->sdw_pll_active = true; in cs42l43_enable_pll()
1309 dev_dbg(priv->dev, "PLL locked in %ums\n", 200 - jiffies_to_msecs(time_left)); in cs42l43_enable_pll()
1316 regmap_multi_reg_write(cs42l43->regmap, enable_seq, ARRAY_SIZE(enable_seq)); in cs42l43_enable_pll()
1327 struct cs42l43 *cs42l43 = priv->core; in cs42l43_disable_pll()
1329 dev_dbg(priv->dev, "Disabling PLL\n"); in cs42l43_disable_pll()
1331 lockdep_assert_held(&cs42l43->pll_lock); in cs42l43_disable_pll()
1333 regmap_multi_reg_write(cs42l43->regmap, disable_seq, ARRAY_SIZE(disable_seq)); in cs42l43_disable_pll()
1334 regmap_update_bits(cs42l43->regmap, CS42L43_CTRL_REG, CS42L43_PLL_EN_MASK, 0); in cs42l43_disable_pll()
1335 regmap_update_bits(cs42l43->regmap, CS42L43_PLL_CONTROL, in cs42l43_disable_pll()
1338 cs42l43->sdw_pll_active = false; in cs42l43_disable_pll()
1346 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_pll_ev()
1348 struct cs42l43 *cs42l43 = priv->core; in cs42l43_pll_ev()
1351 mutex_lock(&cs42l43->pll_lock); in cs42l43_pll_ev()
1355 if (priv->refclk_src == CS42L43_SYSCLK_MCLK) { in cs42l43_pll_ev()
1356 ret = clk_prepare_enable(priv->mclk); in cs42l43_pll_ev()
1358 dev_err(priv->dev, "Failed to enable MCLK: %d\n", ret); in cs42l43_pll_ev()
1368 if (priv->refclk_src == CS42L43_SYSCLK_MCLK) in cs42l43_pll_ev()
1369 clk_disable_unprepare(priv->mclk); in cs42l43_pll_ev()
1376 mutex_unlock(&cs42l43->pll_lock); in cs42l43_pll_ev()
1404 return -ETIMEDOUT; in cs42l43_dapm_wait_completion()
1412 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_spkr_ev()
1415 return cs42l43_dapm_wait_completion(&priv->spkr_startup, in cs42l43_spkr_ev()
1416 &priv->spkr_shutdown, event, in cs42l43_spkr_ev()
1423 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_spkl_ev()
1426 return cs42l43_dapm_wait_completion(&priv->spkl_startup, in cs42l43_spkl_ev()
1427 &priv->spkl_shutdown, event, in cs42l43_spkl_ev()
1434 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_hp_ev()
1436 struct cs42l43 *cs42l43 = priv->core; in cs42l43_hp_ev()
1437 unsigned int mask = 1 << w->shift; in cs42l43_hp_ev()
1446 priv->hp_ena &= ~mask; in cs42l43_hp_ev()
1447 priv->hp_ena |= val; in cs42l43_hp_ev()
1449 ret = cs42l43_dapm_wait_completion(&priv->hp_startup, in cs42l43_hp_ev()
1450 &priv->hp_shutdown, event, in cs42l43_hp_ev()
1455 if (!priv->load_detect_running) in cs42l43_hp_ev()
1456 regmap_update_bits(cs42l43->regmap, CS42L43_BLOCK_EN8, in cs42l43_hp_ev()
1461 if (priv->load_detect_running) in cs42l43_hp_ev()
1464 ret = cs42l43_dapm_wait_completion(&priv->hp_startup, in cs42l43_hp_ev()
1465 &priv->hp_shutdown, event, in cs42l43_hp_ev()
1480 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_mic_ev()
1482 struct cs42l43 *cs42l43 = priv->core; in cs42l43_mic_ev()
1487 switch (w->shift) { in cs42l43_mic_ev()
1493 val = &priv->decim_cache[0]; in cs42l43_mic_ev()
1500 val = &priv->decim_cache[1]; in cs42l43_mic_ev()
1506 val = &priv->decim_cache[2]; in cs42l43_mic_ev()
1512 val = &priv->decim_cache[3]; in cs42l43_mic_ev()
1515 dev_err(priv->dev, "Invalid microphone shift: %d\n", w->shift); in cs42l43_mic_ev()
1516 return -EINVAL; in cs42l43_mic_ev()
1521 ret = regmap_read(cs42l43->regmap, reg, val); in cs42l43_mic_ev()
1523 dev_err(priv->dev, in cs42l43_mic_ev()
1529 regmap_update_bits(cs42l43->regmap, reg, mute | ramp, mute); in cs42l43_mic_ev()
1532 regmap_update_bits(cs42l43->regmap, reg, mute | ramp, *val); in cs42l43_mic_ev()
1544 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in cs42l43_adc_ev()
1546 struct cs42l43 *cs42l43 = priv->core; in cs42l43_adc_ev()
1547 unsigned int mask = 1 << w->shift; in cs42l43_adc_ev()
1560 priv->adc_ena &= ~mask; in cs42l43_adc_ev()
1561 priv->adc_ena |= val; in cs42l43_adc_ev()
1563 if (!priv->load_detect_running) in cs42l43_adc_ev()
1564 regmap_update_bits(cs42l43->regmap, CS42L43_BLOCK_EN3, in cs42l43_adc_ev()
1672 SND_SOC_DAPM_REGULATOR_SUPPLY("vdd-amp", 0, 0),
1908 { "AMP1", NULL, "vdd-amp" },
1909 { "AMP2", NULL, "vdd-amp" },
2000 struct cs42l43 *cs42l43 = priv->core; in cs42l43_set_sysclk()
2003 mutex_lock(&cs42l43->pll_lock); in cs42l43_set_sysclk()
2005 mutex_unlock(&cs42l43->pll_lock); in cs42l43_set_sysclk()
2013 struct cs42l43 *cs42l43 = priv->core; in cs42l43_component_probe()
2015 snd_soc_component_init_regmap(component, cs42l43->regmap); in cs42l43_component_probe()
2017 cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->tx_slots); in cs42l43_component_probe()
2018 cs42l43_mask_to_slots(priv, CS42L43_DEFAULT_SLOTS, priv->rx_slots); in cs42l43_component_probe()
2020 priv->component = component; in cs42l43_component_probe()
2021 priv->constraint = cs42l43_constraint; in cs42l43_component_probe()
2027 .name = "cs42l43-codec",
2060 { CS42L43_AMP2_CLK_STOP_FAULT, "spkr clock stop", cs42l43_spkr_clock_stop },
2062 { CS42L43_AMP2_VDDSPK_FAULT, "spkr brown out", cs42l43_spkr_brown_out },
2064 { CS42L43_AMP2_SHUTDOWN_DONE, "spkr shutdown", cs42l43_spkr_shutdown },
2066 { CS42L43_AMP2_STARTUP_DONE, "spkr startup", cs42l43_spkr_startup },
2068 { CS42L43_AMP2_THERM_SHDN, "spkr thermal shutdown", cs42l43_spkr_therm_shutdown },
2070 { CS42L43_AMP2_THERM_WARN, "spkr thermal warning", cs42l43_spkr_therm_warm },
2072 { CS42L43_AMP2_SCDET, "spkr short circuit", cs42l43_spkr_sc_detect },
2073 { CS42L43_AMP1_SCDET, "spkl short circuit", cs42l43_spkl_sc_detect },
2087 return dev_err_probe(priv->dev, ret, "Failed to map IRQ %s\n", name); in cs42l43_request_irq()
2089 dev_dbg(priv->dev, "Request IRQ %d for %s\n", ret, name); in cs42l43_request_irq()
2091 ret = devm_request_threaded_irq(priv->dev, ret, NULL, handler, in cs42l43_request_irq()
2094 return dev_err_probe(priv->dev, ret, "Failed to request IRQ %s\n", name); in cs42l43_request_irq()
2110 dev_warn(priv->dev, "Manual shutters, notifications not available\n"); in cs42l43_shutter_irq()
2137 struct cs42l43 *cs42l43 = dev_get_drvdata(pdev->dev.parent); in cs42l43_codec_probe()
2143 dom = irq_find_matching_fwnode(dev_fwnode(cs42l43->dev), DOMAIN_BUS_ANY); in cs42l43_codec_probe()
2145 return -EPROBE_DEFER; in cs42l43_codec_probe()
2147 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); in cs42l43_codec_probe()
2149 return -ENOMEM; in cs42l43_codec_probe()
2151 priv->dev = &pdev->dev; in cs42l43_codec_probe()
2152 priv->core = cs42l43; in cs42l43_codec_probe()
2156 mutex_init(&priv->jack_lock); in cs42l43_codec_probe()
2157 mutex_init(&priv->spk_vu_lock); in cs42l43_codec_probe()
2159 init_completion(&priv->hp_startup); in cs42l43_codec_probe()
2160 init_completion(&priv->hp_shutdown); in cs42l43_codec_probe()
2161 init_completion(&priv->spkr_shutdown); in cs42l43_codec_probe()
2162 init_completion(&priv->spkl_shutdown); in cs42l43_codec_probe()
2163 init_completion(&priv->spkr_startup); in cs42l43_codec_probe()
2164 init_completion(&priv->spkl_startup); in cs42l43_codec_probe()
2165 init_completion(&priv->pll_ready); in cs42l43_codec_probe()
2166 init_completion(&priv->type_detect); in cs42l43_codec_probe()
2167 init_completion(&priv->load_detect); in cs42l43_codec_probe()
2169 INIT_DELAYED_WORK(&priv->tip_sense_work, cs42l43_tip_sense_work); in cs42l43_codec_probe()
2170 INIT_DELAYED_WORK(&priv->bias_sense_timeout, cs42l43_bias_sense_timeout); in cs42l43_codec_probe()
2171 INIT_DELAYED_WORK(&priv->button_press_work, cs42l43_button_press_work); in cs42l43_codec_probe()
2172 INIT_WORK(&priv->button_release_work, cs42l43_button_release_work); in cs42l43_codec_probe()
2174 pm_runtime_set_autosuspend_delay(priv->dev, 100); in cs42l43_codec_probe()
2175 pm_runtime_use_autosuspend(priv->dev); in cs42l43_codec_probe()
2176 pm_runtime_set_active(priv->dev); in cs42l43_codec_probe()
2177 pm_runtime_get_noresume(priv->dev); in cs42l43_codec_probe()
2179 ret = devm_pm_runtime_enable(priv->dev); in cs42l43_codec_probe()
2191 ret = regmap_read(cs42l43->regmap, CS42L43_SHUTTER_CONTROL, &val); in cs42l43_codec_probe()
2193 dev_err(priv->dev, "Failed to check shutter source: %d\n", ret); in cs42l43_codec_probe()
2211 priv->mclk = clk_get_optional(cs42l43->dev, "mclk"); in cs42l43_codec_probe()
2212 if (IS_ERR(priv->mclk)) { in cs42l43_codec_probe()
2213 ret = PTR_ERR(priv->mclk); in cs42l43_codec_probe()
2214 dev_err_probe(priv->dev, ret, "Failed to get mclk\n"); in cs42l43_codec_probe()
2218 ret = devm_snd_soc_register_component(priv->dev, &cs42l43_component_drv, in cs42l43_codec_probe()
2221 dev_err_probe(priv->dev, ret, "Failed to register component\n"); in cs42l43_codec_probe()
2225 pm_runtime_mark_last_busy(priv->dev); in cs42l43_codec_probe()
2226 pm_runtime_put_autosuspend(priv->dev); in cs42l43_codec_probe()
2231 clk_put(priv->mclk); in cs42l43_codec_probe()
2233 pm_runtime_put_sync(priv->dev); in cs42l43_codec_probe()
2242 clk_put(priv->mclk); in cs42l43_codec_remove()
2251 dev_dbg(priv->dev, "Runtime resume\n"); in cs42l43_codec_runtime_resume()
2263 { "cs42l43-codec", },
2270 .name = "cs42l43-codec",