Lines Matching full:rt5677
3 * rt5677.c -- RT5677 ALSA SoC audio codec driver
34 #include "rt5677.h"
35 #include "rt5677-spi.h"
553 * @rt5677: Private Data.
560 static int rt5677_dsp_mode_i2c_write_addr(struct rt5677_priv *rt5677, in rt5677_dsp_mode_i2c_write_addr() argument
563 struct snd_soc_component *component = rt5677->component; in rt5677_dsp_mode_i2c_write_addr()
566 mutex_lock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_write_addr()
568 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, in rt5677_dsp_mode_i2c_write_addr()
575 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, in rt5677_dsp_mode_i2c_write_addr()
582 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_MSB, in rt5677_dsp_mode_i2c_write_addr()
589 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_LSB, in rt5677_dsp_mode_i2c_write_addr()
596 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_OP_CODE, in rt5677_dsp_mode_i2c_write_addr()
604 mutex_unlock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_write_addr()
611 * @rt5677: Private Data.
619 struct rt5677_priv *rt5677, unsigned int addr, unsigned int *value) in rt5677_dsp_mode_i2c_read_addr() argument
621 struct snd_soc_component *component = rt5677->component; in rt5677_dsp_mode_i2c_read_addr()
625 mutex_lock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_read_addr()
627 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_MSB, in rt5677_dsp_mode_i2c_read_addr()
634 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_ADDR_LSB, in rt5677_dsp_mode_i2c_read_addr()
641 ret = regmap_write(rt5677->regmap_physical, RT5677_DSP_I2C_OP_CODE, in rt5677_dsp_mode_i2c_read_addr()
648 regmap_read(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_MSB, &msb); in rt5677_dsp_mode_i2c_read_addr()
649 regmap_read(rt5677->regmap_physical, RT5677_DSP_I2C_DATA_LSB, &lsb); in rt5677_dsp_mode_i2c_read_addr()
653 mutex_unlock(&rt5677->dsp_cmd_lock); in rt5677_dsp_mode_i2c_read_addr()
660 * @rt5677: Private Data.
667 static int rt5677_dsp_mode_i2c_write(struct rt5677_priv *rt5677, in rt5677_dsp_mode_i2c_write() argument
670 return rt5677_dsp_mode_i2c_write_addr(rt5677, 0x18020000 + reg * 2, in rt5677_dsp_mode_i2c_write()
676 * @rt5677: Private Data
684 struct rt5677_priv *rt5677, unsigned int reg, unsigned int *value) in rt5677_dsp_mode_i2c_read() argument
686 int ret = rt5677_dsp_mode_i2c_read_addr(rt5677, 0x18020000 + reg * 2, in rt5677_dsp_mode_i2c_read()
694 static void rt5677_set_dsp_mode(struct rt5677_priv *rt5677, bool on) in rt5677_set_dsp_mode() argument
697 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, in rt5677_set_dsp_mode()
699 rt5677->is_dsp_mode = true; in rt5677_set_dsp_mode()
701 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, in rt5677_set_dsp_mode()
703 rt5677->is_dsp_mode = false; in rt5677_set_dsp_mode()
707 static unsigned int rt5677_set_vad_source(struct rt5677_priv *rt5677) in rt5677_set_vad_source() argument
710 snd_soc_component_get_dapm(rt5677->component); in rt5677_set_vad_source()
719 regmap_update_bits(rt5677->regmap, RT5677_DMIC_CTRL1, in rt5677_set_vad_source()
723 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, in rt5677_set_vad_source()
727 regmap_write(rt5677->regmap, RT5677_GLB_CLK2, in rt5677_set_vad_source()
731 regmap_write(rt5677->regmap, RT5677_VAD_CTRL2, 0x013f); in rt5677_set_vad_source()
733 regmap_write(rt5677->regmap, RT5677_VAD_CTRL3, 0x0ae5); in rt5677_set_vad_source()
738 regmap_update_bits(rt5677->regmap, RT5677_VAD_CTRL4, in rt5677_set_vad_source()
751 regmap_write(rt5677->regmap, RT5677_VAD_CTRL1, in rt5677_set_vad_source()
764 regmap_update_bits(rt5677->regmap, RT5677_PR_BASE + RT5677_BIAS_CUR4, in rt5677_set_vad_source()
770 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_vad_source()
777 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_set_vad_source()
787 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, in rt5677_set_vad_source()
800 regmap_write(rt5677->regmap, RT5677_PWR_DSP1, in rt5677_set_vad_source()
811 static int rt5677_parse_and_load_dsp(struct rt5677_priv *rt5677, const u8 *buf, in rt5677_parse_and_load_dsp() argument
814 struct snd_soc_component *component = rt5677->component; in rt5677_parse_and_load_dsp()
855 static int rt5677_load_dsp_from_file(struct rt5677_priv *rt5677) in rt5677_load_dsp_from_file() argument
858 struct device *dev = rt5677->component->dev; in rt5677_load_dsp_from_file()
869 ret = rt5677_parse_and_load_dsp(rt5677, fwp->data, fwp->size); in rt5677_load_dsp_from_file()
876 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_dsp_vad() local
877 rt5677->dsp_vad_en_request = on; in rt5677_set_dsp_vad()
878 rt5677->dsp_vad_en = on; in rt5677_set_dsp_vad()
883 schedule_delayed_work(&rt5677->dsp_work, 0); in rt5677_set_dsp_vad()
889 struct rt5677_priv *rt5677 = in rt5677_dsp_work() local
892 bool enable = rt5677->dsp_vad_en; in rt5677_dsp_work()
896 dev_info(rt5677->component->dev, "DSP VAD: enable=%d, activity=%d\n", in rt5677_dsp_work()
912 rt5677_set_vad_source(rt5677); in rt5677_dsp_work()
913 rt5677_set_dsp_mode(rt5677, true); in rt5677_dsp_work()
917 regmap_read(rt5677->regmap, RT5677_PWR_DSP_ST, &val); in rt5677_dsp_work()
923 dev_err(rt5677->component->dev, "DSP Boot Timed Out!"); in rt5677_dsp_work()
928 rt5677_dsp_mode_i2c_write_addr(rt5677, RT5677_DSP_BOOT_VECTOR, in rt5677_dsp_work()
930 rt5677_dsp_mode_i2c_write_addr(rt5677, RT5677_DSP_BOOT_VECTOR, in rt5677_dsp_work()
932 rt5677_dsp_mode_i2c_write_addr(rt5677, RT5677_DSP_BOOT_VECTOR, in rt5677_dsp_work()
935 rt5677_load_dsp_from_file(rt5677); in rt5677_dsp_work()
938 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, in rt5677_dsp_work()
944 mutex_lock(&rt5677->irq_lock); in rt5677_dsp_work()
946 regmap_update_bits(rt5677->regmap, RT5677_PWR_DSP1, in rt5677_dsp_work()
949 rt5677_set_dsp_mode(rt5677, false); in rt5677_dsp_work()
952 regmap_write(rt5677->regmap, RT5677_VAD_CTRL1, 0x2184); in rt5677_dsp_work()
955 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, in rt5677_dsp_work()
958 mutex_unlock(&rt5677->irq_lock); in rt5677_dsp_work()
982 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_dsp_vad_get() local
984 ucontrol->value.integer.value[0] = rt5677->dsp_vad_en_request; in rt5677_dsp_vad_get()
1089 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in set_dmic_clk() local
1092 rate = rt5677->sysclk / rl6231_get_pre_div(rt5677->regmap, in set_dmic_clk()
1098 regmap_update_bits(rt5677->regmap, RT5677_DMIC_CTRL1, in set_dmic_clk()
1107 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in is_sys_clk_from_pll() local
1110 regmap_read(rt5677->regmap, RT5677_GLB_CLK1, &val); in is_sys_clk_from_pll()
1122 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in is_using_asrc() local
1189 regmap_read(rt5677->regmap, reg, &val); in is_using_asrc()
1205 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in can_use_asrc() local
1207 if (rt5677->sysclk > rt5677->lrck[RT5677_AIF1] * 384) in can_use_asrc()
1219 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5677 can
1230 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_sel_asrc_clk_src() local
1278 regmap_update_bits(rt5677->regmap, RT5677_ASRC_3, asrc3_mask, in rt5677_sel_asrc_clk_src()
1307 regmap_update_bits(rt5677->regmap, RT5677_ASRC_4, asrc4_mask, in rt5677_sel_asrc_clk_src()
1336 regmap_update_bits(rt5677->regmap, RT5677_ASRC_5, asrc5_mask, in rt5677_sel_asrc_clk_src()
1353 regmap_update_bits(rt5677->regmap, RT5677_ASRC_6, asrc6_mask, in rt5677_sel_asrc_clk_src()
1370 regmap_update_bits(rt5677->regmap, RT5677_ASRC_7, asrc7_mask, in rt5677_sel_asrc_clk_src()
1399 regmap_update_bits(rt5677->regmap, RT5677_ASRC_8, asrc8_mask, in rt5677_sel_asrc_clk_src()
1410 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_dmic_use_asrc() local
1415 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); in rt5677_dmic_use_asrc()
1421 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); in rt5677_dmic_use_asrc()
1427 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); in rt5677_dmic_use_asrc()
1433 regmap_read(rt5677->regmap, RT5677_ASRC_5, &asrc_setting); in rt5677_dmic_use_asrc()
1439 regmap_read(rt5677->regmap, RT5677_ASRC_6, &asrc_setting); in rt5677_dmic_use_asrc()
1445 regmap_read(rt5677->regmap, RT5677_ASRC_6, &asrc_setting); in rt5677_dmic_use_asrc()
2571 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_bst1_event() local
2575 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_bst1_event()
2580 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_bst1_event()
2595 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_bst2_event() local
2599 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_bst2_event()
2604 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_bst2_event()
2619 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_pll1_event() local
2623 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x2); in rt5677_set_pll1_event()
2627 regmap_update_bits(rt5677->regmap, RT5677_PLL1_CTRL2, 0x2, 0x0); in rt5677_set_pll1_event()
2641 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_pll2_event() local
2645 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x2); in rt5677_set_pll2_event()
2649 regmap_update_bits(rt5677->regmap, RT5677_PLL2_CTRL2, 0x2, 0x0); in rt5677_set_pll2_event()
2663 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_micbias1_event() local
2667 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_set_micbias1_event()
2674 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_set_micbias1_event()
2690 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_if1_adc_tdm_event() local
2695 regmap_read(rt5677->regmap, RT5677_TDM1_CTRL2, &value); in rt5677_if1_adc_tdm_event()
2697 regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, in rt5677_if1_adc_tdm_event()
2713 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_if2_adc_tdm_event() local
2718 regmap_read(rt5677->regmap, RT5677_TDM2_CTRL2, &value); in rt5677_if2_adc_tdm_event()
2720 regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, in rt5677_if2_adc_tdm_event()
2736 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_vref_event() local
2741 !rt5677->is_vref_slow) { in rt5677_vref_event()
2743 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_vref_event()
2746 rt5677->is_vref_slow = true; in rt5677_vref_event()
4291 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_hw_params() local
4295 rt5677->lrck[dai->id] = params_rate(params); in rt5677_hw_params()
4296 pre_div = rl6231_get_clk_info(rt5677->sysclk, rt5677->lrck[dai->id]); in rt5677_hw_params()
4299 rt5677->sysclk, rt5677->lrck[dai->id]); in rt5677_hw_params()
4308 rt5677->bclk[dai->id] = rt5677->lrck[dai->id] * (32 << bclk_ms); in rt5677_hw_params()
4311 rt5677->bclk[dai->id], rt5677->lrck[dai->id]); in rt5677_hw_params()
4335 regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP, in rt5677_hw_params()
4337 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, in rt5677_hw_params()
4343 regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP, in rt5677_hw_params()
4345 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, in rt5677_hw_params()
4352 regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP, in rt5677_hw_params()
4354 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, in rt5677_hw_params()
4361 regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP, in rt5677_hw_params()
4363 regmap_update_bits(rt5677->regmap, RT5677_CLK_TREE_CTRL1, in rt5677_hw_params()
4376 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_dai_fmt() local
4381 rt5677->master[dai->id] = 1; in rt5677_set_dai_fmt()
4385 rt5677->master[dai->id] = 0; in rt5677_set_dai_fmt()
4419 regmap_update_bits(rt5677->regmap, RT5677_I2S1_SDP, in rt5677_set_dai_fmt()
4424 regmap_update_bits(rt5677->regmap, RT5677_I2S2_SDP, in rt5677_set_dai_fmt()
4429 regmap_update_bits(rt5677->regmap, RT5677_I2S3_SDP, in rt5677_set_dai_fmt()
4434 regmap_update_bits(rt5677->regmap, RT5677_I2S4_SDP, in rt5677_set_dai_fmt()
4450 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_dai_sysclk() local
4453 if (freq == rt5677->sysclk && clk_id == rt5677->sysclk_src) in rt5677_set_dai_sysclk()
4470 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_sysclk()
4472 rt5677->sysclk = freq; in rt5677_set_dai_sysclk()
4473 rt5677->sysclk_src = clk_id; in rt5677_set_dai_sysclk()
4503 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_dai_pll() local
4507 if (source == rt5677->pll_src && freq_in == rt5677->pll_in && in rt5677_set_dai_pll()
4508 freq_out == rt5677->pll_out) in rt5677_set_dai_pll()
4514 rt5677->pll_in = 0; in rt5677_set_dai_pll()
4515 rt5677->pll_out = 0; in rt5677_set_dai_pll()
4516 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_pll()
4523 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_pll()
4532 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_pll()
4536 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_pll()
4540 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_pll()
4544 regmap_update_bits(rt5677->regmap, RT5677_GLB_CLK1, in rt5677_set_dai_pll()
4566 regmap_write(rt5677->regmap, RT5677_PLL1_CTRL1, in rt5677_set_dai_pll()
4568 regmap_write(rt5677->regmap, RT5677_PLL1_CTRL2, in rt5677_set_dai_pll()
4572 rt5677->pll_in = freq_in; in rt5677_set_dai_pll()
4573 rt5677->pll_out = freq_out; in rt5677_set_dai_pll()
4574 rt5677->pll_src = source; in rt5677_set_dai_pll()
4583 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_tdm_slot() local
4624 regmap_update_bits(rt5677->regmap, RT5677_TDM1_CTRL1, 0x1f00, in rt5677_set_tdm_slot()
4626 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x8000, in rt5677_set_tdm_slot()
4630 regmap_update_bits(rt5677->regmap, RT5677_TDM2_CTRL1, 0x1f00, in rt5677_set_tdm_slot()
4632 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x80, in rt5677_set_tdm_slot()
4645 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_set_bias_level() local
4656 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_bias_level()
4660 regmap_update_bits(rt5677->regmap, in rt5677_set_bias_level()
4663 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_bias_level()
4669 rt5677->is_vref_slow = false; in rt5677_set_bias_level()
4670 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_set_bias_level()
4672 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, in rt5677_set_bias_level()
4679 rt5677->dsp_vad_en_request) { in rt5677_set_bias_level()
4681 rt5677->dsp_vad_en = true; in rt5677_set_bias_level()
4683 schedule_delayed_work(&rt5677->dsp_work, in rt5677_set_bias_level()
4689 flush_delayed_work(&rt5677->dsp_work); in rt5677_set_bias_level()
4690 if (rt5677->is_dsp_mode) { in rt5677_set_bias_level()
4692 rt5677->dsp_vad_en = false; in rt5677_set_bias_level()
4693 schedule_delayed_work(&rt5677->dsp_work, 0); in rt5677_set_bias_level()
4694 flush_delayed_work(&rt5677->dsp_work); in rt5677_set_bias_level()
4697 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, 0x1, 0x0); in rt5677_set_bias_level()
4698 regmap_write(rt5677->regmap, RT5677_PWR_DIG1, 0x0000); in rt5677_set_bias_level()
4699 regmap_write(rt5677->regmap, RT5677_PWR_ANLG1, in rt5677_set_bias_level()
4702 regmap_update_bits(rt5677->regmap, RT5677_PWR_ANLG2, in rt5677_set_bias_level()
4704 regmap_update_bits(rt5677->regmap, in rt5677_set_bias_level()
4707 if (rt5677->dsp_vad_en) in rt5677_set_bias_level()
4718 static int rt5677_update_gpio_bits(struct rt5677_priv *rt5677, unsigned offset, int m, int v) in rt5677_update_gpio_bits() argument
4724 return regmap_update_bits(rt5677->regmap, reg, m << shift, v << shift); in rt5677_update_gpio_bits()
4730 struct rt5677_priv *rt5677 = gpiochip_get_data(chip); in rt5677_gpio_set() local
4734 rt5677_update_gpio_bits(rt5677, offset, m, level); in rt5677_gpio_set()
4740 struct rt5677_priv *rt5677 = gpiochip_get_data(chip); in rt5677_gpio_direction_out() local
4745 return rt5677_update_gpio_bits(rt5677, offset, m, v); in rt5677_gpio_direction_out()
4750 struct rt5677_priv *rt5677 = gpiochip_get_data(chip); in rt5677_gpio_get() local
4753 ret = regmap_read(rt5677->regmap, RT5677_GPIO_ST, &value); in rt5677_gpio_get()
4762 struct rt5677_priv *rt5677 = gpiochip_get_data(chip); in rt5677_gpio_direction_in() local
4766 return rt5677_update_gpio_bits(rt5677, offset, m, v); in rt5677_gpio_direction_in()
4775 static void rt5677_gpio_config(struct rt5677_priv *rt5677, unsigned offset, in rt5677_gpio_config() argument
4783 regmap_update_bits(rt5677->regmap, in rt5677_gpio_config()
4791 regmap_update_bits(rt5677->regmap, in rt5677_gpio_config()
4804 struct rt5677_priv *rt5677 = gpiochip_get_data(chip); in rt5677_to_irq() local
4807 if ((rt5677->pdata.jd1_gpio == 1 && offset == RT5677_GPIO1) || in rt5677_to_irq()
4808 (rt5677->pdata.jd1_gpio == 2 && in rt5677_to_irq()
4810 (rt5677->pdata.jd1_gpio == 3 && in rt5677_to_irq()
4813 } else if ((rt5677->pdata.jd2_gpio == 1 && offset == RT5677_GPIO4) || in rt5677_to_irq()
4814 (rt5677->pdata.jd2_gpio == 2 && in rt5677_to_irq()
4816 (rt5677->pdata.jd2_gpio == 3 && in rt5677_to_irq()
4819 } else if ((rt5677->pdata.jd3_gpio == 1 && in rt5677_to_irq()
4821 (rt5677->pdata.jd3_gpio == 2 && in rt5677_to_irq()
4823 (rt5677->pdata.jd3_gpio == 3 && in rt5677_to_irq()
4830 return irq_create_mapping(rt5677->domain, irq); in rt5677_to_irq()
4846 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); in rt5677_init_gpio() local
4849 rt5677->gpio_chip = rt5677_template_chip; in rt5677_init_gpio()
4850 rt5677->gpio_chip.ngpio = RT5677_GPIO_NUM; in rt5677_init_gpio()
4851 rt5677->gpio_chip.parent = &i2c->dev; in rt5677_init_gpio()
4852 rt5677->gpio_chip.base = -1; in rt5677_init_gpio()
4854 ret = gpiochip_add_data(&rt5677->gpio_chip, rt5677); in rt5677_init_gpio()
4861 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); in rt5677_free_gpio() local
4863 gpiochip_remove(&rt5677->gpio_chip); in rt5677_free_gpio()
4866 static void rt5677_gpio_config(struct rt5677_priv *rt5677, unsigned offset, in rt5677_gpio_config() argument
4883 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_probe() local
4886 rt5677->component = component; in rt5677_probe()
4888 if (rt5677->pdata.dmic2_clk_pin == RT5677_DMIC_CLK2) { in rt5677_probe()
4900 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, in rt5677_probe()
4902 regmap_write(rt5677->regmap, RT5677_PWR_DSP2, in rt5677_probe()
4906 rt5677_gpio_config(rt5677, i, rt5677->pdata.gpio_config[i]); in rt5677_probe()
4908 mutex_init(&rt5677->dsp_cmd_lock); in rt5677_probe()
4909 mutex_init(&rt5677->dsp_pri_lock); in rt5677_probe()
4916 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_remove() local
4918 cancel_delayed_work_sync(&rt5677->dsp_work); in rt5677_remove()
4920 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); in rt5677_remove()
4921 gpiod_set_value_cansleep(rt5677->pow_ldo2, 0); in rt5677_remove()
4922 gpiod_set_value_cansleep(rt5677->reset_pin, 1); in rt5677_remove()
4928 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_suspend() local
4930 if (rt5677->irq) { in rt5677_suspend()
4931 cancel_delayed_work_sync(&rt5677->resume_irq_check); in rt5677_suspend()
4932 disable_irq(rt5677->irq); in rt5677_suspend()
4935 if (!rt5677->dsp_vad_en) { in rt5677_suspend()
4936 regcache_cache_only(rt5677->regmap, true); in rt5677_suspend()
4937 regcache_mark_dirty(rt5677->regmap); in rt5677_suspend()
4939 gpiod_set_value_cansleep(rt5677->pow_ldo2, 0); in rt5677_suspend()
4940 gpiod_set_value_cansleep(rt5677->reset_pin, 1); in rt5677_suspend()
4948 struct rt5677_priv *rt5677 = snd_soc_component_get_drvdata(component); in rt5677_resume() local
4950 if (!rt5677->dsp_vad_en) { in rt5677_resume()
4951 rt5677->pll_src = 0; in rt5677_resume()
4952 rt5677->pll_in = 0; in rt5677_resume()
4953 rt5677->pll_out = 0; in rt5677_resume()
4954 gpiod_set_value_cansleep(rt5677->pow_ldo2, 1); in rt5677_resume()
4955 gpiod_set_value_cansleep(rt5677->reset_pin, 0); in rt5677_resume()
4956 if (rt5677->pow_ldo2 || rt5677->reset_pin) in rt5677_resume()
4959 regcache_cache_only(rt5677->regmap, false); in rt5677_resume()
4960 regcache_sync(rt5677->regmap); in rt5677_resume()
4963 if (rt5677->irq) { in rt5677_resume()
4964 enable_irq(rt5677->irq); in rt5677_resume()
4965 schedule_delayed_work(&rt5677->resume_irq_check, 0); in rt5677_resume()
4978 struct rt5677_priv *rt5677 = i2c_get_clientdata(client); in rt5677_read() local
4980 if (rt5677->is_dsp_mode) { in rt5677_read()
4982 mutex_lock(&rt5677->dsp_pri_lock); in rt5677_read()
4983 rt5677_dsp_mode_i2c_write(rt5677, RT5677_PRIV_INDEX, in rt5677_read()
4985 rt5677_dsp_mode_i2c_read(rt5677, RT5677_PRIV_DATA, val); in rt5677_read()
4986 mutex_unlock(&rt5677->dsp_pri_lock); in rt5677_read()
4988 rt5677_dsp_mode_i2c_read(rt5677, reg, val); in rt5677_read()
4991 regmap_read(rt5677->regmap_physical, reg, val); in rt5677_read()
5000 struct rt5677_priv *rt5677 = i2c_get_clientdata(client); in rt5677_write() local
5002 if (rt5677->is_dsp_mode) { in rt5677_write()
5004 mutex_lock(&rt5677->dsp_pri_lock); in rt5677_write()
5005 rt5677_dsp_mode_i2c_write(rt5677, RT5677_PRIV_INDEX, in rt5677_write()
5007 rt5677_dsp_mode_i2c_write(rt5677, RT5677_PRIV_DATA, in rt5677_write()
5009 mutex_unlock(&rt5677->dsp_pri_lock); in rt5677_write()
5011 rt5677_dsp_mode_i2c_write(rt5677, reg, val); in rt5677_write()
5014 regmap_write(rt5677->regmap_physical, reg, val); in rt5677_write()
5039 .name = "rt5677-aif1",
5058 .name = "rt5677-aif2",
5077 .name = "rt5677-aif3",
5096 .name = "rt5677-aif4",
5115 .name = "rt5677-slimbus",
5134 .name = "rt5677-dspbuffer",
5198 { .compatible = "realtek,rt5677", .data = (const void *)RT5677 },
5204 { "RT5677CE", RT5677 },
5209 static void rt5677_read_device_properties(struct rt5677_priv *rt5677, in rt5677_read_device_properties() argument
5214 rt5677->pdata.in1_diff = in rt5677_read_device_properties()
5218 rt5677->pdata.in2_diff = in rt5677_read_device_properties()
5222 rt5677->pdata.lout1_diff = in rt5677_read_device_properties()
5226 rt5677->pdata.lout2_diff = in rt5677_read_device_properties()
5230 rt5677->pdata.lout3_diff = in rt5677_read_device_properties()
5235 rt5677->pdata.gpio_config, in rt5677_read_device_properties()
5240 rt5677->pdata.dmic2_clk_pin = val; in rt5677_read_device_properties()
5244 rt5677->pdata.jd1_gpio = val; in rt5677_read_device_properties()
5248 rt5677->pdata.jd2_gpio = val; in rt5677_read_device_properties()
5252 rt5677->pdata.jd3_gpio = val; in rt5677_read_device_properties()
5279 static bool rt5677_check_hotword(struct rt5677_priv *rt5677) in rt5677_check_hotword() argument
5283 if (!rt5677->is_dsp_mode) in rt5677_check_hotword()
5286 if (regmap_read(rt5677->regmap, RT5677_GPIO_CTRL1, ®_gpio)) in rt5677_check_hotword()
5294 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, in rt5677_check_hotword()
5303 struct rt5677_priv *rt5677 = data; in rt5677_irq() local
5307 mutex_lock(&rt5677->irq_lock); in rt5677_irq()
5325 ret = regmap_read(rt5677->regmap, RT5677_IRQ_CTRL1, ®_irq); in rt5677_irq()
5327 dev_err(rt5677->dev, "failed reading IRQ status: %d\n", in rt5677_irq()
5336 virq = irq_find_mapping(rt5677->domain, i); in rt5677_irq()
5352 if (!irq_fired && !rt5677_check_hotword(rt5677)) in rt5677_irq()
5355 ret = regmap_write(rt5677->regmap, RT5677_IRQ_CTRL1, reg_irq); in rt5677_irq()
5357 dev_err(rt5677->dev, "failed updating IRQ status: %d\n", in rt5677_irq()
5364 mutex_unlock(&rt5677->irq_lock); in rt5677_irq()
5374 struct rt5677_priv *rt5677 = in rt5677_resume_irq_check() local
5382 rt5677_irq(0, rt5677); in rt5677_resume_irq_check()
5393 mutex_lock(&rt5677->irq_lock); in rt5677_resume_irq_check()
5395 if (rt5677->irq_en & rt5677_irq_descs[i].enable_mask) { in rt5677_resume_irq_check()
5396 virq = irq_find_mapping(rt5677->domain, i); in rt5677_resume_irq_check()
5401 mutex_unlock(&rt5677->irq_lock); in rt5677_resume_irq_check()
5406 struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data); in rt5677_irq_bus_lock() local
5408 mutex_lock(&rt5677->irq_lock); in rt5677_irq_bus_lock()
5413 struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data); in rt5677_irq_bus_sync_unlock() local
5416 regmap_update_bits(rt5677->regmap, RT5677_IRQ_CTRL1, in rt5677_irq_bus_sync_unlock()
5418 RT5677_EN_IRQ_GPIO_JD3, rt5677->irq_en); in rt5677_irq_bus_sync_unlock()
5419 mutex_unlock(&rt5677->irq_lock); in rt5677_irq_bus_sync_unlock()
5424 struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data); in rt5677_irq_enable() local
5426 rt5677->irq_en |= rt5677_irq_descs[data->hwirq].enable_mask; in rt5677_irq_enable()
5431 struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data); in rt5677_irq_disable() local
5433 rt5677->irq_en &= ~rt5677_irq_descs[data->hwirq].enable_mask; in rt5677_irq_disable()
5447 struct rt5677_priv *rt5677 = h->host_data; in rt5677_irq_map() local
5449 irq_set_chip_data(virq, rt5677); in rt5677_irq_map()
5465 struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c); in rt5677_init_irq() local
5468 if (!rt5677->pdata.jd1_gpio && in rt5677_init_irq()
5469 !rt5677->pdata.jd2_gpio && in rt5677_init_irq()
5470 !rt5677->pdata.jd3_gpio) in rt5677_init_irq()
5478 mutex_init(&rt5677->irq_lock); in rt5677_init_irq()
5479 INIT_DELAYED_WORK(&rt5677->resume_irq_check, rt5677_resume_irq_check); in rt5677_init_irq()
5486 regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC, in rt5677_init_irq()
5490 regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL1, 0xff, 0xff); in rt5677_init_irq()
5493 if (rt5677->pdata.jd1_gpio) { in rt5677_init_irq()
5495 jd_val |= rt5677->pdata.jd1_gpio << RT5677_SEL_GPIO_JD1_SFT; in rt5677_init_irq()
5497 if (rt5677->pdata.jd2_gpio) { in rt5677_init_irq()
5499 jd_val |= rt5677->pdata.jd2_gpio << RT5677_SEL_GPIO_JD2_SFT; in rt5677_init_irq()
5501 if (rt5677->pdata.jd3_gpio) { in rt5677_init_irq()
5503 jd_val |= rt5677->pdata.jd3_gpio << RT5677_SEL_GPIO_JD3_SFT; in rt5677_init_irq()
5505 regmap_update_bits(rt5677->regmap, RT5677_JD_CTRL1, jd_mask, jd_val); in rt5677_init_irq()
5508 regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1, in rt5677_init_irq()
5512 rt5677->domain = irq_domain_create_linear(dev_fwnode(&i2c->dev), in rt5677_init_irq()
5513 RT5677_IRQ_NUM, &rt5677_domain_ops, rt5677); in rt5677_init_irq()
5514 if (!rt5677->domain) { in rt5677_init_irq()
5521 "rt5677", rt5677); in rt5677_init_irq()
5525 rt5677->irq = i2c->irq; in rt5677_init_irq()
5533 struct rt5677_priv *rt5677; in rt5677_i2c_probe() local
5537 rt5677 = devm_kzalloc(&i2c->dev, sizeof(struct rt5677_priv), in rt5677_i2c_probe()
5539 if (rt5677 == NULL) in rt5677_i2c_probe()
5542 rt5677->dev = &i2c->dev; in rt5677_i2c_probe()
5543 rt5677->set_dsp_vad = rt5677_set_dsp_vad; in rt5677_i2c_probe()
5544 INIT_DELAYED_WORK(&rt5677->dsp_work, rt5677_dsp_work); in rt5677_i2c_probe()
5545 i2c_set_clientdata(i2c, rt5677); in rt5677_i2c_probe()
5547 rt5677->type = (enum rt5677_type)(uintptr_t)device_get_match_data(dev); in rt5677_i2c_probe()
5548 if (rt5677->type == 0) in rt5677_i2c_probe()
5551 rt5677_read_device_properties(rt5677, &i2c->dev); in rt5677_i2c_probe()
5557 rt5677->pow_ldo2 = devm_gpiod_get_optional(&i2c->dev, in rt5677_i2c_probe()
5559 if (IS_ERR(rt5677->pow_ldo2)) { in rt5677_i2c_probe()
5560 ret = PTR_ERR(rt5677->pow_ldo2); in rt5677_i2c_probe()
5564 rt5677->reset_pin = devm_gpiod_get_optional(&i2c->dev, in rt5677_i2c_probe()
5566 if (IS_ERR(rt5677->reset_pin)) { in rt5677_i2c_probe()
5567 ret = PTR_ERR(rt5677->reset_pin); in rt5677_i2c_probe()
5572 if (rt5677->pow_ldo2 || rt5677->reset_pin) { in rt5677_i2c_probe()
5580 rt5677->regmap_physical = devm_regmap_init_i2c(i2c, in rt5677_i2c_probe()
5582 if (IS_ERR(rt5677->regmap_physical)) { in rt5677_i2c_probe()
5583 ret = PTR_ERR(rt5677->regmap_physical); in rt5677_i2c_probe()
5589 rt5677->regmap = devm_regmap_init(&i2c->dev, NULL, i2c, &rt5677_regmap); in rt5677_i2c_probe()
5590 if (IS_ERR(rt5677->regmap)) { in rt5677_i2c_probe()
5591 ret = PTR_ERR(rt5677->regmap); in rt5677_i2c_probe()
5597 regmap_read(rt5677->regmap, RT5677_VENDOR_ID2, &val); in rt5677_i2c_probe()
5600 "Device with ID register %#x is not rt5677\n", val); in rt5677_i2c_probe()
5604 regmap_write(rt5677->regmap, RT5677_RESET, 0x10ec); in rt5677_i2c_probe()
5606 ret = regmap_register_patch(rt5677->regmap, init_list, in rt5677_i2c_probe()
5611 if (rt5677->pdata.in1_diff) in rt5677_i2c_probe()
5612 regmap_update_bits(rt5677->regmap, RT5677_IN1, in rt5677_i2c_probe()
5615 if (rt5677->pdata.in2_diff) in rt5677_i2c_probe()
5616 regmap_update_bits(rt5677->regmap, RT5677_IN1, in rt5677_i2c_probe()
5619 if (rt5677->pdata.lout1_diff) in rt5677_i2c_probe()
5620 regmap_update_bits(rt5677->regmap, RT5677_LOUT1, in rt5677_i2c_probe()
5623 if (rt5677->pdata.lout2_diff) in rt5677_i2c_probe()
5624 regmap_update_bits(rt5677->regmap, RT5677_LOUT1, in rt5677_i2c_probe()
5627 if (rt5677->pdata.lout3_diff) in rt5677_i2c_probe()
5628 regmap_update_bits(rt5677->regmap, RT5677_LOUT1, in rt5677_i2c_probe()
5631 if (rt5677->pdata.dmic2_clk_pin == RT5677_DMIC_CLK2) { in rt5677_i2c_probe()
5632 regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL2, in rt5677_i2c_probe()
5635 rt5677_update_gpio_bits(rt5677, RT5677_GPIO5, in rt5677_i2c_probe()
5640 if (rt5677->pdata.micbias1_vdd_3v3) in rt5677_i2c_probe()
5641 regmap_update_bits(rt5677->regmap, RT5677_MICBIAS, in rt5677_i2c_probe()
5671 MODULE_DESCRIPTION("ASoC RT5677 driver");