Lines Matching full:intel
34 - VK_EXT_buffer_device_address on Intel and RADV.
35 - VK_EXT_depth_clip_enable on Intel and RADV.
36 - VK_KHR_ycbcr_image_arrays on Intel.
37 - VK_EXT_inline_uniform_block on Intel and RADV.
38 - VK_EXT_external_memory_host on Intel.
39 - VK_EXT_host_query_reset on Intel and RADV.
40 - VK_KHR_surface_protected_capabilities on Intel and RADV.
41 - VK_EXT_pipeline_creation_feedback on Intel and RADV.
45 - VK_NV_compute_shader_derivatives on Intel.
46 - VK_KHR_shader_float16_int8 on Intel and RADV (RADV only supports
48 - VK_KHR_shader_atomic_int64 on Intel.
49 - VK_EXT_descriptor_indexing on Intel.
50 - VK_KHR_shader_float16_int8 on Intel and RADV.
52 - VK_EXT_memory_budget on Intel.
147 - totem assert failure: totem: src/intel/genxml/gen9_pack.h:72:
225 - Mesa SIGABRT: src/intel/genxml/gen9_pack.h:72: \__gen_uint:
628 - intel: Add Elkhart Lake device info
629 - intel: Add Elkhart Lake PCI-IDs
632 - intel: Add support for Comet Lake
722 - turnip: Cargo cult the Intel heap size functionality.
842 - intel/decoders: silence uninitialized variable warnings in
844 - intel/compiler: silence unitialized variable warning in
882 - intel/compiler: use 0 as sampler in emit_mcs_fetch
903 - intel/nir: Combine store_derefs after vectorizing IO
904 - intel/nir: Combine store_derefs to improve code from SPIR-V
907 - intel/compiler: handle GLSL_TYPE_INTERFACE as GLSL_TYPE_STRUCT
918 - intel/fs: Use TEX_LOGICAL whenever implicit lod is supported
919 - intel/fs: Add support for CS to group invocations in quads
920 - intel/fs: Don't loop when lowering CS intrinsics
921 - intel/fs: Use NIR_PASS_V when lowering CS intrinsics
934 - intel/fs: Don't handle texop_tex for shaders without implicit LOD
936 - intel/fs: Assert when brw_fs_nir sees a nir_deref_instr
1139 - intel/fs: Make alpha test work with MRT and sample mask
1142 - intel/compiler: Do not reswizzle dst if instruction writes to flag
1187 - intel/compiler: use defined size for vector components
1204 - intel/compiler: fix uninit non-static variable. (v2)
1249 - meson: fix style in intel/tools
1250 - meson: remove -std=c++11 from intel/tools
1376 - intel: Use the NIR lowering for isign.
1744 - intel/dump_gpu: Disambiguate between BOs from different GEM handle
1746 - intel/fs: Exclude control sources from execution type and region
1748 - intel/fs: Lower integer multiply correctly when destination stride
1750 - intel/fs: Cap dst-aligned region stride to maximum representable
1752 - intel/fs: Implement extended strides greater than 4 for IR source
1754 - intel/fs: Rely on undocumented unrestricted regioning for 32x16-bit
1895 - intel/compiler: add a NIR pass to lower conversions
1896 - intel/compiler: split float to 64-bit opcodes from int to 64-bit
1897 - intel/compiler: handle b2i/b2f with other integer conversion opcodes
1898 - intel/compiler: assert restrictions on conversions to half-float
1899 - intel/compiler: lower some 16-bit float operations to 32-bit
1900 - intel/compiler: handle extended math restrictions for half-float
1901 - intel/compiler: implement 16-bit fsign
1902 - intel/compiler: drop unnecessary temporary from 32-bit fsign
1904 - intel/compiler: add instruction setters for Src1Type and Src2Type.
1905 - intel/compiler: add new half-float register type for 3-src
1907 - intel/compiler: don't compact 3-src instructions with Src1Type or
1909 - intel/compiler: allow half-float on 3-source instructions since gen8
1910 - intel/compiler: set correct precision fields for 3-source float
1912 - intel/compiler: fix ddx and ddy for 16-bit float
1913 - intel/compiler: fix ddy for half-float in Broadwell
1914 - intel/compiler: workaround for SIMD8 half-float MAD in gen8
1915 - intel/compiler: split is_partial_write() into two variants
1916 - intel/compiler: activate 16-bit bit-size lowerings also for 8-bit
1917 - intel/compiler: rework conversion opcodes
1918 - intel/compiler: ask for an integer type if requesting an 8-bit type
1919 - intel/eu: force stride of 2 on NULL register for Byte instructions
1920 - intel/compiler: generalize the combine constants pass
1921 - intel/compiler: implement is_zero, is_one, is_negative_one for
1923 - intel/compiler: add a brw_reg_type_is_integer helper
1924 - intel/compiler: fix cmod propagation for non 32-bit types
1925 - intel/compiler: remove inexact algebraic optimizations from the
1927 - intel/compiler: skip MAD algebraic optimization for half-float or
1929 - intel/compiler: implement SIMD16 restrictions for mixed-float
1931 - intel/compiler: also set F execution type for mixed float mode in BDW
1932 - intel/compiler: validate region restrictions for half-float
1934 - intel/compiler: validate conversions between 64-bit and 8-bit types
1935 - intel/compiler: validate region restrictions for mixed float mode
1943 - intel/compiler: Silence warning about value that may be used
1954 - intel/vec4: Emit constants for some ALU sources as immediate values
1957 - intel/fs: Relax type matching rules in cmod propagation from MOV
1959 - intel/fs: Handle OR source modifiers in algebraic optimization
1960 - intel/fs: Refactor ALU source and destination handling to a separate
1962 - intel/fs: Emit logical-not of operands on Gen8+
1963 - intel/fs: Use De Morgan's laws to avoid logical-not of a logic result
1965 - intel/fs: Emit better code for b2f(inot(a)) and b2i(inot(a))
1968 - intel/fs: Generate if instructions with inverted conditions
1970 - intel/fs: Don't assert on b2f with a saturate modifier
1972 - intel/compiler: Silence many unused parameter warnings in brw_eu.h
1973 - intel/compiler: Silence unused parameter warning in
1975 - intel/fs: nir_op_extract_i8 extracts a byte, not a word
1976 - intel/fs: Fix extract_u8 of an odd byte from a 64-bit integer
1988 - intel/compiler: Use partial redundancy elimination for compares
1989 - intel/fs: Eliminate dead code first
1990 - intel/fs: Refactor code generation for nir_op_fsign to its own
1992 - intel/fs: Add a scale factor to emit_fsign
1993 - intel/fs: Generate better code for fsign multiplied by a value
1999 - intel/fs: Add support for float16 to the fsign optimizations
2001 - intel/compiler: Don't have sepearate, per-Gen nir_options
2002 - intel/compiler: Lower ffma on Gen4 and Gen5
2003 - intel/fs: Fix D to W conversion in opt_combine_constants
2071 - intel/nir: Add global support to lower_mem_access_bit_sizes
2072 - intel/fs/cse: Split create_copy_instr into three cases
2073 - intel/fs: Properly handle 64-bit types in LOAD_PAYLOAD
2074 - intel/fs: Do the grf127 hack on SIMD8 instructions in SIMD16 mode
2075 - intel/fs: Implement load/store_global with A64 untyped messages
2076 - intel/fs: Use SENDS for A64 writes on gen9+
2077 - intel/fs: Implement nir_intrinsic_global_atomic\_\*
2082 - intel/fs: Use enumerated array assignments in fb read TXF setup
2088 - intel/fs: Silence a compiler warning
2089 - intel/fs: Bail in optimize_extract_to_float if we have modifiers
2109 - intel/eu: Add an EOT parameter to send_indirect_[split]_message
2110 - intel/fs: Add an enum type for logical sampler inst sources
2111 - intel/fs: Re-order logical surface arguments
2112 - intel/fs: Drop the fs_surface_builder
2113 - intel/vec4: Drop dead code for handling typed surface messages
2114 - intel/fs: Get rid of the IMAGE_SIZE opcode
2115 - intel/compiler: Drop unused surface opcodes
2116 - intel/schedule_instructions: Move some comments
2117 - intel/compiler: Re-prefix non-logical surface opcodes with VEC4
2121 - intel,nir: Lower TXD with min_lod when the sampler index is not < 16
2140 - intel/debug: Add a debug flag to force software fp64
2141 - intel/nir: Drop an unneeded lower_constant_initializers call
2147 - intel/nir: Move 64-bit lowering later
2152 - intel/nir: Move lower_mem_access_bit_sizes to postprocess_nir
2155 - intel/nir: Vectorize all IO
2181 - intel/nir: Lower array-deref-of-vector UBO and SSBO loads
2203 - intel/common: Add a MI command builder
2204 - intel/common: Add unit tests for gen_mi_builder
2213 - intel/common: Support bigger right-shifts with mi_builder
2216 - intel/nir: Take a nir_tex_instr and src index in brw_texture_offset
2227 - intel/mi_builder: Re-order an initializer
2228 - intel/mi_builder: Disable mem_mem tests on IVB
2234 - intel/fs: Account for live range lengths in spill costs
2242 - intel/nir: Re-run int64 lowering in postprocess_nir
2247 - intel,nir: Lower TXD with a bindless sampler
2248 - intel/fs: Add support for bindless texture ops
2253 - intel/fs: Add support for bindless image load/store/atomic
2275 - intel/fs/ra: Only add dest interference to sources that exist
2276 - intel/fs/ra: Stop adding RA interference to too many SENDS nodes
2281 - intel/fs,vec4: Use g0 as the header for MFENCE
2282 - intel/fs: Do a stalling MFENCE in endInvocationInterlock()
2288 - intel: Fix the description of Coffeelake pci-id 0x3E98
2352 - intel/compiler: Move int64/doubles lowering options
2354 - intel/genxml: Support base-16 in value & start fields in
2381 - Revert "intel/compiler: split is_partial_write() into two variants"
2482 - intel/nir: use nir_src_is_const and nir_src_as_uint
2542 - iris: Initial commit of a new 'iris' driver for Intel Gen8+ GPUs.
3312 - intel/fs: Fix opt_peephole_csel to not throw away saturates.
3334 - intel: Emit 3DSTATE_VF_STATISTICS dynamically
3374 - intel/fs: Don't emit empty ELSE blocks.
3487 - build: move imgui out of src/intel/tools to be reused
3492 - intel: fix urb size for CFL GT1
3495 - intel/aub_viewer: printout 48bits addresses
3496 - intel/aub_viewer: silence compiler warning
3497 - intel/aub_viewer: silence more compiler warnings
3503 - intel/compiler: use correct swizzle for replacement
3514 - intel/decoders: add address space indicator to get BOs
3515 - intel/decoders: handle decoding MI_BBS from ring
3516 - intel/decoders: limit number of decoded batchbuffers
3517 - intel/aub_read: reuse defines from gen_context
3518 - intel/aub_write: split comment section from HW setup
3519 - intel/aub_write: write header in init
3520 - intel/aub_write: break execlist write in 2
3521 - intel/aub_write: switch to use i915_drm engine classes
3522 - intel/aub_write: log mmio writes
3523 - intel/aub_write: store the physical page allocator in struct
3524 - intel/aub_write: turn context images arrays into functions
3525 - intel/aub_write: factorize context image/pphwsp/ring creation
3528 - intel/error2aub: build a list of BOs before writing them
3529 - intel/error2aub: identify buffers by engine
3530 - intel/error2aub: strenghten batchbuffer identifier marker
3531 - intel/error2aub: parse other buffer types
3532 - intel/error2aub: annotate buffer with their address space
3533 - intel/error2aub: store engine last ring buffer head/tail pointers
3534 - intel/error2aub: write GGTT buffers into the aub file
3535 - intel/error2aub: add a verbose option
3536 - intel/error2aub: deal with GuC log buffer
3537 - intel/error2aub: support older style engine names
3556 - intel: add dependency on genxml generated files
3565 - i965: move mdapi data structure to intel/perf
3566 - i965: move OA accumulation code to intel/perf
3568 - i965: move mdapi result data format to intel/perf
3569 - i965: move mdapi guid into intel/perf
3570 - intel/perf: stub gen10/11 missing definitions
3572 - intel/perf: drop counter size field
3573 - intel/perf: constify accumlator parameter
3578 - intel/devinfo: fix missing num_thread_per_eu on ICL
3579 - intel/devinfo: add basic sanity tests on device database
3581 - intel: workaround VS fixed function issue on Gen9 GT1 parts
3610 - intel/perf: fix EuThreadsCount value in performance equations
3611 - intel/perf: improve dynamic loading config detection
3781 - intel/common: move gen_debug to intel/dev
3782 - intel/tools: Remove redundant definitions of INTEL_DEBUG
3817 - intel/compiler/test: Set devinfo->gen = 7
3818 - intel/compiler: Avoid propagating inequality cmods if types are
3820 - intel/compiler/test: Add unit test for mismatched signedness
3822 - intel/compiler: Add commas on final values of compaction table arrays
3823 - intel/compiler: Use SIMD16 instructions in fs saturate prop unit test
3824 - intel/compiler: Add unit tests for sat prop for different exec sizes
3825 - intel/compiler: Improve fix_3src_operand()
3833 - android: intel/isl: remove redundant building rules
3874 - st/mesa: indicate intel extension support for inner_coverage based on
3911 - intel/fs: Fix memory corruption when compiling a CS
3986 - intel/isl: Add isl_format_has_color_component() function.
3987 - intel/blorp: Make swizzle_color_value public.
4000 - intel/fs: Only propagate saturation if exec_size is the same.
4001 - intel/fs: Move the scalar-region conversion to the generator.
4002 - intel/fs: Add a lowering pass for linear interpolation.
4003 - intel/fs: Remove fs_generator::generate_linterp from gen11+.
4004 - intel/isl: Resize clear color buffer to full cacheline
4005 - intel/genxml: Update MI_ATOMIC genxml definition.
4006 - intel/blorp: Make blorp update the clear color in gen11.
4198 - intel: Add more PCI Device IDs for Coffee Lake and Ice Lake.
4227 - intel/fs: Remove unused condition from opt_algebraic case
4228 - intel/compiler: Fix assertions in brw_alu3
4420 - intel/compiler: add scale_factors to sampler_prog_key_data
4614 - intel/genxml: Only handle instructions meant for render engine when
4616 - intel/genxml: Media instructions and structures for gen6
4617 - intel/genxml: Media instructions and structures for gen7
4618 - intel/genxml: Media instructions and structures for gen7.5
4619 - intel/genxml: Media instructions and structures for gen8
4620 - intel/genxml: Media instructions and structures for gen9
4621 - intel/genxml: Media instructions and structures for gen10
4622 - intel/genxml: Media instructions and structures for gen11
4626 - intel/compiler/icl: Use tcs barrier id bits 24:30 instead of 24:27
4627 - intel/compiler/fs/icl: Use dummy masked urb write for tess eval