33 radv_spm_init_bo(struct radv_device *device)  in radv_spm_init_bo()  argument
35    struct radeon_winsys *ws = device->ws;  in radv_spm_init_bo()
40    device->spm_trace.buffer_size = size;  in radv_spm_init_bo()
41    device->spm_trace.sample_interval = sample_interval;  in radv_spm_init_bo()
44    result = ws->buffer_create(  in radv_spm_init_bo()
48    device->spm_trace.bo = bo;  in radv_spm_init_bo()
52    result = ws->buffer_make_resident(ws, device->spm_trace.bo, true);  in radv_spm_init_bo()
56    device->spm_trace.ptr = ws->buffer_map(device->spm_trace.bo);  in radv_spm_init_bo()
57    if (!device->spm_trace.ptr)  in radv_spm_init_bo()
64 radv_emit_spm_counters(struct radv_device *device, struct radeon_cmdbuf *cs)  in radv_emit_spm_counters()  argument
66    struct ac_spm_trace_data *spm_trace = &device->spm_trace;  in radv_emit_spm_counters()
68    for (uint32_t b = 0; b < spm_trace->num_used_sq_block_sel; b++) {  in radv_emit_spm_counters()
69       struct ac_spm_block_select *sq_block_sel = &spm_trace->sq_block_sel[b];  in radv_emit_spm_counters()
70       const struct ac_spm_counter_select *cntr_sel = &sq_block_sel->counters[0];  in radv_emit_spm_counters()
74       radeon_emit(cs, cntr_sel->sel0 | S_036700_SQC_BANK_MASK(0xf)); /* SQC_BANK_MASK only gfx10 */  in radv_emit_spm_counters()
77    for (uint32_t b = 0; b < spm_trace->num_block_sel; b++) {  in radv_emit_spm_counters()
78       struct ac_spm_block_select *block_sel = &spm_trace->block_sel[b];  in radv_emit_spm_counters()
79       struct ac_pc_block_base *regs = block_sel->b->b->b;  in radv_emit_spm_counters()
81       radeon_set_uconfig_reg(cs, R_030800_GRBM_GFX_INDEX, block_sel->grbm_gfx_index);  in radv_emit_spm_counters()
83       for (unsigned c = 0; c < block_sel->num_counters; c++) {  in radv_emit_spm_counters()
84          const struct ac_spm_counter_select *cntr_sel = &block_sel->counters[c];  in radv_emit_spm_counters()
86          if (!cntr_sel->active)  in radv_emit_spm_counters()
89          radeon_set_uconfig_reg_seq(cs, regs->select0[c], 1);  in radv_emit_spm_counters()
90          radeon_emit(cs, cntr_sel->sel0);  in radv_emit_spm_counters()
92          radeon_set_uconfig_reg_seq(cs, regs->select1[c], 1);  in radv_emit_spm_counters()
93          radeon_emit(cs, cntr_sel->sel1);  in radv_emit_spm_counters()
104 radv_emit_spm_setup(struct radv_device *device, struct radeon_cmdbuf *cs)  in radv_emit_spm_setup()  argument
106    struct ac_spm_trace_data *spm_trace = &device->spm_trace;  in radv_emit_spm_setup()
107    uint64_t va = radv_buffer_get_va(spm_trace->bo);  in radv_emit_spm_setup()
108    uint64_t ring_size = spm_trace->buffer_size;  in radv_emit_spm_setup()
111    assert(!(va & (SPM_RING_BASE_ALIGN - 1)));  in radv_emit_spm_setup()
112    assert(!(ring_size & (SPM_RING_BASE_ALIGN - 1)));  in radv_emit_spm_setup()
113    assert(spm_trace->sample_interval >= 32);  in radv_emit_spm_setup()
118 …                       S_037200_PERFMON_SAMPLE_INTERVAL(spm_trace->sample_interval)); /* in sclk */  in radv_emit_spm_setup()
127       total_muxsel_lines += spm_trace->num_muxsel_lines[s];  in radv_emit_spm_setup()
133                               S_03727C_SE0_NUM_LINE(spm_trace->num_muxsel_lines[0]) |  in radv_emit_spm_setup()
134                               S_03727C_SE1_NUM_LINE(spm_trace->num_muxsel_lines[1]) |  in radv_emit_spm_setup()
135                               S_03727C_SE2_NUM_LINE(spm_trace->num_muxsel_lines[2]) |  in radv_emit_spm_setup()
136                               S_03727C_SE3_NUM_LINE(spm_trace->num_muxsel_lines[3]));  in radv_emit_spm_setup()
139                               S_037280_GLOBAL_NUM_LINE(spm_trace->num_muxsel_lines[4]));  in radv_emit_spm_setup()
147       if (!spm_trace->num_muxsel_lines[s])  in radv_emit_spm_setup()
164       for (unsigned l = 0; l < spm_trace->num_muxsel_lines[s]; l++) {  in radv_emit_spm_setup()
165          uint32_t *data = (uint32_t *)spm_trace->muxsel_lines[s][l].muxsel;  in radv_emit_spm_setup()
167          /* Select MUXSEL_ADDR to point to the next muxsel. */  in radv_emit_spm_setup()
182    /* Select SPM counters. */  in radv_emit_spm_setup()
183    radv_emit_spm_counters(device, cs);  in radv_emit_spm_setup()
187 radv_spm_init(struct radv_device *device)  in radv_spm_init()  argument
189    const struct radeon_info *info = &device->physical_device->rad_info;  in radv_spm_init()
190    struct ac_perfcounters *pc = &device->physical_device->ac_perfcounters;  in radv_spm_init()
203       {GL2C, 0, info->gfx_level >= GFX10_3 ? 0x2b : 0x23},  /* Number of GL2C misses. */  in radv_spm_init()
207    if (!pc->blocks)  in radv_spm_init()
210    if (!ac_init_spm(info, pc, ARRAY_SIZE(spm_counters), spm_counters, &device->spm_trace))  in radv_spm_init()
213    if (!radv_spm_init_bo(device))  in radv_spm_init()
220 radv_spm_finish(struct radv_device *device)  in radv_spm_finish()  argument
222    struct radeon_winsys *ws = device->ws;  in radv_spm_finish()
224    if (device->spm_trace.bo) {  in radv_spm_finish()
225       ws->buffer_make_resident(ws, device->spm_trace.bo, false);  in radv_spm_finish()
226       ws->buffer_destroy(ws, device->spm_trace.bo);  in radv_spm_finish()
229    ac_destroy_spm(&device->spm_trace);  in radv_spm_finish()