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Searched defs:CCR (Results 1 – 15 of 15) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMISelLowering.cpp4474 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSignedALUO() local
4594 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT() local
4629 SDValue CCR = Cond.getOperand(3); in LowerSELECT() local
4698 SDValue TrueVal, SDValue ARMcc, SDValue CCR, in getCMOV()
5046 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT_CC() local
5081 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerSELECT_CC() local
5188 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in OptimizeVFPBrcond() local
5237 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBRCOND() local
5291 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBR_CC() local
5300 SDValue CCR = DAG.getRegister(ARM::CPSR, MVT::i32); in LowerBR_CC() local
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/third_party/cmsis/CMSIS/Core/Include/
Dcore_cm1.h349 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm0.h349 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_sc000.h360 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm0plus.h367 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm23.h393 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_sc300.h387 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm3.h387 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm4.h460 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm7.h475 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm35p.h528 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm33.h528 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_starmc1.h539 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm55.h538 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member
Dcore_cm85.h559 __IOM uint32_t CCR; /*!< Offset: 0x014 (R/W) Configuration Control Register */ member