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Searched defs:OffsetReg (Results 1 – 22 of 22) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/
DWebAssemblyFrameLowering.cpp193 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitPrologue() local
247 Register OffsetReg = MRI.createVirtualRegister(PtrRC); in emitEpilogue() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600InstrInfo.cpp1040 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1054 Register OffsetReg = MI.getOperand(OffsetOpIdx).getReg(); in expandPostRAPseudo() local
1123 unsigned OffsetReg, in buildIndirectWrite()
1155 unsigned OffsetReg, in buildIndirectRead()
DSIFrameLowering.cpp120 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildPrologSpill() local
167 MCPhysReg OffsetReg = findScratchNonCalleeSaveRegister( in buildEpilogReload() local
DAMDGPUCallLowering.cpp356 Register OffsetReg = MRI.createGenericVirtualRegister(LLT::scalar(64)); in lowerParameterPtr() local
DSIRegisterInfo.cpp362 Register OffsetReg = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass); in materializeFrameBaseRegister() local
DAMDGPUInstructionSelector.cpp2034 Register OffsetReg = MRI->createVirtualRegister(&AMDGPU::SReg_32RegClass); in selectSmrdSgpr() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb2InstrInfo.cpp566 Register OffsetReg = MI.getOperand(FrameRegIdx + 1).getReg(); in rewriteT2FrameIndex() local
DARMCallLowering.cpp105 Register OffsetReg = MRI.createGenericVirtualRegister(s32); in getStackAddress() local
DThumb2SizeReduction.cpp557 unsigned OffsetReg = 0; in ReduceLoadStore() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/
DLanaiAsmParser.cpp130 unsigned OffsetReg; member
624 unsigned OffsetReg = Op->getReg(); in MorphToMemRegReg() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86CallLowering.cpp114 Register OffsetReg = MRI.createGenericVirtualRegister(SType); in getStackAddress() local
DX86ISelLowering.cpp30385 unsigned OffsetReg = 0; in EmitVAARG64WithCustomInserter() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsSEInstrInfo.cpp881 Register OffsetReg = I->getOperand(0).getReg(); in expandEhReturn() local
DMipsCallLowering.cpp297 Register OffsetReg = MRI.createGenericVirtualRegister(s32); in getStackAddress() local
DMipsISelLowering.cpp2549 unsigned OffsetReg = ABI.IsN64() ? Mips::V1_64 : Mips::V1; in lowerEH_RETURN() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonOptAddrMode.cpp166 Register OffsetReg = MI.getOperand(2).getReg(); in canRemoveAddasl() local
DHexagonISelLowering.cpp2867 unsigned OffsetReg = Hexagon::R28; in LowerEH_RETURN() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64CallLowering.cpp159 Register OffsetReg = MRI.createGenericVirtualRegister(s64); in getStackAddress() local
DAArch64FastISel.cpp94 unsigned OffsetReg = 0; member in __anonf240ea8c0111::AArch64FastISel::Address
DAArch64InstructionSelector.cpp4316 Register OffsetReg = OffsetInst->getOperand(1).getReg(); in selectExtendedSHL() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/AsmParser/
DSparcAsmParser.cpp241 unsigned OffsetReg; member
/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/
DIceTargetLoweringARM32.cpp5291 const Variable *OffsetReg, int16_t OffsetRegShAmt, in dumpAddressOpt()
5367 Variable **OffsetReg, int32_t OffsetRegShamt, in matchCombinedBaseIndex()
5406 Variable **OffsetReg, OperandARM32::ShiftKind *Kind, in matchShiftedOffsetReg()
5568 Variable *OffsetReg = nullptr; in formAddressingMode() local