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Searched defs:baseReg (Results 1 – 20 of 20) sorted by relevance

/arkcompiler/ets_runtime/ecmascript/compiler/assembler/x64/
Dmacro_assembler_x64.cpp24 x64::Register baseReg = (dstStackSlot.IsFrameBase()) ? x64::rbp : x64::rsp; in Move() local
43 x64::Register baseReg = (stackSlot.IsFrameBase()) ? x64::rbp : x64::rsp; in Cmp() local
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/
Dmacro_assembler.h41 StackSlotOperand(BaseRegister baseReg, int32_t stackOffset) in StackSlotOperand()
/arkcompiler/ets_runtime/ecmascript/compiler/assembler/aarch64/
Dmacro_assembler_aarch64.cpp38 aarch64::Register baseReg = (dstStackSlot.IsFrameBase()) ? aarch64::Register(aarch64::FP) : in Move() local
60 aarch64::Register baseReg = (stackSlot.IsFrameBase()) ? aarch64::Register(aarch64::FP) : in Cmp() local
106 aarch64::Register baseReg = (dstStackSlot.IsFrameBase()) ? aarch64::Register(aarch64::FP) : in SaveReturnRegister() local
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/aarch64/
Daarch64_obj_emitter.cpp1244 Operand *baseReg = memOpnd.GetBaseRegister(); in GenLoadStoreRegInsn() local
1296 Operand *baseReg = memOpnd.GetBaseRegister(); in GenLoadStoreARInsn() local
1310 Operand *baseReg = memOpnd.GetBaseRegister(); in GenLoadExclusiveInsn() local
1326 Operand *baseReg = memOpnd.GetBaseRegister(); in GenLoadExclusivePairInsn() local
1342 Operand *baseReg = memOpnd.GetBaseRegister(); in GenStoreExclusiveInsn() local
1360 Operand *baseReg = memOpnd.GetBaseRegister(); in GenStoreExclusivePairInsn() local
1376 Operand *baseReg = memOpnd.GetBaseRegister(); in GenLoadPairInsn() local
1413 Operand *baseReg = memOpnd.GetBaseRegister(); in GenStorePairInsn() local
1455 Operand *baseReg = memOpnd.GetBaseRegister(); in GenLoadPairFloatInsn() local
1492 Operand *baseReg = memOpnd.GetBaseRegister(); in GenStorePairFloatInsn() local
Daarch64_insn.cpp133 auto *baseReg = v->GetBaseRegister(); in Visit() local
190 auto *baseReg = v->GetBaseRegister(); in Visit() local
Daarch64_dependence.cpp643 RegOperand *baseReg = memOpnd->GetBaseRegister(); in BuildStackPassArgsDeps() local
Daarch64_global.cpp1182 RegOperand *baseReg = secondInsnDestMem->GetBaseRegister(); in CheckSecondInsn() local
Daarch64_cgfunc.cpp943 MemOperand &AArch64CGFunc::CreateReplacementMemOperand(uint32 bitLen, RegOperand &baseReg, int64 of… in CreateReplacementMemOperand()
993 RegOperand *baseReg = memOpnd.GetBaseRegister(); in ConstraintOffsetToSafeRegion() local
1250 RegOperand &baseReg = LoadIntoRegister(*opnd0, PTY_a64); in SelectAssertNull() local
8628 auto *baseReg = SelectRegread(*static_cast<RegreadNode *>(baseExpr)); in CheckAndCreateExtendMemOpnd() local
9241 RegOperand *baseReg = memOpnd->GetBaseRegister(); in ConvertAdrpl12LdrToLdr() local
/arkcompiler/ets_frontend/es2panda/ir/base/
DclassDefinition.cpp111 compiler::VReg baseReg = pg->AllocReg(); in CompileHeritageClause() local
393 compiler::VReg baseReg = CompileHeritageClause(pg); in Compile() local
685 compiler::VReg baseReg = CompileHeritageClause(pg); in CompileSendableClass() local
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/
Doperand.cpp166 RegOperand *baseReg = GetBaseRegister(); in Less() local
Debo.cpp404 Operand *baseReg = memOpnd->GetBaseRegister(); in ComputeHashVal() local
511 auto *baseReg = static_cast<RegOperand *>(base); in BuildMemOpndInfo() local
Dreg_alloc_lsra.cpp1187 uint32 baseReg = isInt ? firstIntReg : firstFpReg; in UpdateParamAllocateInfo() local
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/src/cg/x86_64/
Dx64_proepilog.cpp39 RegOperand &baseReg = cgFunc.GetOpndBuilder()->CreatePReg(x64::RBP, k64BitSize, kRegTyInt); in GenerateCalleeSavedRegs() local
Dx64_MPIsel.cpp934 …RegOperand &baseReg = cgFunc->GetOpndBuilder()->CreatePReg(x64::RBP, GetPrimTypeBitSize(PTY_i64), … in SelectRangeGoto() local
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch64/
Dencode.cpp142 auto baseReg = Reg(mem.GetBase().GetId(), INT64_TYPE); in ConvertMem() local
2036 [[maybe_unused]] auto baseReg = mem.GetBase(); in EncodeLdr() local
2094 [[maybe_unused]] auto baseReg = mem.GetBase(); in EncodeLdrAcquireInvalid() local
2172 auto baseReg = mem.GetBase(); in CheckAlignment() local
3085 auto baseReg = VixlReg(base); in LoadStorePair() local
3097 auto baseReg = VixlReg(base); in LoadStoreReg() local
3186 const vixl::aarch64::Register &baseReg) in LoadStoreRegistersLoop()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/aarch32/
Dencode.cpp234 auto baseReg = VixlReg(mem.GetBase()); in ConvertMem() local
846 auto baseReg = VixlReg(mem.GetBase()); in PrepareMemLdS() local
919 auto baseReg = VixlReg(mem.GetBase()); in PrepareMemLdSForFloat() local
3190 vixl::aarch32::Register baseReg = VixlReg(base); in LoadStoreRegistersMainLoop() local
3231 vixl::aarch32::Register baseReg = VixlReg(base); in LoadStoreRegisters() local
3265 vixl::aarch32::Register baseReg = vixl::aarch32::sp; in LoadStoreRegisters() local
/arkcompiler/ets_frontend/ets2panda/compiler/core/
DJSCompiler.cpp51 compiler::VReg baseReg = pg->AllocReg(); in CompileHeritageClause() local
382 compiler::VReg baseReg = CompileHeritageClause(pg, node); in Compile() local
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/
Dcodegen.cpp2794 void PostWriteBarrier::EncodeCalculateCardIndex(Reg baseReg, ScopedTmpReg *tmp, ScopedTmpReg *tmp1) in EncodeCalculateCardIndex()
/arkcompiler/runtime_core/static_core/compiler/optimizer/code_generator/target/amd64/
Dencode.cpp3118 auto baseReg = ArchReg(base); in LoadStoreRegisters() local
/arkcompiler/runtime_core/static_core/libllvmbackend/lowering/
Dllvm_ir_constructor.cpp1474 std::string baseReg = representable ? "sp" : "x16"; in CreateInterpreterReturnRestoreRegs() local