1 /*
2 * Copyright (C) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #include <linux/module.h>
20 #include <linux/delay.h>
21 #include "securec.h"
22 #include "hi_log.h"
23 #include "drv_i2c_ioctl.h"
24 #include "drv_gpio_ioctl.h"
25 #include "drv_gpioi2c.h"
26 #include "hi_drv_gpioi2c.h"
27 #include "hi_drv_gpio.h"
28 #include "hi_drv_i2c.h"
29 #include "hi_module.h"
30 #include "hi_common.h"
31 #include "hi_error_mpi.h"
32 #include "hi_osal.h"
33
34 #if !defined(CFG_HI_USER_DRV)
35 #include "hi_drv_sys.h"
36 #endif
37
38 #define BYTE_BITS 8
39 #define MAX_I2C_CHANEL_NUM 15
40 static osal_spinlock g_gpio_i2c_lock;
41
42 extern volatile hi_void *g_gpio_usr_addr[HI_GPIO_MAX_GROUP_NUM];
43
44 i2c_gpio g_st_i2c_gpio[HI_I2C_MAX_NUM];
45
46 typedef struct {
47 hi_u32 i2c_channel;
48 hi_u32 gpio_i2c_scl;
49 hi_u32 gpio_i2c_sda;
50 volatile hi_u32 *p_gpio_dir_clk;
51 volatile hi_u32 *p_gpio_dir_data;
52 volatile hi_u32 *p_gpio_i2c_sda_reg;
53 volatile hi_u32 *p_gpio_i2c_scl_reg;
54 } i2c_data_gpio;
55
56 static i2c_data_gpio g_st_i2c_da_gpio[HI_I2C_MAX_NUM];
57 static hi_u8 g_gpio_grp_num;
58
59
60 /* 1: read, S:DevAddr:A:reg_addr:A:S:DevAddr:RecData:Stop
61 write, S:DevAddr:A:reg_addr:A:WriteData:Stop
62 2: read, S:DevAddr:A:reg_addr:A:Dealy:Stop:S:DevAddr:A:RecData:NoA:S
63 write, S:DevAddr:A:reg_addr:A:WriteData:S */
64 #define I2C_MODE_ONE 1
65 #define I2C_MODE_SECOND 2
66 #define I2C_MAX_ADDRESS_LEN 4
67
68 #define HW_REG(reg) *((volatile unsigned int *)(reg))
69 #define DELAY(i2c_num, us) time_delay_us(i2c_num, us)
70
71 osal_semaphore g_gpio_i2_sem;
72
73 static gpio_i2c_ext_func g_st_gpioi2c_ext_funcs = {
74 // .pfnGpioI2cConfig = drv_gpioi2c_config,
75 .pfn_gpio_i2c_write = hi_drv_gpioi2c_write,
76 .pfn_gpio_i2c_read = hi_drv_gpioi2c_read,
77 .pfn_gpio_i2c_write_ext = hi_drv_gpioi2c_write_ext,
78 .pfn_gpio_i2c_read_ext = hi_drv_gpioi2c_read_ext,
79 .pfn_gpio_i2c_read_ext_di_rectly = hi_drv_gpioi2c_read_ext_directly,
80 .pfn_gpio_i2c_write_ext_nostop = hi_drv_gpioi2c_write_ext_no_stop,
81
82 // .pfnGpioI2cClose = DRV_GPIOI2C_Close,
83 .pfn_gpio_i2c_sccb_read = hi_drv_gpioi2c_sccb_read,
84 // .pfnGpioI2cTunerSendData = gpio_i2c_senddata_tuner,
85 // .pfnGpioI2cTunerReceiveData = gpio_i2c_receivedata_tuner,
86 .pfn_gpio_i2c_create_channel = hi_drv_gpioi2c_create_gpio_i2c,
87 .pfn_gpio_i2c_destroy_channel = hi_drv_gpioi2c_destroy_gpio_i2c,
88 .pfn_gpio_i2c_is_used = drv_gpioi2c_is_used,
89 };
90
91 /*
92 * I2C by GPIO simulated clear 0 routine.
93 *
94 * @param whichline: GPIO control line
95 *
96 */
i2c_clr(int i2c_num,volatile unsigned int * whichline)97 static hi_void i2c_clr(int i2c_num, volatile unsigned int *whichline)
98 {
99 unsigned char regvalue = 0;
100
101 if (whichline == g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg) {
102 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_clk);
103 regvalue |= g_st_i2c_da_gpio[i2c_num].gpio_i2c_scl;
104 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_clk) = regvalue;
105
106 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg) = 0;
107 return;
108 } else if (whichline == g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg) {
109 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
110 regvalue |= g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda;
111 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
112
113 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg) = 0;
114 return;
115 } else {
116 HI_LOG_ERR("i2c_clr Error input.\n");
117 return;
118 }
119 }
120
121 /*
122 * I2C by GPIO simulated set 1 routine.
123 *
124 * @param whichline: GPIO control line
125 *
126 */
i2c_set(int i2c_num,volatile unsigned int * whichline)127 static hi_void i2c_set(int i2c_num, volatile unsigned int *whichline)
128 {
129 unsigned char regvalue = 0;
130
131 if (whichline == NULL) {
132 HI_LOG_ERR("whichline is NULL pointer.\n");
133 return;
134 }
135
136 if (whichline == g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg) {
137 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_clk);
138 regvalue |= g_st_i2c_da_gpio[i2c_num].gpio_i2c_scl;
139 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_clk) = regvalue;
140
141 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg) = g_st_i2c_da_gpio[i2c_num].gpio_i2c_scl;
142 return;
143 } else if (whichline == g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg) {
144 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
145 regvalue |= g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda;
146 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
147
148 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg) = g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda;
149 return;
150 } else {
151 HI_LOG_ERR("i2c_set Error input.\n");
152 return;
153 }
154 }
155
156 /*
157 * delays for a specified number of micro seconds routine.
158 *
159 * @param usec: number of micro seconds to pause for
160 *
161 */
time_delay_us(int i2c_num,unsigned int usec)162 static hi_void time_delay_us(int i2c_num, unsigned int usec)
163 {
164 unsigned int i = 0;
165
166 for (i = 0; i < usec; i++) {
167 udelay(1);
168 }
169 }
170
171 /*
172 * I2C by GPIO simulated read data routine.
173 *
174 * @return value: a bit for read
175 *
176 */
i2c_data_read(int i2c_num)177 static unsigned char i2c_data_read(int i2c_num)
178 {
179 unsigned char regvalue;
180
181 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
182 regvalue &= (~g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda);
183 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
184
185 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
186 if ((regvalue & g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda) != 0) {
187 return 1;
188 } else {
189 return 0;
190 }
191 }
192
193 /*
194 * sends a start bit via I2C routine.
195 *
196 */
i2c_start_bit(int i2c_num)197 static hi_void i2c_start_bit(int i2c_num)
198 {
199 DELAY(i2c_num, 1);
200 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
201 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
202 DELAY(i2c_num, 1);
203 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
204 DELAY(i2c_num, 2);
205 }
206
207 /*
208 * sends a stop bit via I2C routine.
209 *
210 */
i2c_stop_bit(int i2c_num)211 static hi_void i2c_stop_bit(int i2c_num)
212 {
213 /* actual stop bit */
214 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
215 DELAY(i2c_num, 1);
216 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
217 DELAY(i2c_num, 1);
218 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
219 DELAY(i2c_num, 1);
220 }
221
222 /*
223 * sends a character over I2C routine.
224 *
225 * @param c: character to send
226 *
227 */
i2c_send_byte(int i2c_num,unsigned char c)228 static hi_void i2c_send_byte(int i2c_num, unsigned char c)
229 {
230 hi_u32 i = 0;
231 HI_SIZE_T irq_flags = 0;
232
233 osal_spin_lock_irqsave(&g_gpio_i2c_lock, &irq_flags);
234 for (i = 0; i < BYTE_BITS; i++) {
235 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
236 DELAY(i2c_num, 1);
237
238 if (c & (1 << (BYTE_BITS - 1 - i))) {
239 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
240 } else {
241 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
242 }
243
244 DELAY(i2c_num, 1);
245 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
246 DELAY(i2c_num, 1);
247 DELAY(i2c_num, 1);
248 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
249 }
250
251 DELAY(i2c_num, 1);
252 osal_spin_unlock_irqrestore(&g_gpio_i2c_lock, &irq_flags);
253 }
254
255 /* receives a character from I2C routine.
256 *
257 * @return value: character received
258 *
259 */
i2c_receive_byte(int i2c_num)260 static unsigned char i2c_receive_byte(int i2c_num)
261 {
262 int j = 0;
263 hi_u32 i = 0;
264 unsigned char regvalue = 0;
265 HI_SIZE_T irq_flags = {0};
266
267 osal_spin_lock_irqsave(&g_gpio_i2c_lock, &irq_flags);
268 for (i = 0; i < BYTE_BITS; i++) {
269 DELAY(i2c_num, 1);
270 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
271 DELAY(i2c_num, 2);
272 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
273
274 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
275 regvalue &= (~g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda);
276 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
277 DELAY(i2c_num, 1);
278
279 if (i2c_data_read(i2c_num)) {
280 j += (1 << (BYTE_BITS - 1 - i));
281 }
282
283 DELAY(i2c_num, 1);
284 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
285 }
286
287 osal_spin_unlock_irqrestore(&g_gpio_i2c_lock, &irq_flags);
288
289 DELAY(i2c_num, 1);
290
291 return (unsigned char)j;
292 }
293
294 /* receives an acknowledge from I2C routine.
295 *
296 * @return value: 0--Ack received; 1--Nack received
297 *
298 */
i2c_receive_ack(int i2c_num)299 static int i2c_receive_ack(int i2c_num)
300 {
301 int nack ;
302 unsigned char regvalue;
303
304 DELAY(i2c_num, 1);
305
306 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
307 regvalue &= (~g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda);
308 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
309
310 DELAY(i2c_num, 1);
311 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
312 DELAY(i2c_num, 1);
313 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
314 DELAY(i2c_num, 1);
315
316 nack = i2c_data_read(i2c_num);
317
318 DELAY(i2c_num, 1);
319 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
320 DELAY(i2c_num, 2);
321
322 if (nack == 0) {
323 return HI_SUCCESS;
324 } else {
325 HI_LOG_ERR("receive Err ack = 1 \n");
326 return HI_FAILURE;
327 }
328 }
329
330 /*
331 * sends an acknowledge over I2C routine.
332 *
333 */
i2c_send_ack(int i2c_num)334 static hi_void i2c_send_ack(int i2c_num)
335 {
336 unsigned char regvalue;
337
338 DELAY(i2c_num, 1);
339 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
340 DELAY(i2c_num, 1);
341 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
342 DELAY(i2c_num, 1);
343 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
344 DELAY(i2c_num, 1);
345 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
346 DELAY(i2c_num, 1);
347
348 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
349 regvalue &= (~g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda);
350 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
351
352 DELAY(i2c_num, 2);
353 }
354
i2c_send_noack(int i2c_num)355 static hi_void i2c_send_noack(int i2c_num)
356 {
357 unsigned char regvalue;
358
359 DELAY(i2c_num, 1);
360 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
361 DELAY(i2c_num, 1);
362 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
363 DELAY(i2c_num, 1);
364 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
365 DELAY(i2c_num, 2);
366 i2c_clr(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
367 DELAY(i2c_num, 1);
368
369 regvalue = HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data);
370 regvalue &= (~g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda);
371 HW_REG(g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data) = regvalue;
372
373 DELAY(i2c_num, 1);
374 }
375
376 /*
377 * read data from the I2C bus by GPIO simulated of a device routine.
378 *
379 * @param devaddress: address of the device
380 * @param address: address of register within device
381 *
382 * @return value: data from the device read
383 *
384 */
hi_drv_gpioi2c_read(hi_u32 i2c_num,hi_u8 dev_addr,hi_u8 reg_address,hi_u8 * p_data)385 hi_s32 hi_drv_gpioi2c_read(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 *p_data)
386 {
387 hi_s32 ret;
388
389 if (osal_sem_down_interruptible(&g_gpio_i2_sem)) {
390 HI_LOG_ERR("Semaphore lock is error. \n");
391 return HI_FAILURE;
392 }
393
394 if ((i2c_num >= HI_I2C_MAX_NUM) || (p_data == HI_NULL) || (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE)) {
395 osal_sem_up(&g_gpio_i2_sem);
396 return HI_FAILURE;
397 }
398
399 i2c_start_bit(i2c_num);
400
401 i2c_send_byte(i2c_num, (unsigned char)(dev_addr));
402 ret = i2c_receive_ack(i2c_num);
403 if (ret != HI_SUCCESS) {
404 HI_LOG_ERR("i2c not receive ack!\n");
405 }
406
407 i2c_send_byte(i2c_num, reg_address);
408 ret = i2c_receive_ack(i2c_num);
409 if (ret != HI_SUCCESS) {
410 HI_LOG_ERR("i2c not receive ack!\n");
411 }
412
413 if (*get_var_i2c_mode() == I2C_MODE_SECOND) {
414 i2c_stop_bit(i2c_num);
415 DELAY(i2c_num, 5);
416 }
417
418 i2c_set(i2c_num, g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
419 i2c_start_bit(i2c_num);
420
421 i2c_send_byte(i2c_num, (unsigned char)(dev_addr) | 1);
422 ret = i2c_receive_ack(i2c_num);
423 if (ret != HI_SUCCESS) {
424 HI_LOG_ERR("i2c not receive ack!\n");
425 }
426
427 *p_data = i2c_receive_byte(i2c_num);
428 if (*get_var_i2c_mode() == I2C_MODE_SECOND) {
429 i2c_send_noack(i2c_num);
430 }
431
432 i2c_stop_bit(i2c_num);
433
434 osal_sem_up(&g_gpio_i2_sem);
435 HI_LOG_INFO("\t i2c_num=%d, DevAddr=0x%x, reg_addr=0x%x, data0=0x%x\n",
436 i2c_num, dev_addr, reg_address, *p_data);
437
438 return HI_SUCCESS;
439 }
440
drv_gpioi2c_read_data(hi_u32 i2c_num,hi_u8 devaddress,hi_u32 address,hi_u32 addresslen,hi_bool b_send_reg_address,hi_u8 * p_data,hi_u32 data_len)441 static hi_s32 drv_gpioi2c_read_data(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen,
442 hi_bool b_send_reg_address, hi_u8 *p_data, hi_u32 data_len)
443 {
444 hi_u32 i = 0;
445 hi_u32 ret; // TC MODIFY
446 hi_u8 reval = 0;
447 hi_u8 reg_addr = 0;
448
449 if (osal_sem_down_interruptible(&g_gpio_i2_sem)) {
450 HI_LOG_ERR("Semaphore lock is error. \n");
451 return HI_FAILURE;
452 }
453
454 if ((i2c_num >= HI_I2C_MAX_NUM) || (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE)) {
455 HI_LOG_ERR("the i2c_num haven't requested ,can't read operation.\n");
456 osal_sem_up(&g_gpio_i2_sem);
457 return HI_FAILURE;
458 }
459
460 if (b_send_reg_address) {
461 // send start condition
462 i2c_start_bit(i2c_num);
463 // send slave device address
464 i2c_send_byte(i2c_num, (unsigned char)(devaddress));
465 // TC MODIFY START
466 ret = i2c_receive_ack(i2c_num);
467 if (ret != HI_SUCCESS) {
468 HI_LOG_ERR("i2c not receive ack!\n");
469 osal_sem_up(&g_gpio_i2_sem);
470 return HI_FAILURE;
471 }
472 // send register address
473 for (i = 0; i < (addresslen); i++) {
474 reg_addr = address >> ((addresslen - i - 1) * 8); // 取出每1个从机地址，每1个地址8位
475 i2c_send_byte(i2c_num, reg_addr);
476 i2c_receive_ack(i2c_num);
477 }
478 }
479 // send start condition
480 i2c_start_bit(i2c_num);
481 // send slave device address
482 i2c_send_byte(i2c_num, (unsigned char)(devaddress) | 1);
483 ret = i2c_receive_ack(i2c_num);
484 if (ret != HI_SUCCESS) {
485 HI_LOG_ERR("i2c not receive ack!\n");
486 }
487 // receive data
488 for (i = 0; i < data_len; i++) {
489 reval = i2c_receive_byte(i2c_num);
490
491 *(p_data + i) = reval;
492
493 if (i == data_len - 1) {
494 i2c_send_noack(i2c_num);
495 } else {
496 i2c_send_ack(i2c_num);
497 }
498 }
499 // send stop condition
500 i2c_stop_bit(i2c_num);
501 osal_sem_up(&g_gpio_i2_sem);
502
503 HI_LOG_INFO("\t i2c_num=%d, DevAddr=0x%x, reg_addr=0x%x, Num=%d, Len=%d, data0=0x%x\n", i2c_num, devaddress,
504 address, addresslen, data_len, *p_data);
505 return HI_SUCCESS;
506 }
507
508
hi_drv_gpioi2c_read_ext(hi_u32 i2c_num,hi_u8 devaddress,hi_u32 address,hi_u32 addresslen,hi_u8 * p_data,hi_u32 data_len)509 hi_s32 hi_drv_gpioi2c_read_ext(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data,
510 hi_u32 data_len)
511 {
512 if (i2c_num >= HI_I2C_MAX_NUM) {
513 HI_LOG_ERR("i2c_num(%d) is wrong, I2C_MAX_NUM is %d\n", i2c_num, HI_I2C_MAX_NUM);
514 return HI_ERR_I2C_INVALID_PARA;
515 }
516
517 if (addresslen > I2C_MAX_ADDRESS_LEN) {
518 HI_LOG_ERR("para addresslen is invalid.\n");
519 return HI_ERR_I2C_INVALID_PARA;
520 }
521
522 if (p_data == NULL) {
523 HI_LOG_ERR("para p_data is null.\n");
524 return HI_ERR_I2C_INVALID_PARA;
525 }
526
527 if ((HI_I2C_MAX_LENGTH < data_len) || (data_len == 0)) {
528 HI_LOG_ERR("para data_len is invalid.\n");
529 return HI_ERR_I2C_INVALID_PARA;
530 }
531
532 return drv_gpioi2c_read_data(i2c_num, devaddress, address, addresslen, HI_TRUE, p_data, data_len);
533 }
534
hi_drv_gpioi2c_read_ext_directly(hi_u32 i2c_num,hi_u8 devaddress,hi_u32 address,hi_u32 addresslen,hi_u8 * p_data,hi_u32 data_len)535 hi_s32 hi_drv_gpioi2c_read_ext_directly(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen,
536 hi_u8 *p_data, hi_u32 data_len)
537 {
538 if (i2c_num >= HI_I2C_MAX_NUM) {
539 HI_LOG_ERR("i2c_num(%d) is wrong, I2C_MAX_NUM is %d\n", i2c_num, HI_I2C_MAX_NUM);
540 return HI_ERR_I2C_INVALID_PARA;
541 }
542
543 if (addresslen > I2C_MAX_ADDRESS_LEN) {
544 HI_LOG_ERR("para addresslen is invalid.\n");
545 return HI_ERR_I2C_INVALID_PARA;
546 }
547
548 if (p_data == NULL) {
549 HI_LOG_ERR("para p_data is null.\n");
550 return HI_ERR_I2C_INVALID_PARA;
551 }
552
553 if ((data_len > HI_I2C_MAX_LENGTH) || (data_len == 0)) {
554 HI_LOG_ERR("para data_len is invalid.\n");
555 return HI_ERR_I2C_INVALID_PARA;
556 }
557
558 return drv_gpioi2c_read_data(i2c_num, devaddress, address, addresslen, HI_FALSE, p_data, data_len);
559 }
560
561 /*
562 * writes data to a device on the I2C bus routine.
563 *
564 * @param devaddress: address of the device
565 * @param address: address of register within device
566 * @param data: data for write to device
567 *
568 */
hi_drv_gpioi2c_write(hi_u32 i2c_num,hi_u8 dev_addr,hi_u8 reg_address,hi_u8 u8Data)569 hi_s32 hi_drv_gpioi2c_write(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 u8Data)
570 {
571 hi_s32 ret;
572
573 if (osal_sem_down_interruptible(&g_gpio_i2_sem)) {
574 HI_LOG_ERR("Semaphore lock is error. \n");
575 return HI_FAILURE;
576 }
577
578 if ((i2c_num >= HI_I2C_MAX_NUM) || (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE)) {
579 osal_sem_up(&g_gpio_i2_sem);
580 return HI_FAILURE;
581 }
582
583 HI_LOG_INFO("\t i2c_num=%d, DevAddr=0x%x, reg_addr=0x%x, data0=0x%x\n",
584 i2c_num, dev_addr, reg_address, u8Data);
585
586 i2c_start_bit(i2c_num);
587
588 i2c_send_byte(i2c_num, (unsigned char)(dev_addr));
589 ret = i2c_receive_ack(i2c_num);
590 if (ret != HI_SUCCESS) {
591 HI_LOG_ERR("i2c not receive ack!\n");
592 }
593
594 i2c_send_byte(i2c_num, reg_address);
595 ret = i2c_receive_ack(i2c_num);
596 if (ret != HI_SUCCESS) {
597 HI_LOG_ERR("i2c not receive ack!\n");
598 }
599
600 i2c_send_byte(i2c_num, u8Data);
601 if (*get_var_i2c_mode() == I2C_MODE_SECOND) {
602 i2c_receive_ack(i2c_num);
603 DELAY(i2c_num, 10);
604 }
605
606 i2c_stop_bit(i2c_num);
607 osal_sem_up(&g_gpio_i2_sem);
608
609 return HI_SUCCESS;
610 }
611
drv_gpioi2c_write_data(hi_u32 i2c_num,hi_u8 devaddress,hi_u32 address,hi_u32 addresslen,hi_u8 * p_data,hi_u32 data_len,hi_bool b_send_stop_condtion)612 static hi_s32 drv_gpioi2c_write_data(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen,
613 hi_u8 *p_data, hi_u32 data_len, hi_bool b_send_stop_condtion)
614 {
615 hi_u32 i = 0;
616 hi_u8 reg_addr = 0;
617 hi_s32 ret;
618
619 if (osal_sem_down_interruptible(&g_gpio_i2_sem)) {
620 HI_LOG_ERR("Semaphore lock is error. \n");
621 return HI_FAILURE;
622 }
623
624 if ((i2c_num >= HI_I2C_MAX_NUM) || (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE)) {
625 HI_LOG_ERR("the i2c_num haven't requested ,can't write operation.\n");
626 osal_sem_up(&g_gpio_i2_sem);
627 return HI_FAILURE;
628 }
629
630 HI_LOG_INFO("i2c_num=%d, DevAddr=0x%x, reg_addr=0x%x, Num=%d, Len=%d, data0=0x%x\n", i2c_num, devaddress, address,
631 addresslen, data_len, p_data[0]);
632
633 i2c_start_bit(i2c_num);
634
635 i2c_send_byte(i2c_num, (unsigned char)(devaddress));
636 ret = i2c_receive_ack(i2c_num);
637 if (ret != HI_SUCCESS) {
638 HI_LOG_ERR("i2c not receive ack!\n");
639 }
640
641 for (i = 0; i < (addresslen); i++) {
642 reg_addr = address >> ((addresslen - i - 1) * 8); // 取出每1个从机地址，每1个地址8位
643 i2c_send_byte(i2c_num, (unsigned char)reg_addr);
644 ret = i2c_receive_ack(i2c_num);
645 if (ret != HI_SUCCESS) {
646 HI_LOG_ERR("i2c not receive ack!\n");
647 }
648 }
649
650 for (i = 0; i < data_len; i++) {
651 i2c_send_byte(i2c_num, p_data[i]);
652 ret = i2c_receive_ack(i2c_num);
653 if (ret != HI_SUCCESS) {
654 HI_LOG_ERR("i2c not receive ack!\n");
655 }
656 }
657
658 if (b_send_stop_condtion) {
659 i2c_stop_bit(i2c_num);
660 }
661
662 osal_sem_up(&g_gpio_i2_sem);
663
664 return HI_SUCCESS;
665 }
666
hi_drv_gpioi2c_write_ext(hi_u32 i2c_num,hi_u8 devaddress,hi_u32 address,hi_u32 addresslen,hi_u8 * p_data,hi_u32 data_len)667 hi_s32 hi_drv_gpioi2c_write_ext(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen, hi_u8 *p_data,
668 hi_u32 data_len)
669 {
670 if (i2c_num >= HI_I2C_MAX_NUM) {
671 HI_LOG_ERR("i2c_num(%d) is wrong, I2C_MAX_NUM is %d\n", i2c_num, HI_I2C_MAX_NUM);
672 return HI_ERR_I2C_INVALID_PARA;
673 }
674
675 if (addresslen > I2C_MAX_ADDRESS_LEN) {
676 HI_LOG_ERR("para I2creg_addrByteNum is invalid.\n");
677 return HI_ERR_I2C_INVALID_PARA;
678 }
679
680 if (p_data == NULL) {
681 HI_LOG_ERR("para p_data is null.\n");
682 return HI_ERR_I2C_INVALID_PARA;
683 }
684
685 if (data_len > HI_I2C_MAX_LENGTH) {
686 HI_LOG_ERR("para data_len is invalid.\n");
687 return HI_ERR_I2C_INVALID_PARA;
688 }
689
690 return drv_gpioi2c_write_data(i2c_num, devaddress, address, addresslen, p_data, data_len, HI_TRUE);
691 }
692
hi_drv_gpioi2c_write_ext_no_stop(hi_u32 i2c_num,hi_u8 devaddress,hi_u32 address,hi_u32 addresslen,hi_u8 * p_data,hi_u32 data_len)693 hi_s32 hi_drv_gpioi2c_write_ext_no_stop(hi_u32 i2c_num, hi_u8 devaddress, hi_u32 address, hi_u32 addresslen,
694 hi_u8 *p_data, hi_u32 data_len)
695 {
696 if (i2c_num >= HI_I2C_MAX_NUM) {
697 HI_LOG_ERR("i2c_num(%d) is wrong, I2C_MAX_NUM is %d\n", i2c_num, HI_I2C_MAX_NUM);
698 return HI_ERR_I2C_INVALID_PARA;
699 }
700
701 if (addresslen > I2C_MAX_ADDRESS_LEN) {
702 HI_LOG_ERR("para addresslen is invalid.\n");
703 return HI_ERR_I2C_INVALID_PARA;
704 }
705
706 if (p_data == NULL) {
707 HI_LOG_ERR("para p_data is null.\n");
708 return HI_ERR_I2C_INVALID_PARA;
709 }
710
711 if ((data_len > HI_I2C_MAX_LENGTH)) {
712 HI_LOG_ERR("para data_len is invalid.\n");
713 return HI_ERR_I2C_INVALID_PARA;
714 }
715
716 return drv_gpioi2c_write_data(i2c_num, devaddress, address, addresslen, p_data, data_len, HI_FALSE);
717 }
718
719 /*
720 * read data from the I2C bus by GPIO simulated of a digital camera device routine.
721 *
722 * @param devaddress: address of the device
723 * @param address: address of register within device
724 *
725 */
hi_drv_gpioi2c_sccb_read(hi_u32 i2c_num,hi_u8 dev_addr,hi_u8 reg_address,hi_u8 * p_data)726 hi_s32 hi_drv_gpioi2c_sccb_read(hi_u32 i2c_num, hi_u8 dev_addr, hi_u8 reg_address, hi_u8 *p_data)
727 {
728 hi_s32 ret;
729
730 if (osal_sem_down_interruptible(&g_gpio_i2_sem)) {
731 HI_LOG_ERR("Semaphore lock is error. \n");
732 return HI_FAILURE;
733 ;
734 }
735
736 if ((i2c_num >= HI_I2C_MAX_NUM) || (p_data == HI_NULL) || (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE)) {
737 osal_sem_up(&g_gpio_i2_sem);
738 return HI_FAILURE;
739 }
740
741 i2c_start_bit(i2c_num);
742 i2c_send_byte(i2c_num, (unsigned char)(dev_addr));
743 ret = i2c_receive_ack(i2c_num);
744 if (ret != HI_SUCCESS) {
745 HI_LOG_ERR("i2c not receive ack!\n");
746 }
747 i2c_send_byte(i2c_num, reg_address);
748 ret = i2c_receive_ack(i2c_num);
749 if (ret != HI_SUCCESS) {
750 HI_LOG_ERR("i2c not receive ack!\n");
751 }
752 i2c_stop_bit(i2c_num);
753 i2c_start_bit(i2c_num);
754 i2c_send_byte(i2c_num, (unsigned char)(dev_addr) | 1);
755 ret = i2c_receive_ack(i2c_num);
756 if (ret != HI_SUCCESS) {
757 HI_LOG_ERR("i2c not receive ack!\n");
758 }
759 *p_data = i2c_receive_byte(i2c_num);
760 i2c_send_ack(i2c_num);
761 i2c_stop_bit(i2c_num);
762 osal_sem_up(&g_gpio_i2_sem);
763
764 return HI_SUCCESS;
765 }
766
drv_gpioi2c_is_used(hi_u32 i2c_num,hi_bool * b_used)767 hi_s32 drv_gpioi2c_is_used(hi_u32 i2c_num, hi_bool *b_used)
768 {
769 if ((i2c_num > MAX_I2C_CHANEL_NUM) || (b_used == HI_NULL)) {
770 return HI_FAILURE;
771 }
772
773 *b_used = g_st_i2c_gpio[i2c_num].b_used;
774 return HI_SUCCESS;
775 }
776
drv_gpioi2c_config(hi_u32 i2c_num,hi_u32 which_gpio_clock,hi_u32 which_gpio_data,hi_u32 clock_bit,hi_u32 data_bit)777 hi_s32 drv_gpioi2c_config(hi_u32 i2c_num, hi_u32 which_gpio_clock, hi_u32 which_gpio_data, hi_u32 clock_bit,
778 hi_u32 data_bit)
779 {
780 volatile hi_void *pv_gpio_base_clock = HI_NULL;
781 volatile hi_void *pv_gpio_base_data = HI_NULL;
782
783 if (g_gpio_usr_addr[which_gpio_clock] == NULL
784 || g_gpio_usr_addr[which_gpio_data] == NULL) {
785 HI_LOG_ERR("gpio addr is invalid!\n");
786 return HI_FAILURE;
787 }
788 pv_gpio_base_clock = g_gpio_usr_addr[which_gpio_clock];
789 pv_gpio_base_data = g_gpio_usr_addr[which_gpio_data];
790
791 g_st_i2c_da_gpio[i2c_num].i2c_channel = i2c_num;
792 g_st_i2c_da_gpio[i2c_num].gpio_i2c_scl = (1 << clock_bit);
793 g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda = (1 << data_bit);
794
795 g_st_i2c_da_gpio[i2c_num].p_gpio_dir_data = pv_gpio_base_data + HI_GPIO_DIR_REG;
796 g_st_i2c_da_gpio[i2c_num].p_gpio_dir_clk = pv_gpio_base_clock + HI_GPIO_DIR_REG;
797 g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg = (pv_gpio_base_data + \
798 ((g_st_i2c_da_gpio[i2c_num].gpio_i2c_sda) << 2)); // 左移2位,适配SDA寄存器
799 g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg = (pv_gpio_base_clock + \
800 ((g_st_i2c_da_gpio[i2c_num].gpio_i2c_scl) << 2)); // 左移2位,适配SCL寄存器
801
802 HI_LOG_INFO("drv_gpioi2c_config OK(i2c_num=%d, SCL=gpio%d_%d, SDA=gpio%d_%d, g_i2c_mode=%d).\n", i2c_num,
803 which_gpio_clock, clock_bit, which_gpio_data, data_bit, *get_var_i2c_mode());
804
805 g_st_i2c_gpio[i2c_num].i2c_num = i2c_num;
806 g_st_i2c_gpio[i2c_num].scl_gpio_no = which_gpio_clock * HI_GPIO_BIT_NUM + clock_bit;
807 g_st_i2c_gpio[i2c_num].sda_gpio_no = which_gpio_data * HI_GPIO_BIT_NUM + data_bit;
808 g_st_i2c_gpio[i2c_num].b_used = HI_TRUE;
809 g_st_i2c_gpio[i2c_num].count = 1;
810
811 return HI_SUCCESS;
812 }
813
is_gpio_i2c_used(hi_u32 scl_gpio_no,hi_u32 sda_gpio_no,hi_u32 * p_i2c_num)814 static hi_s32 is_gpio_i2c_used(hi_u32 scl_gpio_no, hi_u32 sda_gpio_no, hi_u32 *p_i2c_num)
815 {
816 hi_u32 i = 0;
817 hi_bool b_temp = HI_FALSE;
818 hi_u32 tmp_gpio_clk_no = 0;
819 hi_u32 tmp_gpio_sda_no = 0;
820
821 for (i = HI_STD_I2C_NUM; i < HI_I2C_MAX_NUM; i++) {
822 if (g_st_i2c_gpio[i].b_used) {
823 tmp_gpio_clk_no = g_st_i2c_gpio[i].scl_gpio_no;
824 tmp_gpio_sda_no = g_st_i2c_gpio[i].sda_gpio_no;
825
826 b_temp = (tmp_gpio_clk_no == scl_gpio_no) && (tmp_gpio_sda_no == sda_gpio_no);
827 if (b_temp) {
828 g_st_i2c_gpio[i].count++;
829 *p_i2c_num = g_st_i2c_gpio[i].i2c_num;
830 return HI_SUCCESS;
831 }
832
833 b_temp = (scl_gpio_no == tmp_gpio_clk_no) || (sda_gpio_no == tmp_gpio_clk_no);
834 if (b_temp) {
835 HI_LOG_ERR("GPIO NO. %d is used to GpioClock!\n", tmp_gpio_clk_no);
836 return HI_ERR_GPIO_INVALID_PARA;
837 }
838
839 b_temp = (scl_gpio_no == tmp_gpio_sda_no) || (sda_gpio_no == tmp_gpio_sda_no);
840 if (b_temp) {
841 HI_LOG_ERR("GPIO NO. %d is used to GpioData!\n", tmp_gpio_sda_no);
842 return HI_ERR_GPIO_INVALID_PARA;
843 }
844 }
845 }
846 return HI_FAILURE;
847 }
848
849
hi_drv_gpioi2c_create_gpio_i2c(hi_u32 * p_i2c_num,hi_u32 scl_gpio_no,hi_u32 sda_gpio_no)850 hi_s32 hi_drv_gpioi2c_create_gpio_i2c(hi_u32 *p_i2c_num, hi_u32 scl_gpio_no, hi_u32 sda_gpio_no)
851 {
852 hi_s32 ret;
853 hi_u32 i = 0;
854 hi_u32 Validi2c_num = 0;
855 hi_u32 which_gpio_clock;
856 hi_u32 which_gpio_data;
857 hi_u32 clock_bit;
858 hi_u32 data_bit;
859
860 which_gpio_clock = scl_gpio_no / HI_GPIO_BIT_NUM;
861 clock_bit = scl_gpio_no % HI_GPIO_BIT_NUM;
862 which_gpio_data = sda_gpio_no / HI_GPIO_BIT_NUM;
863 data_bit = sda_gpio_no % HI_GPIO_BIT_NUM;
864
865 if (p_i2c_num == NULL) {
866 HI_LOG_ERR("p_i2c_num is null!\n");
867 return HI_FAILURE;
868 }
869 if ((which_gpio_clock >= g_gpio_grp_num) || (which_gpio_data >= g_gpio_grp_num)
870 || (scl_gpio_no == sda_gpio_no)) {
871 HI_LOG_ERR("error: GPIO NO. %d and NO. %d is invalid!\n", scl_gpio_no, sda_gpio_no);
872 return HI_ERR_GPIO_INVALID_PARA;
873 }
874
875 /* whether the gpio have used in other i2c_num */
876 ret = is_gpio_i2c_used(scl_gpio_no, sda_gpio_no, &Validi2c_num);
877 if (ret != HI_FAILURE) {
878 if (ret == HI_SUCCESS) {
879 *p_i2c_num = Validi2c_num;
880 }
881 return ret;
882 }
883
884 /* find a idle i2c channel */
885 for (i = HI_STD_I2C_NUM; i < HI_I2C_MAX_NUM; i++) {
886 if (g_st_i2c_gpio[i].b_used == HI_FALSE) {
887 Validi2c_num = i;
888 break;
889 }
890 }
891
892 if (i >= HI_I2C_MAX_NUM) {
893 HI_LOG_ERR("i2c channel all have used ,request i2c channel fail !\n");
894 return HI_FAILURE;
895 }
896
897 /* the gpio can be use */
898 ret = drv_gpioi2c_config(Validi2c_num, which_gpio_clock, which_gpio_data, clock_bit, data_bit);
899 if (ret != HI_SUCCESS) {
900 HI_LOG_ERR("config gpio i2c failure !\n");
901 return HI_FAILURE;
902 }
903
904 *p_i2c_num = Validi2c_num;
905
906 return HI_SUCCESS;
907 }
908
hi_drv_gpioi2c_destroy_gpio_i2c(hi_u32 i2c_num)909 hi_s32 hi_drv_gpioi2c_destroy_gpio_i2c(hi_u32 i2c_num)
910 {
911 if (i2c_num < HI_STD_I2C_NUM || i2c_num >= HI_I2C_MAX_NUM) {
912 HI_LOG_ERR(" GPIO I2C i2c_num = %d is not used!\n", i2c_num);
913 return HI_ERR_I2C_INVALID_PARA;
914 }
915
916 if (g_st_i2c_gpio[i2c_num].b_used == HI_FALSE) {
917 HI_LOG_ERR("i2c_num = %d is not used!\n", i2c_num);
918 return HI_ERR_I2C_INVALID_PARA;
919 }
920
921 if ((--g_st_i2c_gpio[i2c_num].count) == 0) {
922 g_st_i2c_gpio[i2c_num].b_used = HI_FALSE;
923 }
924
925 HI_LOG_INFO("gpio_i2c_destroy OK(i2c_num=%d, SCL=gpio No.%d, SDA=gpio No.%d).\n", i2c_num,
926 g_st_i2c_gpio[i2c_num].scl_gpio_no, g_st_i2c_gpio[i2c_num].sda_gpio_no);
927
928 return HI_SUCCESS;
929 }
930
931 /*************************************************************************/
932 osal_semaphore g_gpioi2c_mutex;
933
hi_drv_gpioi2c_cmd_write(unsigned int cmd,hi_void * arg,hi_void * private_data)934 int hi_drv_gpioi2c_cmd_write(unsigned int cmd, hi_void *arg, hi_void *private_data)
935 {
936 long ret;
937 errno_t err_ret;
938 hi_u8 *p_data = NULL;
939 i2c_data *i2c_data_ptr = NULL;
940
941 hi_dbg_func_enter();
942
943 ret = osal_sem_down_interruptible(&g_gpioi2c_mutex);
944 if (ret) {
945 HI_LOG_ERR("lock g_i2c_mutex error.\n");
946 return HI_FAILURE;
947 }
948
949 i2c_data_ptr = (i2c_data *)arg;
950
951 if (i2c_data_ptr->data_len == 0 || i2c_data_ptr->data_len > HI_I2C_MAX_LENGTH) {
952 HI_LOG_INFO("i2c_data.data_len is invalid!\n");
953 ret = HI_ERR_I2C_INVALID_PARA;
954 osal_sem_up(&g_gpioi2c_mutex);
955 return ret;
956 }
957
958 p_data = osal_kmalloc(HI_ID_GPIO_I2C, i2c_data_ptr->data_len, OSAL_GFP_KERNEL);
959 if (p_data == NULL) {
960 HI_LOG_ERR("i2c kmalloc fail!\n");
961 osal_sem_up(&g_gpioi2c_mutex);
962 ret = HI_ERR_I2C_MALLOC_ERR;
963 return ret;
964 }
965
966 err_ret = memset_s(p_data, i2c_data_ptr->data_len, 0, i2c_data_ptr->data_len);
967 if (err_ret != EOK) {
968 osal_kfree(HI_ID_GPIO_I2C, p_data);
969 HI_LOG_ERR("secure func call error\n");
970 osal_sem_up(&g_gpioi2c_mutex);
971 return HI_FAILURE;
972 }
973
974 if (osal_copy_from_user(p_data, (hi_void *)(uintptr_t)(i2c_data_ptr->p_data), i2c_data_ptr->data_len)) {
975 HI_LOG_ERR("copy data from user fail!\n");
976 osal_kfree(HI_ID_GPIO_I2C, p_data);
977 p_data = HI_NULL;
978 ret = HI_ERR_I2C_COPY_DATA_ERR;
979 osal_sem_up(&g_gpioi2c_mutex);
980 return ret;
981 }
982
983 ret = hi_drv_gpioi2c_write_ext(i2c_data_ptr->i2c_num, i2c_data_ptr->i2c_dev_addr, i2c_data_ptr->i2c_reg_addr, \
984 i2c_data_ptr->i2c_reg_count, p_data, i2c_data_ptr->data_len);
985 osal_kfree(HI_ID_GPIO_I2C, p_data);
986 p_data = HI_NULL;
987 osal_sem_up(&g_gpioi2c_mutex);
988
989 hi_dbg_func_exit();
990
991 return ret;
992 }
993
hi_drv_gpioi2c_cmd_read(unsigned int cmd,hi_void * arg,hi_void * private_data)994 int hi_drv_gpioi2c_cmd_read(unsigned int cmd, hi_void *arg, hi_void *private_data)
995 {
996 long ret;
997 errno_t err_ret;
998 hi_u8 *p_data = NULL;
999 i2c_data *i2c_data_ptr = NULL;
1000
1001 hi_dbg_func_enter();
1002
1003 ret = osal_sem_down_interruptible(&g_gpioi2c_mutex);
1004 if (ret) {
1005 HI_LOG_ERR("lock g_i2c_mutex error.\n");
1006 return HI_FAILURE;
1007 }
1008
1009 i2c_data_ptr = (i2c_data *)arg;
1010
1011 if (i2c_data_ptr->data_len > HI_I2C_MAX_LENGTH || i2c_data_ptr->data_len == 0) {
1012 HI_LOG_ERR("para i2c_data.data_len is invalid.\n");
1013 osal_sem_up(&g_gpioi2c_mutex);
1014 return HI_ERR_I2C_INVALID_PARA;
1015 }
1016
1017 p_data = osal_kmalloc(HI_ID_GPIO_I2C, i2c_data_ptr->data_len, OSAL_GFP_KERNEL);
1018 if (p_data == NULL) {
1019 HI_LOG_ERR("i2c kmalloc fail!\n");
1020 osal_sem_up(&g_gpioi2c_mutex);
1021 ret = HI_ERR_I2C_MALLOC_ERR;
1022 return ret;
1023 }
1024
1025 err_ret = memset_s(p_data, i2c_data_ptr->data_len, 0, i2c_data_ptr->data_len);
1026 if (err_ret != EOK) {
1027 osal_kfree(HI_ID_GPIO_I2C, p_data);
1028 osal_sem_up(&g_gpioi2c_mutex);
1029 HI_LOG_ERR("secure func call error\n");
1030 return HI_FAILURE;
1031 }
1032
1033 ret = hi_drv_gpioi2c_read_ext(i2c_data_ptr->i2c_num, i2c_data_ptr->i2c_dev_addr, i2c_data_ptr->i2c_reg_addr, \
1034 i2c_data_ptr->i2c_reg_count, p_data, i2c_data_ptr->data_len);
1035 if (ret == HI_SUCCESS) {
1036 if (osal_copy_to_user((hi_void *)(uintptr_t)(i2c_data_ptr->p_data), p_data, i2c_data_ptr->data_len)) {
1037 HI_LOG_ERR("copy data to user fail!\n");
1038 ret = HI_ERR_I2C_COPY_DATA_ERR;
1039 }
1040 }
1041
1042 osal_kfree(HI_ID_GPIO_I2C, p_data);
1043 osal_sem_up(&g_gpioi2c_mutex);
1044 p_data = HI_NULL;
1045
1046 hi_dbg_func_exit();
1047
1048 return ret;
1049 }
1050
hi_drv_gpioi2c_cmd_config(unsigned int cmd,hi_void * arg,hi_void * private_data)1051 int hi_drv_gpioi2c_cmd_config(unsigned int cmd, hi_void *arg, hi_void *private_data)
1052 {
1053 long ret;
1054 i2c_gpio *i2c_gpio_ptr = NULL;
1055
1056 hi_dbg_func_enter();
1057
1058 ret = osal_sem_down_interruptible(&g_gpioi2c_mutex);
1059 if (ret) {
1060 HI_LOG_ERR("lock g_i2c_mutex error.\n");
1061 return HI_FAILURE;
1062 }
1063
1064 i2c_gpio_ptr = (i2c_gpio *)arg;
1065
1066 ret = hi_drv_gpioi2c_create_gpio_i2c(&(i2c_gpio_ptr->i2c_num),
1067 i2c_gpio_ptr->scl_gpio_no, i2c_gpio_ptr->sda_gpio_no);
1068
1069 osal_sem_up(&g_gpioi2c_mutex);
1070
1071 hi_dbg_func_exit();
1072
1073 return ret;
1074 }
1075
hi_drv_gpioi2c_cmd_destroy(unsigned int cmd,hi_void * arg,hi_void * private_data)1076 int hi_drv_gpioi2c_cmd_destroy(unsigned int cmd, hi_void *arg, hi_void *private_data)
1077 {
1078 long ret;
1079 i2c_gpio *i2c_gpio_ptr = NULL;
1080
1081 hi_dbg_func_enter();
1082
1083 ret = osal_sem_down_interruptible(&g_gpioi2c_mutex);
1084 if (ret) {
1085 HI_LOG_ERR("lock g_i2c_mutex error.\n");
1086 return HI_FAILURE;
1087 }
1088
1089 i2c_gpio_ptr = (i2c_gpio *)arg;
1090
1091 ret = hi_drv_gpioi2c_destroy_gpio_i2c(i2c_gpio_ptr->i2c_num);
1092
1093 osal_sem_up(&g_gpioi2c_mutex);
1094
1095 hi_dbg_func_exit();
1096
1097 return ret;
1098 }
1099
1100 #ifdef GPIO_I2C_PM
gpio_i2c_suspend(pm_basedev * pdev,pm_message_t state)1101 int gpio_i2c_suspend(pm_basedev *pdev, pm_message_t state)
1102 {
1103 HI_PRINT("GPIO_I2C suspend OK\n");
1104 return HI_SUCCESS;
1105 }
1106
gpio_i2c_resume(int i2c_num,pm_basedev * pdev)1107 int gpio_i2c_resume(int i2c_num, pm_basedev *pdev)
1108 {
1109 i2c_set(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_scl_reg);
1110 i2c_set(g_st_i2c_da_gpio[i2c_num].p_gpio_i2c_sda_reg);
1111 HI_PRINT("GPIO_I2C resume OK\n");
1112 return HI_SUCCESS;
1113 }
1114
1115 #endif
1116
hi_drv_i2c_get_chip_version(hi_void)1117 hi_u32 hi_drv_i2c_get_chip_version(hi_void)
1118 {
1119 HI_CHIP_VERSION_E chip_version = HI_CHIP_VERSION_BUTT;
1120 i2c_drv_chip chip = I2C_DRV_CHIP_V350;
1121 #if !defined(CFG_HI_USER_DRV)
1122 HI_CHIP_TYPE_E chip_type;
1123 hi_drv_sys_get_chip_version(&chip_type, &chip_version);
1124 #endif
1125
1126 if (chip_version == HI_CHIP_VERSION_BUTT) {
1127 chip = I2C_DRV_CHIP_V350;
1128 } else {
1129 switch (chip_version) {
1130 case HI_CHIP_VERSION_V350:
1131 case HI_CHIP_VERSION_V351:
1132 chip = I2C_DRV_CHIP_V350;
1133 break;
1134 default:
1135 break;
1136 }
1137 }
1138
1139 HI_LOG_DBG("get chip version:0x%x\n", chip);
1140 return chip;
1141 }
1142
1143 static unsigned int g_gpio_initialized = 0;
1144
1145 /*
1146 * initializes I2C interface routine.
1147 *
1148 * @return value:0--success; 1--error.
1149 *
1150 */
hi_drv_gpioi2c_init(hi_void)1151 hi_s32 hi_drv_gpioi2c_init(hi_void)
1152 {
1153 hi_u32 i, chip;
1154 hi_s32 ret;
1155
1156 ret = osal_exportfunc_register(HI_ID_GPIO_I2C, "HI_GPIO_I2C", (hi_void *)&g_st_gpioi2c_ext_funcs);
1157 if (ret != HI_SUCCESS) {
1158 HI_LOG_FATAL(" GPIO_I2C Module register failed 0x%x.\n", ret);
1159 return HI_FAILURE;
1160 }
1161
1162 if (g_gpio_initialized == 0) {
1163 g_gpio_grp_num = HI_GPIO_GROUP_NUM;
1164 ret = osal_sem_init(&g_gpioi2c_mutex, 1);
1165 if (ret != HI_SUCCESS) {
1166 HI_LOG_FATAL(" GPIO_I2C semaphore init failed.\n");
1167 return HI_FAILURE;
1168 }
1169
1170 ret = osal_sem_init(&g_gpio_i2_sem, 1);
1171 if (ret != HI_SUCCESS) {
1172 HI_LOG_FATAL(" GPIO_I2C semaphore init failed.\n");
1173 return HI_FAILURE;
1174 }
1175
1176 ret = osal_spin_lock_init(&g_gpio_i2c_lock);
1177 if (ret != HI_SUCCESS) {
1178 HI_LOG_FATAL(" GPIO_I2C spin lock init failed.\n");
1179 return HI_FAILURE;
1180 }
1181 g_gpio_initialized = 1;
1182
1183 chip = hi_drv_i2c_get_chip_version();
1184 for (i = HI_STD_I2C_NUM; i < HI_I2C_MAX_NUM; i++) {
1185 g_st_i2c_gpio[i].b_used = HI_FALSE;
1186 g_st_i2c_gpio[i].count = 0;
1187 }
1188 }
1189
1190 return HI_SUCCESS;
1191 }
1192
hi_drv_gpioi2c_de_init(hi_void)1193 hi_void hi_drv_gpioi2c_de_init(hi_void)
1194 {
1195 hi_u32 i = 0;
1196 hi_s32 ret;
1197
1198 osal_spin_lock_destory(&g_gpio_i2c_lock);
1199 osal_sem_destory(&g_gpio_i2_sem);
1200 osal_sem_destory(&g_gpioi2c_mutex);
1201
1202 ret = osal_exportfunc_unregister(HI_ID_GPIO_I2C);
1203 if (ret != HI_SUCCESS) {
1204 HI_LOG_FATAL(" GPIO_I2C Module unregister failed 0x%x.\n", ret);
1205 }
1206
1207 g_gpio_initialized = 0;
1208
1209 for (i = HI_STD_I2C_NUM; i < HI_I2C_MAX_NUM; i++) {
1210 g_st_i2c_gpio[i].b_used = HI_FALSE;
1211 g_st_i2c_gpio[i].count = 0;
1212 }
1213 }
1214
1215 MODULE_LICENSE("GPL");
1216
1217 EXPORT_SYMBOL(hi_drv_i2c_get_chip_version);
1218
1219 EXPORT_SYMBOL(hi_drv_gpioi2c_init);
1220 EXPORT_SYMBOL(hi_drv_gpioi2c_de_init);
1221
1222 EXPORT_SYMBOL(hi_drv_gpioi2c_write);
1223 EXPORT_SYMBOL(hi_drv_gpioi2c_read);
1224 EXPORT_SYMBOL(hi_drv_gpioi2c_write_ext);
1225 EXPORT_SYMBOL(hi_drv_gpioi2c_read_ext);
1226 EXPORT_SYMBOL(hi_drv_gpioi2c_read_ext_directly);
1227 EXPORT_SYMBOL(hi_drv_gpioi2c_write_ext_no_stop);
1228
1229 EXPORT_SYMBOL(hi_drv_gpioi2c_sccb_read);
1230
1231 EXPORT_SYMBOL(hi_drv_gpioi2c_create_gpio_i2c);
1232 EXPORT_SYMBOL(hi_drv_gpioi2c_destroy_gpio_i2c);
1233 EXPORT_SYMBOL(hi_drv_gpioi2c_cmd_read);
1234 EXPORT_SYMBOL(hi_drv_gpioi2c_cmd_write);
1235 EXPORT_SYMBOL(hi_drv_gpioi2c_cmd_config);
1236 EXPORT_SYMBOL(hi_drv_gpioi2c_cmd_destroy);
1237
1238 EXPORT_SYMBOL(g_st_i2c_gpio);
1239