| /third_party/mesa3d/src/amd/common/ |
| D | ac_shader_util.c | 92 uint32_t ac_vgt_gs_mode(unsigned gs_max_vert_out, enum amd_gfx_level gfx_level) in ac_vgt_gs_mode()
116 unsigned ac_get_tbuffer_format(enum amd_gfx_level gfx_level, unsigned dfmt, unsigned nfmt) in ac_get_tbuffer_format()
424 enum ac_image_dim ac_get_sampler_dim(enum amd_gfx_level gfx_level, enum glsl_sampler_dim dim, in ac_get_sampler_dim()
451 enum ac_image_dim ac_get_image_dim(enum amd_gfx_level gfx_level, enum glsl_sampler_dim sdim, in ac_get_image_dim()
731 unsigned ac_compute_lshs_workgroup_size(enum amd_gfx_level gfx_level, gl_shader_stage stage, in ac_compute_lshs_workgroup_size()
754 unsigned ac_compute_esgs_workgroup_size(enum amd_gfx_level gfx_level, unsigned wave_size, in ac_compute_esgs_workgroup_size()
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| D | ac_debug.c | 70 enum amd_gfx_level gfx_level; member
112 static const struct si_reg *find_register(enum amd_gfx_level gfx_level, unsigned offset) in find_register()
157 const char *ac_get_register_name(enum amd_gfx_level gfx_level, unsigned offset) in ac_get_register_name()
164 void ac_dump_reg(FILE *file, enum amd_gfx_level gfx_level, unsigned offset, uint32_t value, in ac_dump_reg()
612 unsigned trace_id_count, enum amd_gfx_level gfx_level, in ac_parse_ib_chunk()
659 … const char *name, enum amd_gfx_level gfx_level, ac_debug_addr_callback addr_callback, in ac_parse_ib()
677 bool ac_vm_fault_occured(enum amd_gfx_level gfx_level, uint64_t *old_dmesg_timestamp, in ac_vm_fault_occured()
815 unsigned ac_get_wave_info(enum amd_gfx_level gfx_level, in ac_get_wave_info()
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| D | ac_nir_lower_esgs_io_to_mem.c | 45 enum amd_gfx_level gfx_level; member
296 enum amd_gfx_level gfx_level, in ac_nir_lower_es_outputs_to_mem()
314 enum amd_gfx_level gfx_level, in ac_nir_lower_gs_inputs_to_mem()
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| D | ac_nir.c | 71 enum amd_gfx_level gfx_level) in ac_nir_lower_indirect_derefs()
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| D | ac_rtld.h | 60 enum amd_gfx_level gfx_level; member
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| D | ac_shadowed_regs.c | 1243 void ac_get_reg_ranges(enum amd_gfx_level gfx_level, enum radeon_family family, in ac_get_reg_ranges()
4050 void ac_check_shadowed_regs(enum amd_gfx_level gfx_level, enum radeon_family family, in ac_check_shadowed_regs()
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| D | ac_nir_lower_tess_io_to_mem.c | 124 enum amd_gfx_level gfx_level; member
713 enum amd_gfx_level gfx_level, in ac_nir_lower_hs_outputs_to_mem()
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| /third_party/mesa3d/src/amd/compiler/ |
| D | aco_ir.cpp | 69 enum amd_gfx_level gfx_level, enum radeon_family family, bool wgp_mode, in init_program()
203 can_use_SDWA(amd_gfx_level gfx_level, const aco_ptr<Instruction>& instr, bool pre_ra) in can_use_SDWA()
269 convert_to_SDWA(amd_gfx_level gfx_level, aco_ptr<Instruction>& instr) in convert_to_SDWA()
403 can_use_opsel(amd_gfx_level gfx_level, aco_opcode op, int idx) in can_use_opsel()
446 instr_is_16bit(amd_gfx_level gfx_level, aco_opcode op) in instr_is_16bit()
815 wait_imm::wait_imm(enum amd_gfx_level gfx_level, uint16_t packed) : vs(unset_counter) in wait_imm()
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| D | aco_print_asm.cpp | 103 to_clrx_device_name(amd_gfx_level gfx_level, radeon_family family) in to_clrx_device_name()
271 disasm_instr(amd_gfx_level gfx_level, LLVMDisasmContextRef disasm, uint32_t* binary, in disasm_instr()
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| D | aco_validate.cpp | 788 validate_subdword_operand(amd_gfx_level gfx_level, const aco_ptr<Instruction>& instr, in validate_subdword_operand()
851 validate_subdword_definition(amd_gfx_level gfx_level, const aco_ptr<Instruction>& instr) in validate_subdword_definition()
887 amd_gfx_level gfx_level = program->gfx_level; in get_subdword_bytes_written() local
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| D | aco_register_allocation.cpp | 493 get_subdword_operand_stride(amd_gfx_level gfx_level, const aco_ptr<Instruction>& instr, in get_subdword_operand_stride()
537 amd_gfx_level gfx_level = ctx.program->gfx_level; in add_subdword_operand() local
603 amd_gfx_level gfx_level = program->gfx_level; in get_subdword_definition_info() local
681 amd_gfx_level gfx_level = program->gfx_level; in add_subdword_definition() local
1913 operand_can_use_reg(amd_gfx_level gfx_level, aco_ptr<Instruction>& instr, unsigned idx, PhysReg reg, in operand_can_use_reg()
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| /third_party/mesa3d/src/amd/registers/ |
| D | parse_kernel_headers.py | 71 def register_filter(gfx_level, name, offset, already_added): argument
693 def generate_json(gfx_level, amd_headers_path): argument
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ci/ |
| D | radeonsi-run-tests.py | 220 gfx_level = -1 variable
238 gfx_level = int(line.split("=")[1]) variable
339 def select_baseline(basepath, gfx_level, gpu_name): argument
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | si_cmd_buffer.c | 808 enum amd_gfx_level gfx_level = cmd_buffer->device->physical_device->rad_info.gfx_level; in si_get_ia_multi_vgt_param() local
927 si_cs_emit_write_event_eop(struct radeon_cmdbuf *cs, enum amd_gfx_level gfx_level, bool is_mec, in si_cs_emit_write_event_eop()
1051 gfx10_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum amd_gfx_level gfx_level, in gfx10_cs_emit_cache_flush()
1232 si_cs_emit_cache_flush(struct radeon_cmdbuf *cs, enum amd_gfx_level gfx_level, uint32_t *flush_cnt, in si_cs_emit_cache_flush()
1518 cp_dma_max_byte_count(enum amd_gfx_level gfx_level) in cp_dma_max_byte_count()
1624 enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level; in si_cs_cp_dma_prefetch() local
1714 enum amd_gfx_level gfx_level = cmd_buffer->device->physical_device->rad_info.gfx_level; in si_cp_dma_buffer_copy() local
1794 enum amd_gfx_level gfx_level = cmd_buffer->device->physical_device->rad_info.gfx_level; in si_cp_dma_clear_buffer() local
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| D | radv_nir_lower_abi.c | 33 enum amd_gfx_level gfx_level; member
259 radv_nir_lower_abi(nir_shader *shader, enum amd_gfx_level gfx_level, in radv_nir_lower_abi()
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| D | radv_shader_args.c | 152 allocate_user_sgprs(enum amd_gfx_level gfx_level, const struct radv_shader_info *info, in allocate_user_sgprs()
302 declare_vs_input_vgprs(enum amd_gfx_level gfx_level, const struct radv_shader_info *info, in declare_vs_input_vgprs()
536 radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipeline_key *key, in radv_declare_shader_args()
903 radv_declare_ps_epilog_args(enum amd_gfx_level gfx_level, const struct radv_ps_epilog_key *key, in radv_declare_ps_epilog_args()
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| D | radv_debug.c | 154 radv_dump_buffer_descriptor(enum amd_gfx_level gfx_level, const uint32_t *desc, FILE *f) in radv_dump_buffer_descriptor()
162 radv_dump_image_descriptor(enum amd_gfx_level gfx_level, const uint32_t *desc, FILE *f) in radv_dump_image_descriptor()
177 radv_dump_sampler_descriptor(enum amd_gfx_level gfx_level, const uint32_t *desc, FILE *f) in radv_dump_sampler_descriptor()
186 radv_dump_combined_image_sampler_descriptor(enum amd_gfx_level gfx_level, const uint32_t *desc, in radv_dump_combined_image_sampler_descriptor()
197 enum amd_gfx_level gfx_level = device->physical_device->rad_info.gfx_level; in radv_dump_descriptor_set() local
372 enum amd_gfx_level gfx_level = pipeline->device->physical_device->rad_info.gfx_level; in radv_dump_annotated_shaders() local
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| D | radv_formats.c | 1479 enum amd_gfx_level gfx_level = physical_device->rad_info.gfx_level; in radv_get_image_format_properties() local
2092 radv_dcc_formats_compatible(enum amd_gfx_level gfx_level, VkFormat format1, VkFormat format2, in radv_dcc_formats_compatible()
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | eg_debug.c | 144 int trace_id, enum amd_gfx_level gfx_level, in ac_parse_packet3()
286 const char *name, enum amd_gfx_level gfx_level, in eg_parse_ib()
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| D | r600_isa.h | 700 r600_isa_alu_opcode(enum r600_chip_class gfx_level, unsigned op) { in r600_isa_alu_opcode()
707 r600_isa_alu_slots(enum r600_chip_class gfx_level, unsigned op) { in r600_isa_alu_slots()
714 r600_isa_fetch_opcode(enum r600_chip_class gfx_level, unsigned op) { in r600_isa_fetch_opcode()
721 r600_isa_cf_opcode(enum r600_chip_class gfx_level, unsigned op) { in r600_isa_cf_opcode()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_nir_lower_alu.cpp | 132 bool r600_nir_lower_trigen(nir_shader *shader, amd_gfx_level gfx_level) in r600_nir_lower_trigen()
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| /third_party/mesa3d/src/gallium/drivers/radeonsi/ |
| D | si_build_pm4.h | 154 #define radeon_set_uconfig_reg_idx(screen, gfx_level, reg, idx, value) do { \ argument
326 si_get_user_data_base(enum amd_gfx_level gfx_level, enum si_has_tess has_tess, in si_get_user_data_base()
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| D | radeon_vcn_enc.c | 408 enum amd_gfx_level gfx_level) in setup_dpb()
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| D | si_debug.c | 355 enum amd_gfx_level gfx_level) in si_parse_current_ib()
617 enum amd_gfx_level gfx_level; member
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| /third_party/mesa3d/src/amd/compiler/tests/ |
| D | helpers.cpp | 75 void create_program(enum amd_gfx_level gfx_level, Stage stage, unsigned wave_size, enum radeon_fami… in create_program()
101 bool setup_cs(const char *input_spec, enum amd_gfx_level gfx_level, in setup_cs()
353 VkDevice get_vk_device(enum amd_gfx_level gfx_level) in get_vk_device()
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