| /device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/mali/common/ |
| D | mali_pmu.c | 68 void mali_pmu_set_registered_cores_mask(struct mali_pmu_core *pmu, u32 mask) in mali_pmu_set_registered_cores_mask()
121 _mali_osk_errcode_t mali_pmu_power_down(struct mali_pmu_core *pmu, u32 mask) in mali_pmu_power_down()
178 _mali_osk_errcode_t mali_pmu_power_up(struct mali_pmu_core *pmu, u32 mask) in mali_pmu_power_up()
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| D | mali_pm.c | 250 u32 mask = 0; in mali_pm_put_domain_refs() local
1068 u32 mask = 0; in mali_pm_get_registered_cores_mask() local
1106 const char *mali_pm_mask_to_string(u32 mask) in mali_pm_mask_to_string()
1164 static void mali_pm_stat_from_mask(u32 mask, u32 *num_pp, u32 *cost) in mali_pm_stat_from_mask()
1239 u32 num_pp, cost, mask; in mali_pm_power_cost_setup() local
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/mali/common/ |
| D | mali_pmu.c | 65 void mali_pmu_set_registered_cores_mask(struct mali_pmu_core *pmu, u32 mask) in mali_pmu_set_registered_cores_mask()
98 mali_osk_errcode_t mali_pmu_power_down(struct mali_pmu_core *pmu, u32 mask) in mali_pmu_power_down()
167 mali_osk_errcode_t mali_pmu_power_up(struct mali_pmu_core *pmu, u32 mask) in mali_pmu_power_up()
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| D | mali_pm.c | 239 u32 mask = 0; in mali_pm_put_domain_refs() local
998 u32 mask = 0; in mali_pm_get_registered_cores_mask() local
1035 const char *mali_pm_mask_to_string(u32 mask) in mali_pm_mask_to_string()
1092 static void mali_pm_stat_from_mask(u32 mask, u32 *num_pp, u32 *cost) in mali_pm_stat_from_mask()
1166 u32 num_pp, cost, mask; in mali_pm_power_cost_setup() local
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| /device/board/hisilicon/hispark_aries/uboot/secureboot_release/ddr_init/drv/ |
| D | ddr_training_boot.c | 47 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
132 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
247 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
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| /device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/drv/ |
| D | ddr_training_boot.c | 47 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
132 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
247 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
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| D | ddr_training_custom.c | 67 void ddr_training_save_reg_custom(void *reg, unsigned int mask) in ddr_training_save_reg_custom()
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| /device/soc/rockchip/rk3588/kernel/drivers/media/platform/rockchip/isp/ |
| D | capture_v30.c | 295 u32 val, mask; in mp_config_mi() local
381 u32 sp_in_fmt, val, mask; in sp_config_mi() local
473 u32 val, mask; in bp_config_mi() local
514 u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE; in mp_enable_mi() local
532 u32 val, mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_YUV_MASK | in fbc_enable_mi() local
553 u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE; in mp_disable_mi() local
567 u32 mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_EN; in fbc_disable_mi() local
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| D | common.c | 71 void rkisp_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct) in rkisp_set_bits()
78 void rkisp_next_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct) in rkisp_next_set_bits()
85 void rkisp_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct) in rkisp_clear_bits()
92 void rkisp_next_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct) in rkisp_next_clear_bits()
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| /device/soc/rockchip/common/vendor/drivers/media/platform/rockchip/isp/ |
| D | capture_v30.c | 278 u32 val, mask; in mp_config_mi() local
362 u32 sp_in_fmt, val, mask; in sp_config_mi() local
450 u32 val, mask; in bp_config_mi() local
491 u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE; in mp_enable_mi() local
508 u32 val, mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_YUV_MASK | ISP3X_MPFBC_SPARSE_MODE; in fbc_enable_mi() local
526 u32 mask = CIF_MI_CTRL_MP_ENABLE | CIF_MI_CTRL_RAW_ENABLE; in mp_disable_mi() local
539 u32 mask = ISP3X_MPFBC_FORCE_UPD | ISP3X_MPFBC_EN; in fbc_disable_mi() local
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| D | common.c | 73 void rkisp_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct) in rkisp_set_bits()
80 void rkisp_next_set_bits(struct rkisp_device *dev, u32 reg, u32 mask, u32 val, bool is_direct) in rkisp_next_set_bits()
87 void rkisp_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct) in rkisp_clear_bits()
94 void rkisp_next_clear_bits(struct rkisp_device *dev, u32 reg, u32 mask, bool is_direct) in rkisp_next_clear_bits()
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| /device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/ |
| D | siutils.c | 1419 si_core_cflags(si_t *sih, uint32 mask, uint32 val) in si_core_cflags()
1436 si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val) in si_core_cflags_wo()
1451 si_core_sflags(si_t *sih, uint32 mask, uint32 val) in si_core_sflags()
1501 si_wrapperreg(si_t *sih, uint32 offset, uint32 mask, uint32 val) in si_wrapperreg()
1614 si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in si_corereg()
1631 si_corereg_writeonly(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in si_corereg_writeonly()
1651 si_pmu_corereg(si_t *sih, uint32 idx, uint regoff, uint mask, uint val) in si_pmu_corereg()
2216 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val, uint8 priority) in si_gpiocontrol()
2238 si_gpioouten(si_t *sih, uint32 mask, uint32 val, uint8 priority) in si_gpioouten()
2260 si_gpioout(si_t *sih, uint32 mask, uint32 val, uint8 priority) in si_gpioout()
[all …]
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| D | sbutils.c | 52 #define SET_SBREG(sii, r, mask, val) \ argument
277 sb_core_cflags_wo(si_t *sih, uint32 mask, uint32 val) in sb_core_cflags_wo()
296 sb_core_cflags(si_t *sih, uint32 mask, uint32 val) in sb_core_cflags()
322 sb_core_sflags(si_t *sih, uint32 mask, uint32 val) in sb_core_sflags()
369 sb_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in sb_corereg()
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| D | aiutils.c | 60 get_erom_ent(si_t *sih, uint32 **eromptr, uint32 mask, uint32 match) in get_erom_ent()
805 ai_wrap_reg(si_t *sih, uint32 offset, uint32 mask, uint32 val) in ai_wrap_reg()
870 ai_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in ai_corereg()
964 ai_corereg_writeonly(si_t *sih, uint coreidx, uint regoff, uint mask, uint val) in ai_corereg_writeonly()
1244 ai_core_cflags_wo(si_t *sih, uint32 mask, uint32 val) in ai_core_cflags_wo()
1273 ai_core_cflags(si_t *sih, uint32 mask, uint32 val) in ai_core_cflags()
1304 ai_core_sflags(si_t *sih, uint32 mask, uint32 val) in ai_core_sflags()
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| /device/qemu/SmartL_E802/liteos_m/board/hals/csky_driver/src/ |
| D | dw_gpio.c | 52 uint32_t mask; ///< gpio mask bit member
114 static int32_t gpio_write(void *port, uint32_t mask) in gpio_write()
142 uint32_t mask = 1 << offset; in gpio_set_irq_mode() local
354 int32_t csi_gpio_port_config(gpio_port_handle_t handle, uint32_t mask, gpio_mode_e mode, gpio_direc… in csi_gpio_port_config()
390 int32_t csi_gpio_port_write(gpio_port_handle_t handle, uint32_t mask, uint32_t value) in csi_gpio_port_write()
411 int32_t csi_gpio_port_read(gpio_port_handle_t handle, uint32_t mask, uint32_t *value) in csi_gpio_port_read()
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| /device/soc/rockchip/common/kernel/drivers/net/wireless/rockchip_wlan/rkwifi/bcmdhd_wifi6/include/ |
| D | siutils.h | 575 #define pmu_corereg(si, cc_idx, member, mask, val) \ argument
582 #define PMU_REG_NEW(si, member, mask, val) \ argument
586 #define PMU_REG(si, member, mask, val) \ argument
593 #define PMU_REG_NEW(si, member, mask, val) \ argument
597 #define GCI_REG(si, offset, mask, val) \ argument
604 #define GCI_REG_NEW(si, member, mask, val) \ argument
608 #define LHL_REG(si, member, mask, val) \ argument
612 #define CHIPC_REG(si, member, mask, val) \ argument
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| D | hndlhl.h | 41 uint32 mask; member
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| /device/board/hisilicon/hispark_taurus/uboot/secureboot_release/ddr_init/drv/cmd_bin/ |
| D | ddr_training_cmd.c | 95 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
101 void ddr_training_error(unsigned int mask, unsigned int phy, int byte, int dq) in ddr_training_error()
451 unsigned int mask = 1 << phy_index; /* DDR_BYPASS_PHY0_MASK DDR_BYPASS_PHY1_MASK */ in dump_result_by_rank() local
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| /device/soc/hisilicon/common/platform/pwm/ |
| D | pwm_hi35xx.h | 72 uint32_t mask; in HiPwmOutputNumberSquareWaves() local
83 uint32_t mask; in HiPwmSetPolarity() local
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| /device/soc/rockchip/common/vendor/drivers/gpu/arm/mali400/mali/timestamp-arm11-cc/ |
| D | mali_timestamp.h | 23 u32 mask = (1 << 0) | /* enable all three counters */ in _mali_timestamp_reset() local
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| /device/soc/rockchip/common/kernel/drivers/gpu/arm/mali400/mali/timestamp-arm11-cc/ |
| D | mali_timestamp.h | 22 u32 mask = (1 << 0) | /* enable all three counters */ in _mali_timestamp_reset() local
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| /device/soc/hisilicon/common/platform/mipi_csi/ |
| D | mipi_rx_hi2121.c | 180 unsigned long t, mask; in SetBit() local
189 static void WriteReg32(unsigned long *addr, unsigned int value, unsigned int mask) in WriteReg32()
220 void MipiRxSetCilIntMask(unsigned int phyId, unsigned int mask) in MipiRxSetCilIntMask()
1090 unsigned int mask; in MipiRxDrvSetPhyConfig() local
1138 unsigned int mask; in MipiRxDrvSetPhyCmvmode() local
1728 unsigned int mask; in MipiRxDrvSetPhySyncConfig() local
1833 void MipiRxDrvSetLvdsCtrlIntMask(uint8_t devno, unsigned int mask) in MipiRxDrvSetLvdsCtrlIntMask()
1840 void MipiRxDrvSetMipiCtrlIntMask(uint8_t devno, unsigned int mask) in MipiRxDrvSetMipiCtrlIntMask()
1847 void MipiRxDrvSetMipiPkt1IntMask(uint8_t devno, unsigned int mask) in MipiRxDrvSetMipiPkt1IntMask()
1854 void MipiRxDrvSetMipiPkt2IntMask(uint8_t devno, unsigned int mask) in MipiRxDrvSetMipiPkt2IntMask()
[all …]
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/hi3516cv500/mipi_rx/ |
| D | mipi_rx_hal.c | 176 unsigned long t, mask; in set_bit() local
185 static void write_reg32(unsigned long addr, unsigned int value, unsigned int mask) in write_reg32()
216 void mipi_rx_set_cil_int_mask(unsigned int phy_id, unsigned int mask) in mipi_rx_set_cil_int_mask()
1089 unsigned int mask; in mipi_rx_drv_set_phy_config() local
1138 unsigned int mask; in mipi_rx_drv_set_phy_cmvmode() local
1735 unsigned int mask; in mipi_rx_drv_set_phy_sync_config() local
1840 void mipi_rx_drv_set_lvds_ctrl_int_mask(combo_dev_t devno, unsigned int mask) in mipi_rx_drv_set_lvds_ctrl_int_mask()
1847 void mipi_rx_drv_set_mipi_ctrl_int_mask(combo_dev_t devno, unsigned int mask) in mipi_rx_drv_set_mipi_ctrl_int_mask()
1854 void mipi_rx_drv_set_mipi_pkt1_int_mask(combo_dev_t devno, unsigned int mask) in mipi_rx_drv_set_mipi_pkt1_int_mask()
1861 void mipi_rx_drv_set_mipi_pkt2_int_mask(combo_dev_t devno, unsigned int mask) in mipi_rx_drv_set_mipi_pkt2_int_mask()
[all …]
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| /device/soc/rockchip/common/sdk_linux/include/linux/ |
| D | dma-mapping.h | 228 static inline int dma_supported(struct device *dev, u64 mask) in dma_supported()
232 static inline int dma_set_mask(struct device *dev, u64 mask) in dma_set_mask()
236 static inline int dma_set_coherent_mask(struct device *dev, u64 mask) in dma_set_coherent_mask()
408 static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask) in dma_set_mask_and_coherent()
421 static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask) in dma_coerce_mask_and_coherent()
484 static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask) in dma_set_seg_boundary()
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| /device/soc/hisilicon/hi3516dv300/sdk_linux/drv/interdrv/common/hi_adc/ |
| D | hi_adc.c | 53 static inline void lsadc_reg_write(unsigned long value, unsigned long mask, unsigned long addr) in lsadc_reg_write()
63 static void write_reg32(unsigned int value, unsigned int mask, const void *addr) in write_reg32()
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