| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_nir_lower_conversions.c | 54 split_conversion(nir_builder *b, nir_alu_instr *alu, nir_op op1, nir_op op2) in split_conversion()
94 nir_op op2 = get_conversion_op(nir_type_float, 32, in lower_alu_instr() local
119 nir_op op2 = get_conversion_op(dst_type, 32, dst_type, dst_bit_size, in lower_alu_instr() local
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| /third_party/skia/third_party/externals/spirv-tools/test/opt/loop_optimizations/ |
| D | peeling_pass.cpp | 35 const std::string& op2) { in AssembleAndRunPeelingTest()
73 const std::string& res_id, const std::string& op1, const std::string& op2, in RunPeelingTest()
91 const std::string& op2, in BuildAndCheckTrace()
208 const std::string& op2) { in TEST_F()
678 const PeelTraceType& expected_peel_trace) { in TEST_F()
956 const PeelTraceType& expected_peel_trace, size_t nb_of_loops) { in TEST_F()
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/test/opt/loop_optimizations/ |
| D | peeling_pass.cpp | 35 const std::string& op2) { in AssembleAndRunPeelingTest()
73 const std::string& res_id, const std::string& op1, const std::string& op2, in RunPeelingTest()
91 const std::string& op2, in BuildAndCheckTrace()
208 const std::string& op2) { in TEST_F()
678 const PeelTraceType& expected_peel_trace) { in TEST_F()
956 const PeelTraceType& expected_peel_trace, size_t nb_of_loops) { in TEST_F()
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| /third_party/spirv-tools/test/opt/loop_optimizations/ |
| D | peeling_pass.cpp | 34 const std::string& op2) { in AssembleAndRunPeelingTest()
73 const std::string& op2, size_t nb_of_loops) { in RunPeelingTest()
90 const std::string& op2, in BuildAndCheckTrace()
207 const std::string& op2) { in TEST_F()
677 const PeelTraceType& expected_peel_trace) { in TEST_F()
955 const PeelTraceType& expected_peel_trace, size_t nb_of_loops) { in TEST_F()
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| /third_party/node/deps/v8/src/codegen/arm64/ |
| D | utils-arm64.h | 111 inline double FusedMultiplyAdd(double op1, double op2, double a) { in FusedMultiplyAdd()
115 inline float FusedMultiplyAdd(float op1, float op2, float a) { in FusedMultiplyAdd()
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| /third_party/libunwind/libunwind/src/arm/ |
| D | Gex_tables.c | 177 uint8_t op2 = READ_OP (); in arm_exidx_decode() local
213 uint8_t op2 = READ_OP (); in arm_exidx_decode() local
264 uint8_t op2 = READ_OP (); in arm_exidx_decode() local
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| /third_party/skia/third_party/externals/spirv-tools/source/opt/ |
| D | ir_builder.h | 294 Instruction* AddIAdd(uint32_t type, uint32_t op1, uint32_t op2) { in AddIAdd()
306 Instruction* AddULessThan(uint32_t op1, uint32_t op2) { in AddULessThan()
320 Instruction* AddSLessThan(uint32_t op1, uint32_t op2) { in AddSLessThan()
334 Instruction* AddLessThan(uint32_t op1, uint32_t op2) { in AddLessThan()
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| /third_party/spirv-tools/source/opt/ |
| D | ir_builder.h | 298 Instruction* AddIAdd(uint32_t type, uint32_t op1, uint32_t op2) { in AddIAdd()
310 Instruction* AddULessThan(uint32_t op1, uint32_t op2) { in AddULessThan()
324 Instruction* AddSLessThan(uint32_t op1, uint32_t op2) { in AddSLessThan()
338 Instruction* AddLessThan(uint32_t op1, uint32_t op2) { in AddLessThan()
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| D | scalar_analysis.cpp | 105 SENode* op2 = in AnalyzeMultiplyOp() local
237 SENode* op2 = in AnalyzeAddOp() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/source/opt/ |
| D | ir_builder.h | 294 Instruction* AddIAdd(uint32_t type, uint32_t op1, uint32_t op2) { in AddIAdd()
306 Instruction* AddULessThan(uint32_t op1, uint32_t op2) { in AddULessThan()
320 Instruction* AddSLessThan(uint32_t op1, uint32_t op2) { in AddSLessThan()
334 Instruction* AddLessThan(uint32_t op1, uint32_t op2) { in AddLessThan()
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| /third_party/mesa3d/src/panfrost/midgard/ |
| D | midgard_address.c | 99 nir_ssa_scalar op2 = nir_ssa_scalar_chase_alu_src(address->B, 1); in mir_match_iadd() local
169 nir_ssa_scalar op2 = nir_ssa_scalar_chase_alu_src(address->B, 1); in mir_match_ishl() local
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| /third_party/cmsis/CMSIS/Core/Include/a-profile/ |
| D | cmsis_iccarm_a.h | 249 #define __get_CP(cp, op1, RT, CRn, CRm, op2) \ argument
252 #define __set_CP(cp, op1, RT, CRn, CRm, op2) \ argument
415 __IAR_FT uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR()
439 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) \ argument
441 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) \ argument
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| D | cmsis_clang_a.h | 230 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR()
698 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn()
712 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA()
838 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn… argument
839 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn… argument
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| D | cmsis_gcc_a.h | 237 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR()
721 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn()
735 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA()
861 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn… argument
862 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn… argument
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| D | cmsis_armclang_a.h | 192 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR()
502 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA()
698 #define __get_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MRC p" # cp ", " # op1 ", %0, c" # CRn… argument
699 #define __set_CP(cp, op1, Rt, CRn, CRm, op2) __ASM volatile("MCR p" # cp ", " # op1 ", %0, c" # CRn… argument
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| /third_party/node/deps/v8/src/codegen/s390/ |
| D | assembler-s390-inl.h | 268 Opcode op2 = Instruction::S390OpcodeValue( in target_address_at() local
338 Opcode op2 = Instruction::S390OpcodeValue( in set_target_address_at() local
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| D | assembler-s390.h | 347 uint32_t op2 = opcode & 0xf; in ril_format() local
578 uint32_t op2 = opcode & 0xf; in S390_RXE_OPCODE_LIST() local
859 uint32_t op2 = opcode & 0xff; in S390_SIL_OPCODE_LIST() local
876 uint32_t op2 = opcode & 0xff; in S390_RIE_D_OPCODE_LIST() local
894 uint32_t op2 = opcode & 0xff; in S390_RIE_E_OPCODE_LIST() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/DebugInfo/DWARF/ |
| D | DWARFDebugFrame.cpp | 113 auto op2 = Data.getULEB128(Offset); in parse() local
123 auto op2 = (uint64_t)Data.getSLEB128(Offset); in parse() local
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| /third_party/node/deps/v8/src/execution/arm64/ |
| D | simulator-arm64.cc | 1081 T op2 = reg<T>(instr->Rm()); in AddSubWithCarry() local
1166 T op2 = reg<T>(instr->Rm()); in Extract() local
1796 void Simulator::AddSubHelper(Instruction* instr, T op2) { in AddSubHelper()
1829 uint64_t op2 = ShiftOperand(xreg(instr->Rm()), shift_type, shift_amount); in VisitAddSubShifted() local
1832 uint32_t op2 = ShiftOperand(wreg(instr->Rm()), shift_type, shift_amount); in VisitAddSubShifted() local
1838 int64_t op2 = instr->ImmAddSub() << ((instr->ShiftAddSub() == 1) ? 12 : 0); in VisitAddSubImmediate() local
1850 uint64_t op2 = ExtendValue(xreg(instr->Rm()), ext, left_shift); in VisitAddSubExtended() local
1853 uint32_t op2 = ExtendValue(wreg(instr->Rm()), ext, left_shift); in VisitAddSubExtended() local
1871 uint64_t op2 = ShiftOperand(xreg(instr->Rm()), shift_type, shift_amount); in VisitLogicalShifted() local
1875 uint32_t op2 = ShiftOperand(wreg(instr->Rm()), shift_type, shift_amount); in VisitLogicalShifted() local
[all …]
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| /third_party/spirv-tools/tools/sva/src/ |
| D | parser_test.js | 101 let op2 = inst.operand(2); variable
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| /third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/tools/sva/src/ |
| D | parser_test.js | 101 let op2 = inst.operand(2); variable
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| /third_party/skia/third_party/externals/spirv-tools/tools/sva/src/ |
| D | parser_test.js | 101 let op2 = inst.operand(2); variable
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| /third_party/cmsis/CMSIS/Core/Include/m-profile/ |
| D | cmsis_gcc_m.h | 330 __STATIC_FORCEINLINE uint32_t __ROR(uint32_t op1, uint32_t op2) in __ROR()
1652 __STATIC_FORCEINLINE uint32_t __SXTAB16(uint32_t op1, uint32_t op2) in __SXTAB16()
1660 __STATIC_FORCEINLINE uint32_t __SXTAB16_RORn(uint32_t op1, uint32_t op2, uint32_t rotate) in __SXTAB16_RORn()
1674 __STATIC_FORCEINLINE int32_t __SMMLA (int32_t op1, int32_t op2, int32_t op3) in __SMMLA()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_nir_lower_64bit.cpp | 659 LowerSplit64BitVar::split_reduction(nir_ssa_def *src[2][2], nir_op op1, nir_op op2, nir_op reductio… in split_reduction()
668 nir_op op1, nir_op op2, nir_op reduction) in split_reduction3()
683 nir_op op1, nir_op op2, nir_op reduction) in split_reduction4()
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| /third_party/mesa3d/src/gallium/drivers/lima/ir/gp/ |
| D | codegen.c | 642 bool gpir_codegen_acc_same_op(gpir_op op1, gpir_op op2) in gpir_codegen_acc_same_op()
|