| /third_party/ffmpeg/libavcodec/ |
| D | gemdec.c | 59 int y, pl, x, vdup; member
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| /third_party/node/deps/v8/src/compiler/backend/arm/ |
| D | code-generator-arm.cc | 2046 __ vdup(Neon32, dst, i.InputRegister(0)); in AssembleArchInstruction() local
2166 __ vdup(Neon32, i.OutputSimd128Register(), in AssembleArchInstruction() local
2314 __ vdup(Neon32, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() local
2510 __ vdup(Neon16, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() local
2691 __ vdup(Neon8, i.OutputSimd128Register(), i.InputRegister(0)); in AssembleArchInstruction() local
2867 __ vdup(size, i.OutputSimd128Register(), in AssembleArchInstruction() local
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| /third_party/node/deps/v8/src/codegen/arm/ |
| D | assembler-arm.cc | 3923 void Assembler::vdup(NeonSize size, QwNeonRegister dst, Register src) { in vdup() function in v8::internal::Assembler
3975 void Assembler::vdup(NeonSize size, DwVfpRegister dst, DwVfpRegister src, in vdup() function in v8::internal::Assembler
3982 void Assembler::vdup(NeonSize size, QwNeonRegister dst, DwVfpRegister src, in vdup() function in v8::internal::Assembler
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/DartARM32/ |
| D | assembler_arm.cc | 1320 void Assembler::vdup(OperandSize sz, QRegister qd, DRegister dm, int idx) { in vdup() function in dart::Assembler
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| /third_party/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 4396 void vdup(DataType dt, QRegister rd, Register rt) { vdup(al, dt, rd, rt); } in vdup() function
4399 void vdup(DataType dt, DRegister rd, Register rt) { vdup(al, dt, rd, rt); } in vdup() function
4402 void vdup(DataType dt, DRegister rd, DRegisterLane rm) { in vdup() function
4407 void vdup(DataType dt, QRegister rd, DRegisterLane rm) { in vdup() function
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| D | assembler-aarch32.cc | 17325 void Assembler::vdup(Condition cond, DataType dt, QRegister rd, Register rt) { in vdup() function in vixl::aarch32::Assembler
17356 void Assembler::vdup(Condition cond, DataType dt, DRegister rd, Register rt) { in vdup() function in vixl::aarch32::Assembler
17387 void Assembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Assembler
17417 void Assembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Assembler
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| D | disasm-aarch32.cc | 4697 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler
4706 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler
4715 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler
4724 void Disassembler::vdup(Condition cond, in vdup() function in vixl::aarch32::Disassembler
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| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 3422 void AssemblerARM32::vdup(Type ElmtTy, const Operand *OpQd, const Operand *OpQn, in vdup() function in Ice::ARM32::AssemblerARM32
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