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/kernel/linux/linux-6.6/drivers/phy/microchip/
Dsparx5_serdes_regs.h35 #define SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0_SET(x)\ argument
37 #define SD10G_LANE_LANE_01_CFG_PMA_TX_CK_BITWIDTH_2_0_GET(x)\ argument
41 #define SD10G_LANE_LANE_01_CFG_RXDET_EN_SET(x)\ argument
43 #define SD10G_LANE_LANE_01_CFG_RXDET_EN_GET(x)\ argument
47 #define SD10G_LANE_LANE_01_CFG_RXDET_STR_SET(x)\ argument
49 #define SD10G_LANE_LANE_01_CFG_RXDET_STR_GET(x)\ argument
56 #define SD10G_LANE_LANE_02_CFG_EN_ADV_SET(x)\ argument
58 #define SD10G_LANE_LANE_02_CFG_EN_ADV_GET(x)\ argument
62 #define SD10G_LANE_LANE_02_CFG_EN_MAIN_SET(x)\ argument
64 #define SD10G_LANE_LANE_02_CFG_EN_MAIN_GET(x)\ argument
[all …]
Dlan966x_serdes_regs.h21 #define HSIO_SD_CFG_PHY_RESET_SET(x)\ argument
23 #define HSIO_SD_CFG_PHY_RESET_GET(x)\ argument
27 #define HSIO_SD_CFG_TX_RESET_SET(x)\ argument
29 #define HSIO_SD_CFG_TX_RESET_GET(x)\ argument
33 #define HSIO_SD_CFG_TX_RATE_SET(x)\ argument
35 #define HSIO_SD_CFG_TX_RATE_GET(x)\ argument
39 #define HSIO_SD_CFG_TX_INVERT_SET(x)\ argument
41 #define HSIO_SD_CFG_TX_INVERT_GET(x)\ argument
45 #define HSIO_SD_CFG_TX_EN_SET(x)\ argument
47 #define HSIO_SD_CFG_TX_EN_GET(x)\ argument
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/radeon/
Drs600d.h33 #define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18) argument
34 #define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1) argument
36 #define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19) argument
37 #define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1) argument
39 #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) argument
40 #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) argument
42 #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) argument
43 #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) argument
45 #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) argument
46 #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) argument
[all …]
Dr100d.h69 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) argument
70 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) argument
72 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) argument
73 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) argument
75 #define S_0000F0_SOFT_RESET_SE(x) (((x) & 0x1) << 2) argument
76 #define G_0000F0_SOFT_RESET_SE(x) (((x) >> 2) & 0x1) argument
78 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) argument
79 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) argument
81 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) argument
82 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) argument
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Dr420d.h32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0) argument
33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F) argument
35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8) argument
36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1) argument
39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument
40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument
43 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
44 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
46 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument
47 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument
[all …]
Drs690d.h34 #define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) argument
36 #define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) argument
37 #define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF) argument
39 #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9) argument
40 #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1) argument
43 #define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument
44 #define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument
47 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument
48 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument
51 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument
[all …]
Dr300d.h70 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
71 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
73 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
74 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
77 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) argument
78 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) argument
80 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) argument
81 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) argument
84 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) argument
85 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) argument
[all …]
Drs400d.h33 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
34 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
36 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
37 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
40 #define S_00015C_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
41 #define G_00015C_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
43 #define S_00015C_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
44 #define G_00015C_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
47 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
48 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
[all …]
Dr520d.h33 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument
34 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument
37 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument
38 #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) argument
41 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
42 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
44 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument
45 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument
47 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) argument
48 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) argument
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/radeon/
Drs600d.h33 #define S_000040_SCRATCH_INT_MASK(x) (((x) & 0x1) << 18) argument
34 #define G_000040_SCRATCH_INT_MASK(x) (((x) >> 18) & 0x1) argument
36 #define S_000040_GUI_IDLE_MASK(x) (((x) & 0x1) << 19) argument
37 #define G_000040_GUI_IDLE_MASK(x) (((x) >> 19) & 0x1) argument
39 #define S_000040_DMA_VIPH1_INT_EN(x) (((x) & 0x1) << 13) argument
40 #define G_000040_DMA_VIPH1_INT_EN(x) (((x) >> 13) & 0x1) argument
42 #define S_000040_DMA_VIPH2_INT_EN(x) (((x) & 0x1) << 14) argument
43 #define G_000040_DMA_VIPH2_INT_EN(x) (((x) >> 14) & 0x1) argument
45 #define S_000040_DMA_VIPH3_INT_EN(x) (((x) & 0x1) << 15) argument
46 #define G_000040_DMA_VIPH3_INT_EN(x) (((x) >> 15) & 0x1) argument
[all …]
Dr100d.h69 #define S_0000F0_SOFT_RESET_CP(x) (((x) & 0x1) << 0) argument
70 #define G_0000F0_SOFT_RESET_CP(x) (((x) >> 0) & 0x1) argument
72 #define S_0000F0_SOFT_RESET_HI(x) (((x) & 0x1) << 1) argument
73 #define G_0000F0_SOFT_RESET_HI(x) (((x) >> 1) & 0x1) argument
75 #define S_0000F0_SOFT_RESET_SE(x) (((x) & 0x1) << 2) argument
76 #define G_0000F0_SOFT_RESET_SE(x) (((x) >> 2) & 0x1) argument
78 #define S_0000F0_SOFT_RESET_RE(x) (((x) & 0x1) << 3) argument
79 #define G_0000F0_SOFT_RESET_RE(x) (((x) >> 3) & 0x1) argument
81 #define S_0000F0_SOFT_RESET_PP(x) (((x) & 0x1) << 4) argument
82 #define G_0000F0_SOFT_RESET_PP(x) (((x) >> 4) & 0x1) argument
[all …]
Dr420d.h32 #define S_0001F8_MC_IND_ADDR(x) (((x) & 0x7F) << 0) argument
33 #define G_0001F8_MC_IND_ADDR(x) (((x) >> 0) & 0x7F) argument
35 #define S_0001F8_MC_IND_WR_EN(x) (((x) & 0x1) << 8) argument
36 #define G_0001F8_MC_IND_WR_EN(x) (((x) >> 8) & 0x1) argument
39 #define S_0001FC_MC_IND_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument
40 #define G_0001FC_MC_IND_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument
43 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
44 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
46 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument
47 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument
[all …]
Drs690d.h34 #define G_00005F_K8_ADDR_EXT(x) (((x) >> 0) & 0xFF) argument
36 #define S_000078_MC_IND_ADDR(x) (((x) & 0x1FF) << 0) argument
37 #define G_000078_MC_IND_ADDR(x) (((x) >> 0) & 0x1FF) argument
39 #define S_000078_MC_IND_WR_EN(x) (((x) & 0x1) << 9) argument
40 #define G_000078_MC_IND_WR_EN(x) (((x) >> 9) & 0x1) argument
43 #define S_00007C_MC_DATA(x) (((x) & 0xFFFFFFFF) << 0) argument
44 #define G_00007C_MC_DATA(x) (((x) >> 0) & 0xFFFFFFFF) argument
47 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument
48 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument
51 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument
[all …]
Dr300d.h70 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
71 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
73 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
74 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
77 #define S_00014C_MC_AGP_START(x) (((x) & 0xFFFF) << 0) argument
78 #define G_00014C_MC_AGP_START(x) (((x) >> 0) & 0xFFFF) argument
80 #define S_00014C_MC_AGP_TOP(x) (((x) & 0xFFFF) << 16) argument
81 #define G_00014C_MC_AGP_TOP(x) (((x) >> 16) & 0xFFFF) argument
84 #define S_00015C_AGP_BASE_ADDR_2(x) (((x) & 0xF) << 0) argument
85 #define G_00015C_AGP_BASE_ADDR_2(x) (((x) >> 0) & 0xF) argument
[all …]
Drs400d.h33 #define S_000148_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
34 #define G_000148_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
36 #define S_000148_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
37 #define G_000148_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
40 #define S_00015C_MC_FB_START(x) (((x) & 0xFFFF) << 0) argument
41 #define G_00015C_MC_FB_START(x) (((x) >> 0) & 0xFFFF) argument
43 #define S_00015C_MC_FB_TOP(x) (((x) & 0xFFFF) << 16) argument
44 #define G_00015C_MC_FB_TOP(x) (((x) >> 16) & 0xFFFF) argument
47 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
48 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
[all …]
Dr520d.h33 #define S_0000F8_CONFIG_MEMSIZE(x) (((x) & 0xFFFFFFFF) << 0) argument
34 #define G_0000F8_CONFIG_MEMSIZE(x) (((x) >> 0) & 0xFFFFFFFF) argument
37 #define S_000134_HDP_FB_START(x) (((x) & 0xFFFF) << 0) argument
38 #define G_000134_HDP_FB_START(x) (((x) >> 0) & 0xFFFF) argument
41 #define S_0007C0_MRU_BUSY(x) (((x) & 0x1) << 0) argument
42 #define G_0007C0_MRU_BUSY(x) (((x) >> 0) & 0x1) argument
44 #define S_0007C0_MWU_BUSY(x) (((x) & 0x1) << 1) argument
45 #define G_0007C0_MWU_BUSY(x) (((x) >> 1) & 0x1) argument
47 #define S_0007C0_RSIU_BUSY(x) (((x) & 0x1) << 2) argument
48 #define G_0007C0_RSIU_BUSY(x) (((x) >> 2) & 0x1) argument
[all …]
/kernel/linux/linux-5.10/tools/lib/bpf/
Dbpf_tracing.h54 #define PT_REGS_PARM1(x) ((x)->di) argument
55 #define PT_REGS_PARM2(x) ((x)->si) argument
56 #define PT_REGS_PARM3(x) ((x)->dx) argument
57 #define PT_REGS_PARM4(x) ((x)->cx) argument
58 #define PT_REGS_PARM5(x) ((x)->r8) argument
59 #define PT_REGS_RET(x) ((x)->sp) argument
60 #define PT_REGS_FP(x) ((x)->bp) argument
61 #define PT_REGS_RC(x) ((x)->ax) argument
62 #define PT_REGS_SP(x) ((x)->sp) argument
63 #define PT_REGS_IP(x) ((x)->ip) argument
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/sparx5/
Dsparx5_main_regs.h65 #define ANA_AC_RAM_INIT_RAM_INIT_SET(x)\ argument
67 #define ANA_AC_RAM_INIT_RAM_INIT_GET(x)\ argument
71 #define ANA_AC_RAM_INIT_RAM_CFG_HOOK_SET(x)\ argument
73 #define ANA_AC_RAM_INIT_RAM_CFG_HOOK_GET(x)\ argument
81 #define ANA_AC_OWN_UPSID_OWN_UPSID_SET(x)\ argument
83 #define ANA_AC_OWN_UPSID_OWN_UPSID_GET(x)\ argument
99 #define ANA_AC_SRC_CFG2_PORT_MASK2_SET(x)\ argument
101 #define ANA_AC_SRC_CFG2_PORT_MASK2_GET(x)\ argument
117 #define ANA_AC_PGID_CFG2_PORT_MASK2_SET(x)\ argument
119 #define ANA_AC_PGID_CFG2_PORT_MASK2_GET(x)\ argument
[all …]
/kernel/linux/linux-5.10/drivers/staging/media/hantro/
Drk3399_vpu_regs.h14 #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) argument
15 #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) argument
17 #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) argument
18 #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) argument
20 #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) argument
21 #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) argument
23 #define VEPU_REG_VP8_QUT_ZB_DC_CHR(x) (((x) & 0x1ff) << 18) argument
24 #define VEPU_REG_VP8_QUT_ZB_DC_Y2(x) (((x) & 0x1ff) << 9) argument
25 #define VEPU_REG_VP8_QUT_ZB_DC_Y1(x) (((x) & 0x1ff) << 0) argument
27 #define VEPU_REG_VP8_QUT_ZB_AC_CHR(x) (((x) & 0x1ff) << 18) argument
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/verisilicon/
Drockchip_vpu2_regs.h14 #define VEPU_REG_VP8_QUT_DC_Y2(x) (((x) & 0x3fff) << 16) argument
15 #define VEPU_REG_VP8_QUT_DC_Y1(x) (((x) & 0x3fff) << 0) argument
17 #define VEPU_REG_VP8_QUT_AC_Y1(x) (((x) & 0x3fff) << 16) argument
18 #define VEPU_REG_VP8_QUT_DC_CHR(x) (((x) & 0x3fff) << 0) argument
20 #define VEPU_REG_VP8_QUT_AC_CHR(x) (((x) & 0x3fff) << 16) argument
21 #define VEPU_REG_VP8_QUT_AC_Y2(x) (((x) & 0x3fff) << 0) argument
23 #define VEPU_REG_VP8_QUT_ZB_DC_CHR(x) (((x) & 0x1ff) << 18) argument
24 #define VEPU_REG_VP8_QUT_ZB_DC_Y2(x) (((x) & 0x1ff) << 9) argument
25 #define VEPU_REG_VP8_QUT_ZB_DC_Y1(x) (((x) & 0x1ff) << 0) argument
27 #define VEPU_REG_VP8_QUT_ZB_AC_CHR(x) (((x) & 0x1ff) << 18) argument
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/microchip/lan966x/
Dlan966x_regs.h38 #define AFI_PORT_FRM_OUT_FRM_OUT_CNT_SET(x)\ argument
40 #define AFI_PORT_FRM_OUT_FRM_OUT_CNT_GET(x)\ argument
47 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ_SET(x)\ argument
49 #define AFI_PORT_CFG_FC_SKIP_TTI_INJ_GET(x)\ argument
53 #define AFI_PORT_CFG_FRM_OUT_MAX_SET(x)\ argument
55 #define AFI_PORT_CFG_FRM_OUT_MAX_GET(x)\ argument
62 #define ANA_ADVLEARN_VLAN_CHK_SET(x)\ argument
64 #define ANA_ADVLEARN_VLAN_CHK_GET(x)\ argument
74 #define ANA_ANAINTR_INTR_SET(x)\ argument
76 #define ANA_ANAINTR_INTR_GET(x)\ argument
[all …]
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/byteorder/
Dlittle_endian.h29 #define __constant_htonl(x) ((__force __be32) ___constant_swab32((x))) argument
30 #define __constant_ntohl(x) ___constant_swab32((__force __be32) (x)) argument
31 #define __constant_htons(x) ((__force __be16) ___constant_swab16((x))) argument
32 #define __constant_ntohs(x) ___constant_swab16((__force __be16) (x)) argument
33 #define __constant_cpu_to_le64(x) ((__force __le64) (__u64) (x)) argument
34 #define __constant_le64_to_cpu(x) ((__force __u64) (__le64) (x)) argument
35 #define __constant_cpu_to_le32(x) ((__force __le32) (__u32) (x)) argument
36 #define __constant_le32_to_cpu(x) ((__force __u32) (__le32) (x)) argument
37 #define __constant_cpu_to_le16(x) ((__force __le16) (__u16) (x)) argument
38 #define __constant_le16_to_cpu(x) ((__force __u16) (__le16) (x)) argument
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Dbig_endian.h29 #define __constant_htonl(x) ((__force __be32) (__u32) (x)) argument
30 #define __constant_ntohl(x) ((__force __u32) (__be32) (x)) argument
31 #define __constant_htons(x) ((__force __be16) (__u16) (x)) argument
32 #define __constant_ntohs(x) ((__force __u16) (__be16) (x)) argument
33 #define __constant_cpu_to_le64(x) ((__force __le64) ___constant_swab64((x))) argument
34 #define __constant_le64_to_cpu(x) ___constant_swab64((__force __u64) (__le64) (x)) argument
35 #define __constant_cpu_to_le32(x) ((__force __le32) ___constant_swab32((x))) argument
36 #define __constant_le32_to_cpu(x) ___constant_swab32((__force __u32) (__le32) (x)) argument
37 #define __constant_cpu_to_le16(x) ((__force __le16) ___constant_swab16((x))) argument
38 #define __constant_le16_to_cpu(x) ___constant_swab16((__force __u16) (__le16) (x)) argument
[all …]
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/byteorder/
Dlittle_endian.h29 #define __constant_htonl(x) ((__force __be32) ___constant_swab32((x))) argument
30 #define __constant_ntohl(x) ___constant_swab32((__force __be32) (x)) argument
31 #define __constant_htons(x) ((__force __be16) ___constant_swab16((x))) argument
32 #define __constant_ntohs(x) ___constant_swab16((__force __be16) (x)) argument
33 #define __constant_cpu_to_le64(x) ((__force __le64) (__u64) (x)) argument
34 #define __constant_le64_to_cpu(x) ((__force __u64) (__le64) (x)) argument
35 #define __constant_cpu_to_le32(x) ((__force __le32) (__u32) (x)) argument
36 #define __constant_le32_to_cpu(x) ((__force __u32) (__le32) (x)) argument
37 #define __constant_cpu_to_le16(x) ((__force __le16) (__u16) (x)) argument
38 #define __constant_le16_to_cpu(x) ((__force __u16) (__le16) (x)) argument
[all …]
Dbig_endian.h29 #define __constant_htonl(x) ((__force __be32) (__u32) (x)) argument
30 #define __constant_ntohl(x) ((__force __u32) (__be32) (x)) argument
31 #define __constant_htons(x) ((__force __be16) (__u16) (x)) argument
32 #define __constant_ntohs(x) ((__force __u16) (__be16) (x)) argument
33 #define __constant_cpu_to_le64(x) ((__force __le64) ___constant_swab64((x))) argument
34 #define __constant_le64_to_cpu(x) ___constant_swab64((__force __u64) (__le64) (x)) argument
35 #define __constant_cpu_to_le32(x) ((__force __le32) ___constant_swab32((x))) argument
36 #define __constant_le32_to_cpu(x) ___constant_swab32((__force __u32) (__le32) (x)) argument
37 #define __constant_cpu_to_le16(x) ((__force __le16) ___constant_swab16((x))) argument
38 #define __constant_le16_to_cpu(x) ___constant_swab16((__force __u16) (__le16) (x)) argument
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