| /kernel/linux/linux-5.10/drivers/net/ethernet/qlogic/qed/ |
| D | qed_init_ops.c | 25 0,
26 0,
27 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
28 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
29 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
30 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
31 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
32 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
33 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
34 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/ethernet/qlogic/qed/ |
| D | qed_init_ops.c | 26 0,
27 0,
28 0x1c02, /* win 2: addr=0x1c02000, size=4096 bytes */
29 0x1c80, /* win 3: addr=0x1c80000, size=4096 bytes */
30 0x1d00, /* win 4: addr=0x1d00000, size=4096 bytes */
31 0x1d01, /* win 5: addr=0x1d01000, size=4096 bytes */
32 0x1d02, /* win 6: addr=0x1d02000, size=4096 bytes */
33 0x1d80, /* win 7: addr=0x1d80000, size=4096 bytes */
34 0x1d81, /* win 8: addr=0x1d81000, size=4096 bytes */
35 0x1d82, /* win 9: addr=0x1d82000, size=4096 bytes */
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/mach-orion5x/ |
| D | ts209-setup.c | 29 #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
38 * [2] 0x00000000-0x00200000 : "Kernel"
39 * [3] 0x00200000-0x00600000 : "RootFS1"
40 * [4] 0x00600000-0x00700000 : "RootFS2"
41 * [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
42 * [5] 0x00760000-0x00780000 : "U-Boot Config"
43 * [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
48 .size = 0x00080000,
49 .offset = 0x00780000,
53 .size = 0x00200000,
[all …]
|
| D | ts409-setup.c | 40 * - RTC S35390A (@0x30) on I2C bus
49 #define QNAP_TS409_NOR_BOOT_BASE 0xff800000
58 * [2] 0x00000000-0x00200000 : "Kernel"
59 * [3] 0x00200000-0x00600000 : "RootFS1"
60 * [4] 0x00600000-0x00700000 : "RootFS2"
61 * [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
62 * [5] 0x00760000-0x00780000 : "U-Boot Config"
63 * [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
68 .size = 0x00080000,
69 .offset = 0x00780000,
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/mach-orion5x/ |
| D | ts209-setup.c | 29 #define QNAP_TS209_NOR_BOOT_BASE 0xf4000000
38 * [2] 0x00000000-0x00200000 : "Kernel"
39 * [3] 0x00200000-0x00600000 : "RootFS1"
40 * [4] 0x00600000-0x00700000 : "RootFS2"
41 * [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
42 * [5] 0x00760000-0x00780000 : "U-Boot Config"
43 * [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
48 .size = 0x00080000,
49 .offset = 0x00780000,
53 .size = 0x00200000,
[all …]
|
| D | ts409-setup.c | 40 * - RTC S35390A (@0x30) on I2C bus
49 #define QNAP_TS409_NOR_BOOT_BASE 0xff800000
58 * [2] 0x00000000-0x00200000 : "Kernel"
59 * [3] 0x00200000-0x00600000 : "RootFS1"
60 * [4] 0x00600000-0x00700000 : "RootFS2"
61 * [6] 0x00700000-0x00760000 : "NAS Config" (read-only)
62 * [5] 0x00760000-0x00780000 : "U-Boot Config"
63 * [1] 0x00780000-0x00800000 : "U-Boot" (read-only)
68 .size = 0x00080000,
69 .offset = 0x00780000,
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/nvmem/ |
| D | qcom,qfprom.yaml | 64 reg = <0 0x00784000 0 0x8ff>,
65 <0 0x00780000 0 0x7a0>,
66 <0 0x00782000 0 0x100>,
67 <0 0x00786000 0 0x1fff>;
76 reg = <0x25b 0x1>;
89 reg = <0 0x00784000 0 0x8ff>;
94 reg = <0x1eb 0x1>;
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/nvmem/ |
| D | qcom,qfprom.yaml | 88 reg = <0 0x00784000 0 0x8ff>,
89 <0 0x00780000 0 0x7a0>,
90 <0 0x00782000 0 0x100>,
91 <0 0x00786000 0 0x1fff>;
100 reg = <0x25b 0x1>;
113 reg = <0 0x00784000 0 0x8ff>;
118 reg = <0x1eb 0x1>;
|
| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/ |
| D | mucmc52.dts | 78 phy0: ethernet-phy@0 {
80 reg = <0>;
91 reg = <0x2c>;
95 reg = <0x51>;
101 interrupt-map-mask = <0xf800 0 0 7>;
103 /* IDSEL 0x10 */
104 0x8000 0 0 1 &mpc5200_pic 0 3 3
105 0x8000 0 0 2 &mpc5200_pic 0 3 3
106 0x8000 0 0 3 &mpc5200_pic 0 2 3
107 0x8000 0 0 4 &mpc5200_pic 0 1 3
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/ |
| D | mucmc52.dts | 78 phy0: ethernet-phy@0 {
80 reg = <0>;
91 reg = <0x2c>;
95 reg = <0x51>;
101 interrupt-map-mask = <0xf800 0 0 7>;
103 /* IDSEL 0x10 */
104 0x8000 0 0 1 &mpc5200_pic 0 3 3
105 0x8000 0 0 2 &mpc5200_pic 0 3 3
106 0x8000 0 0 3 &mpc5200_pic 0 2 3
107 0x8000 0 0 4 &mpc5200_pic 0 1 3
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | am335x-igep0033.dtsi | 15 cpu@0 {
22 reg = <0x80000000 0x10000000>; /* 256 MB */
27 pinctrl-0 = <&leds_pins>;
103 ethphy0: ethernet-phy@0 {
104 reg = <0>;
130 pinctrl-0 = <&nandflash_pins>;
132 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
134 nand@0,0 {
136 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
138 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
[all …]
|
| D | sam9x60.dtsi | 36 #size-cells = <0>;
38 cpu@0 {
41 reg = <0>;
47 reg = <0x20000000 0x10000000>;
53 #clock-cells = <0>;
58 #clock-cells = <0>;
64 reg = <0x00300000 0x100000>;
67 ranges = <0 0x00300000 0x100000>;
78 #size-cells = <0>;
80 reg = <0x00500000 0x100000
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/ti/omap/ |
| D | am335x-igep0033.dtsi | 15 cpu@0 {
22 reg = <0x80000000 0x10000000>; /* 256 MB */
27 pinctrl-0 = <&leds_pins>;
102 ethphy0: ethernet-phy@0 {
103 reg = <0>;
130 pinctrl-0 = <&nandflash_pins>;
132 ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */
134 nand@0,0 {
136 reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
138 interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
[all …]
|
| /kernel/linux/linux-6.6/arch/powerpc/include/asm/nohash/ |
| D | mmu-e500.h | 9 #define BOOK3E_PAGESZ_1K 0
44 #define MAS0_TLBSEL_MASK 0x30000000
49 #define MAS0_ESEL_MASK 0x0FFF0000
52 #define MAS0_NV(x) ((x) & 0x00000FFF)
53 #define MAS0_HES 0x00004000
54 #define MAS0_WQ_ALLWAYS 0x00000000
55 #define MAS0_WQ_COND 0x00001000
56 #define MAS0_WQ_CLR_RSRV 0x00002000
58 #define MAS1_VALID 0x80000000
59 #define MAS1_IPROT 0x40000000
[all …]
|
| /kernel/linux/linux-5.10/arch/powerpc/include/asm/nohash/ |
| D | mmu-book3e.h | 9 #define BOOK3E_PAGESZ_1K 0
44 #define MAS0_TLBSEL_MASK 0x30000000
49 #define MAS0_ESEL_MASK 0x0FFF0000
52 #define MAS0_NV(x) ((x) & 0x00000FFF)
53 #define MAS0_HES 0x00004000
54 #define MAS0_WQ_ALLWAYS 0x00000000
55 #define MAS0_WQ_COND 0x00001000
56 #define MAS0_WQ_CLR_RSRV 0x00002000
58 #define MAS1_VALID 0x80000000
59 #define MAS1_IPROT 0x40000000
[all …]
|
| /kernel/linux/linux-5.10/drivers/gpu/drm/radeon/ |
| D | radeon_combios.c | 138 uint16_t offset = 0, check_offset; in combios_get_table_offset()
141 return 0; in combios_get_table_offset()
146 check_offset = 0xc; in combios_get_table_offset()
149 check_offset = 0x14; in combios_get_table_offset()
152 check_offset = 0x2a; in combios_get_table_offset()
155 check_offset = 0x2c; in combios_get_table_offset()
158 check_offset = 0x2e; in combios_get_table_offset()
161 check_offset = 0x30; in combios_get_table_offset()
164 check_offset = 0x32; in combios_get_table_offset()
167 check_offset = 0x34; in combios_get_table_offset()
[all …]
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/radeon/ |
| D | radeon_combios.c | 134 uint16_t offset = 0, check_offset; in combios_get_table_offset()
137 return 0; in combios_get_table_offset()
142 check_offset = 0xc; in combios_get_table_offset()
145 check_offset = 0x14; in combios_get_table_offset()
148 check_offset = 0x2a; in combios_get_table_offset()
151 check_offset = 0x2c; in combios_get_table_offset()
154 check_offset = 0x2e; in combios_get_table_offset()
157 check_offset = 0x30; in combios_get_table_offset()
160 check_offset = 0x32; in combios_get_table_offset()
163 check_offset = 0x34; in combios_get_table_offset()
[all …]
|
| /kernel/linux/linux-6.6/drivers/rapidio/devices/ |
| D | tsi721.h | 13 DBG_NONE = 0,
14 DBG_INIT = BIT(0), /* driver init */
26 DBG_ALL = ~0,
36 } while (0)
53 #define DEFAULT_HOPCOUNT 0xff
54 #define DEFAULT_DESTID 0xff
57 #define PCI_DEVICE_ID_TSI721 0x80ab
59 #define BAR_0 0
67 #define TSI721_MAINT_WIN 0 /* Window for outbound maintenance requests */
68 #define IDB_QUEUE 0 /* Inbound Doorbell Queue to use */
[all …]
|
| /kernel/linux/linux-5.10/drivers/rapidio/devices/ |
| D | tsi721.h | 13 DBG_NONE = 0,
14 DBG_INIT = BIT(0), /* driver init */
26 DBG_ALL = ~0,
36 } while (0)
53 #define DEFAULT_HOPCOUNT 0xff
54 #define DEFAULT_DESTID 0xff
57 #define PCI_DEVICE_ID_TSI721 0x80ab
59 #define BAR_0 0
67 #define TSI721_MAINT_WIN 0 /* Window for outbound maintenance requests */
68 #define IDB_QUEUE 0 /* Inbound Doorbell Queue to use */
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | sdm630.dtsi | 22 #clock-cells = <0>;
29 #clock-cells = <0>;
37 #size-cells = <0>;
42 reg = <0x0 0x100>;
61 reg = <0x0 0x101>;
76 reg = <0x0 0x102>;
91 reg = <0x0 0x103>;
103 CPU4: cpu@0 {
106 reg = <0x0 0x0>;
125 reg = <0x0 0x1>;
[all …]
|
| /kernel/linux/linux-6.6/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
|
| /kernel/linux/linux-5.10/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
|
| /kernel/linux/linux-6.6/drivers/net/wireless/ath/ath9k/ |
| D | ar9003_phy.h | 23 #define AR_CHAN_BASE 0x9800
25 #define AR_PHY_TIMING1 (AR_CHAN_BASE + 0x0)
26 #define AR_PHY_TIMING2 (AR_CHAN_BASE + 0x4)
27 #define AR_PHY_TIMING3 (AR_CHAN_BASE + 0x8)
28 #define AR_PHY_TIMING4 (AR_CHAN_BASE + 0xc)
29 #define AR_PHY_TIMING5 (AR_CHAN_BASE + 0x10)
30 #define AR_PHY_TIMING6 (AR_CHAN_BASE + 0x14)
31 #define AR_PHY_TIMING11 (AR_CHAN_BASE + 0x18)
32 #define AR_PHY_SPUR_REG (AR_CHAN_BASE + 0x1c)
33 #define AR_PHY_RX_IQCAL_CORR_B0 (AR_CHAN_BASE + 0xdc)
[all …]
|
| /kernel/linux/linux-5.10/drivers/net/wireless/ath/ath9k/ |
| D | ar9003_phy.h | 23 #define AR_CHAN_BASE 0x9800
25 #define AR_PHY_TIMING1 (AR_CHAN_BASE + 0x0)
26 #define AR_PHY_TIMING2 (AR_CHAN_BASE + 0x4)
27 #define AR_PHY_TIMING3 (AR_CHAN_BASE + 0x8)
28 #define AR_PHY_TIMING4 (AR_CHAN_BASE + 0xc)
29 #define AR_PHY_TIMING5 (AR_CHAN_BASE + 0x10)
30 #define AR_PHY_TIMING6 (AR_CHAN_BASE + 0x14)
31 #define AR_PHY_TIMING11 (AR_CHAN_BASE + 0x18)
32 #define AR_PHY_SPUR_REG (AR_CHAN_BASE + 0x1c)
33 #define AR_PHY_RX_IQCAL_CORR_B0 (AR_CHAN_BASE + 0xdc)
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/boot/dts/microchip/ |
| D | sam9x60.dtsi | 37 #size-cells = <0>;
39 cpu@0 {
42 reg = <0>;
48 reg = <0x20000000 0x10000000>;
54 #clock-cells = <0>;
59 #clock-cells = <0>;
65 reg = <0x00300000 0x100000>;
68 ranges = <0 0x00300000 0x100000>;
79 #size-cells = <0>;
81 reg = <0x00500000 0x100000
[all …]
|