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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Doxnas-nand.txt17 reg = <0x41000000 0x100000>;
21 #size-cells = <0>;
23 nand@0 {
24 reg = <0>;
30 partition@0 {
32 reg = <0x00000000 0x00e00000>;
38 reg = <0x00e00000 0x07200000>;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dox820-cloudengines-pogoplug-series-3.dts23 reg = <0x60000000 0x8000000>;
37 gpios = <&gpio0 2 0>;
59 pinctrl-0 = <&pinctrl_uart0>;
66 pinctrl-0 = <&pinctrl_nand>;
68 nand@0 {
69 reg = <0>;
75 partition@0 {
77 reg = <0x00000000 0x00e00000>;
83 reg = <0x00e00000 0x07200000>;
92 pinctrl-0 = <&pinctrl_etha_mdio>;
/kernel/linux/linux-5.10/arch/arm/mach-pxa/include/mach/
Dballoon3.h25 #define BALLOON3_FPGA_VIRT IOMEM(0xf1000000) /* as per balloon2 */
26 #define BALLOON3_FPGA_LENGTH 0x01000000
28 #define BALLOON3_FPGA_SETnCLR (0x1000)
31 #define BALLOON3_CF_STATUS_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
32 #define BALLOON3_CF_CONTROL_REG (BALLOON3_FPGA_VIRT + 0x00e00008)
34 #define BALLOON3_FPGA_VER (BALLOON3_FPGA_VIRT + 0x00e0001c)
36 #define BALLOON3_NAND_BASE (PXA_CS4_PHYS + 0x00e00000)
37 #define BALLOON3_NAND_IO_REG (BALLOON3_FPGA_VIRT + 0x00e00000)
38 #define BALLOON3_NAND_CONTROL2_REG (BALLOON3_FPGA_VIRT + 0x00e00010)
39 #define BALLOON3_NAND_STAT_REG (BALLOON3_FPGA_VIRT + 0x00e00014)
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/rockchip/
Drk3588.dtsi12 reg = <0x0 0xfd5b8000 0x0 0x10000>;
17 reg = <0x0 0xfd5c0000 0x0 0x100>;
22 reg = <0x0 0xfddc8000 0x0 0x1000>;
23 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH 0>;
33 #sound-dai-cells = <0>;
39 reg = <0x0 0xfddf4000 0x0 0x1000>;
40 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH 0>;
50 #sound-dai-cells = <0>;
56 reg = <0x0 0xfddf8000 0x0 0x1000>;
57 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH 0>;
[all …]
/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dp1023rdb.dts56 size = <0 0x1000000>;
57 alignment = <0 0x1000000>;
60 size = <0 0x400000>;
61 alignment = <0 0x400000>;
64 size = <0 0x2000000>;
65 alignment = <0 0x2000000>;
70 ranges = <0x0 0xf 0xff000000 0x200000>;
74 ranges = <0x0 0xf 0xff200000 0x200000>;
78 ranges = <0x0 0x0 0xff600000 0x200000>;
83 reg = <0x53>;
[all …]
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dp1023rdb.dts56 size = <0 0x1000000>;
57 alignment = <0 0x1000000>;
60 size = <0 0x400000>;
61 alignment = <0 0x400000>;
64 size = <0 0x2000000>;
65 alignment = <0 0x2000000>;
70 ranges = <0x0 0xf 0xff000000 0x200000>;
74 ranges = <0x0 0xf 0xff200000 0x200000>;
78 ranges = <0x0 0x0 0xff600000 0x200000>;
83 reg = <0x53>;
[all …]
/kernel/linux/linux-6.6/arch/microblaze/include/asm/
Dpvr.h13 #define PVR_MSR_BIT 0x400
22 #define PVR0_PVR_FULL_MASK 0x80000000
23 #define PVR0_USE_BARREL_MASK 0x40000000
24 #define PVR0_USE_DIV_MASK 0x20000000
25 #define PVR0_USE_HW_MUL_MASK 0x10000000
26 #define PVR0_USE_FPU_MASK 0x08000000
27 #define PVR0_USE_EXC_MASK 0x04000000
28 #define PVR0_USE_ICACHE_MASK 0x02000000
29 #define PVR0_USE_DCACHE_MASK 0x01000000
30 #define PVR0_USE_MMU 0x00800000
[all …]
/kernel/linux/linux-5.10/arch/microblaze/include/asm/
Dpvr.h13 #define PVR_MSR_BIT 0x400
22 #define PVR0_PVR_FULL_MASK 0x80000000
23 #define PVR0_USE_BARREL_MASK 0x40000000
24 #define PVR0_USE_DIV_MASK 0x20000000
25 #define PVR0_USE_HW_MUL_MASK 0x10000000
26 #define PVR0_USE_FPU_MASK 0x08000000
27 #define PVR0_USE_EXC_MASK 0x04000000
28 #define PVR0_USE_ICACHE_MASK 0x02000000
29 #define PVR0_USE_DCACHE_MASK 0x01000000
30 #define PVR0_USE_MMU 0x00800000
[all …]
/kernel/linux/linux-6.6/arch/sh/include/mach-common/mach/
Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/
Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/
Dyellow_carp_offset.h19 static const struct IP_BASE ACP_BASE = { { { { 0x02403800, 0x00480000, 0, 0, 0, 0 } },
20 { { 0, 0, 0, 0, 0, 0 } },
21 { { 0, 0, 0, 0, 0, 0 } },
22 { { 0, 0, 0, 0, 0, 0 } },
23 { { 0, 0, 0, 0, 0, 0 } },
24 { { 0, 0, 0, 0, 0, 0 } },
25 { { 0, 0, 0, 0, 0, 0 } } } };
26 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x00013300, 0x02408C00, 0, 0, 0 } },
27 { { 0, 0, 0, 0, 0, 0 } },
28 { { 0, 0, 0, 0, 0, 0 } },
[all …]
Dnavi14_ip_offset.h39 static const struct IP_BASE ATHUB_BASE ={ { { { 0x00000C00, 0x02408C00, 0, 0, 0 } },
40 { { 0, 0, 0, 0, 0 } },
41 { { 0, 0, 0, 0, 0 } },
42 { { 0, 0, 0, 0, 0 } },
43 { { 0, 0, 0, 0, 0 } },
44 { { 0, 0, 0, 0, 0 } },
45 { { 0, 0, 0, 0, 0 } } } };
46 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x02401800, 0, 0, 0 } },
47 { { 0x00016E00, 0x02401C00, 0, 0, 0 } },
48 { { 0x00017000, 0x02402000, 0, 0, 0 } },
[all …]
Dsienna_cichlid_ip_offset.h39 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x02408C00, 0, 0, 0 } },
40 { { 0, 0, 0, 0, 0 } },
41 { { 0, 0, 0, 0, 0 } },
42 { { 0, 0, 0, 0, 0 } },
43 { { 0, 0, 0, 0, 0 } },
44 { { 0, 0, 0, 0, 0 } },
45 { { 0, 0, 0, 0, 0 } } } };
46 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0 } },
47 { { 0x00016E00, 0x02401C00, 0, 0, 0 } },
48 { { 0x00017000, 0x02402000, 0, 0, 0 } },
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dintel,keembay-pcie.yaml79 reg = <0x37000000 0x00001000>,
80 <0x37300000 0x00001000>,
81 <0x36e00000 0x00200000>,
82 <0x37800000 0x00000200>;
87 ranges = <0x02000000 0 0x36000000 0x36000000 0 0x00e00000>;
/kernel/linux/linux-6.6/sound/soc/mxs/
Dmxs-saif.h10 #define SAIF_CTRL 0x0
11 #define SAIF_STAT 0x10
12 #define SAIF_DATA 0x20
13 #define SAIF_VERSION 0X30
16 #define BM_SAIF_CTRL_SFTRST 0x80000000
17 #define BM_SAIF_CTRL_CLKGATE 0x40000000
19 #define BM_SAIF_CTRL_BITCLK_MULT_RATE 0x38000000
22 #define BM_SAIF_CTRL_BITCLK_BASE_RATE 0x04000000
23 #define BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN 0x02000000
24 #define BM_SAIF_CTRL_FIFO_SERVICE_IRQ_EN 0x01000000
[all …]
/kernel/linux/linux-5.10/sound/soc/mxs/
Dmxs-saif.h10 #define SAIF_CTRL 0x0
11 #define SAIF_STAT 0x10
12 #define SAIF_DATA 0x20
13 #define SAIF_VERSION 0X30
16 #define BM_SAIF_CTRL_SFTRST 0x80000000
17 #define BM_SAIF_CTRL_CLKGATE 0x40000000
19 #define BM_SAIF_CTRL_BITCLK_MULT_RATE 0x38000000
22 #define BM_SAIF_CTRL_BITCLK_BASE_RATE 0x04000000
23 #define BM_SAIF_CTRL_FIFO_ERROR_IRQ_EN 0x02000000
24 #define BM_SAIF_CTRL_FIFO_SERVICE_IRQ_EN 0x01000000
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/marvell/
Darmada-xp-crs328-4c-20s-4s.dtsi11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
50 devbus,badr-skew-ps = <0>;
53 devbus,rd-setup-ps = <0>;
54 devbus,rd-hold-ps = <0>;
57 devbus,sync-enable = <0>;
83 flash@0 {
87 reg = <0>; /* Chip select 0 */
[all …]
Darmada-xp-crs326-24g-2s.dtsi11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
50 devbus,badr-skew-ps = <0>;
53 devbus,rd-setup-ps = <0>;
54 devbus,rd-hold-ps = <0>;
57 devbus,sync-enable = <0>;
83 flash@0 {
87 reg = <0>; /* Chip select 0 */
[all …]
Darmada-xp-crs305-1g-4s.dtsi11 * internal registers to 0xf1000000 (instead of the default
12 * 0xd0000000). The 0xf1000000 is the default used by the recent,
15 * left internal registers mapped at 0xd0000000. If you are in this
33 reg = <0 0x00000000 0 0x20000000>; /* 512 MB */
50 devbus,badr-skew-ps = <0>;
53 devbus,rd-setup-ps = <0>;
54 devbus,rd-hold-ps = <0>;
57 devbus,sync-enable = <0>;
83 flash@0 {
87 reg = <0>; /* Chip select 0 */
[all …]
/kernel/linux/linux-5.10/drivers/staging/rtl8712/
Drtl8712_xmit.h19 #define VO_QUEUE_INX 0
49 /*OFFSET 0*/
50 #define OFFSET_SZ (0)
56 #define TYPE_MSK (0x03000000)
59 #define PKT_OFFSET_SZ (0)
77 #define RSVD6_MSK (0x00E00000)
81 /*DWORD 0*/
/kernel/linux/linux-6.6/drivers/staging/rtl8712/
Drtl8712_xmit.h19 #define VO_QUEUE_INX 0
47 /*OFFSET 0*/
48 #define OFFSET_SZ (0)
54 #define TYPE_MSK (0x03000000)
57 #define PKT_OFFSET_SZ (0)
75 #define RSVD6_MSK (0x00E00000)
79 /*DWORD 0*/
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/
Dnavi14_ip_offset.h39 static const struct IP_BASE ATHUB_BASE ={ { { { 0x00000C00, 0x02408C00, 0, 0, 0 } },
40 { { 0, 0, 0, 0, 0 } },
41 { { 0, 0, 0, 0, 0 } },
42 { { 0, 0, 0, 0, 0 } },
43 { { 0, 0, 0, 0, 0 } },
44 { { 0, 0, 0, 0, 0 } },
45 { { 0, 0, 0, 0, 0 } } } };
46 static const struct IP_BASE CLK_BASE ={ { { { 0x00016C00, 0x02401800, 0, 0, 0 } },
47 { { 0x00016E00, 0x02401C00, 0, 0, 0 } },
48 { { 0x00017000, 0x02402000, 0, 0, 0 } },
[all …]
Dsienna_cichlid_ip_offset.h39 static const struct IP_BASE ATHUB_BASE = { { { { 0x00000C00, 0x02408C00, 0, 0, 0 } },
40 { { 0, 0, 0, 0, 0 } },
41 { { 0, 0, 0, 0, 0 } },
42 { { 0, 0, 0, 0, 0 } },
43 { { 0, 0, 0, 0, 0 } },
44 { { 0, 0, 0, 0, 0 } },
45 { { 0, 0, 0, 0, 0 } } } };
46 static const struct IP_BASE CLK_BASE = { { { { 0x00016C00, 0x02401800, 0, 0, 0 } },
47 { { 0x00016E00, 0x02401C00, 0, 0, 0 } },
48 { { 0x00017000, 0x02402000, 0, 0, 0 } },
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2-xmc.dts47 bootargs = "earlycon=uart8250,mmio32,0x66130000";
52 reg = <0x000000000 0x80000000 0x00000001 0x00000000>;
71 reg = <0x10>;
77 nandcs@0 {
79 reg = <0>;
88 partition@0 {
90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/northstar2/
Dns2-xmc.dts47 bootargs = "earlycon=uart8250,mmio32,0x66130000";
52 reg = <0x00000000 0x80000000 0x00000001 0x00000000>;
71 reg = <0x10>;
77 nandcs@0 {
79 reg = <0>;
88 partition@0 {
90 reg = <0x00000000 0x00280000>; /* 2.5MB */
96 reg = <0x00280000 0x00040000>; /* 0.25MB */
102 reg = <0x002c0000 0x00040000>; /* 0.25MB */
108 reg = <0x00300000 0x03d00000>; /* 61MB */
[all …]

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