| /kernel/linux/linux-6.6/drivers/clk/hisilicon/ |
| D | clk-hi3559a.c | 22 #define CRG_BASE_ADDR 0x18020000 62 { HI3559AV100_FIXED_1188M, "1188m", NULL, 0, 1188000000, }, 63 { HI3559AV100_FIXED_1000M, "1000m", NULL, 0, 1000000000, }, 64 { HI3559AV100_FIXED_842M, "842m", NULL, 0, 842000000, }, 65 { HI3559AV100_FIXED_792M, "792m", NULL, 0, 792000000, }, 66 { HI3559AV100_FIXED_750M, "750m", NULL, 0, 750000000, }, 67 { HI3559AV100_FIXED_710M, "710m", NULL, 0, 710000000, }, 68 { HI3559AV100_FIXED_680M, "680m", NULL, 0, 680000000, }, 69 { HI3559AV100_FIXED_667M, "667m", NULL, 0, 667000000, }, 70 { HI3559AV100_FIXED_631M, "631m", NULL, 0, 631000000, }, [all …]
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| /kernel/linux/linux-6.6/drivers/pinctrl/mediatek/ |
| D | pinctrl-mt8188.c | 13 * iocfg[0]:0x10005000, iocfg[1]:0x11c00000, iocfg[2]:0x11e10000, 14 * iocfg[3]:0x11e20000, iocfg[4]:0x11ea0000 20 32, 0) 27 PIN_FIELD(0, 177, 0x0300, 0x10, 0, 4), 31 PIN_FIELD(0, 177, 0x0000, 0x10, 0, 1), 35 PIN_FIELD(0, 177, 0x0200, 0x10, 0, 1), 39 PIN_FIELD(0, 177, 0x0100, 0x10, 0, 1), 43 PIN_FIELD_BASE(0, 0, 1, 0x0170, 0x10, 8, 1), 44 PIN_FIELD_BASE(1, 1, 1, 0x0170, 0x10, 9, 1), 45 PIN_FIELD_BASE(2, 2, 1, 0x0170, 0x10, 10, 1), [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/ |
| D | imx7ulp-pinfunc.h | 15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0 16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0 17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1 18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1 19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1 20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0 21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0 22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0 23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0 24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1 [all …]
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| D | imx6ul-pinfunc.h | 13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0 14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0 16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0 17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0 18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0 19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0 20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0 21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0 22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0 23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0 [all …]
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| D | imx6sll-pinfunc.h | 15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0 16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x0 17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0 18 #define MX6SLL_PAD_WDOG_B__GPIO3_IO18 0x0014 0x02DC 0x0000 0x5 0x0 19 #define MX6SLL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x0018 0x02E0 0x0000 0x0 0x0 20 #define MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x0018 0x02E0 0x068C 0x1 0x0 21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0 22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0 23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0 24 #define MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x0018 0x02E0 0x0000 0x5 0x0 [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | imx7ulp-pinfunc.h | 15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0 16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0 17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1 18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1 19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1 20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0 21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0 22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0 23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0 24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1 [all …]
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| D | imx6ul-pinfunc.h | 13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0 14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0 16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0 17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0 18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0 19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0 20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0 21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0 22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0 23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0 [all …]
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt8516-apmixedsys.c | 51 { .div = 0, .freq = MT8516_PLL_FMAX }, 60 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0, 61 21, 0x0104, 24, 0, 0x0104, 0), 62 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0, 63 HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0), 64 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000, 65 HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0), 66 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0, 67 21, 0x0164, 24, 0, 0x0164, 0, mmpll_div_table), 68 PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0, [all …]
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| D | clk-mt8167-apmixedsys.c | 50 { .div = 0, .freq = MT8167_PLL_FMAX }, 59 PLL(CLK_APMIXED_ARMPLL, "armpll", 0x0100, 0x0110, 0, 0, 60 21, 0x0104, 24, 0, 0x0104, 0), 61 PLL(CLK_APMIXED_MAINPLL, "mainpll", 0x0120, 0x0130, 0, 62 HAVE_RST_BAR, 21, 0x0124, 24, 0, 0x0124, 0), 63 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000, 64 HAVE_RST_BAR, 7, 0x0144, 24, 0, 0x0144, 0), 65 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0, 66 21, 0x0164, 24, 0, 0x0164, 0, mmpll_div_table), 67 PLL(CLK_APMIXED_APLL1, "apll1", 0x0180, 0x0190, 0, 0, [all …]
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| /kernel/linux/linux-6.6/arch/s390/boot/ |
| D | ipl_data.c | 15 psw_t32 ipl_psw; /* 0x0000 */ 16 struct ccw0 ccwpgm[2]; /* 0x0008 */ 17 u8 fill[56]; /* 0x0018 */ 18 struct ccw0 ccwpgmcc[20]; /* 0x0050 */ 19 u8 pad_0xf0[0x01a0-0x00f0]; /* 0x00f0 */ 20 psw_t restart_psw; /* 0x01a0 */ 21 psw_t external_new_psw; /* 0x01b0 */ 22 psw_t svc_new_psw; /* 0x01c0 */ 23 psw_t program_new_psw; /* 0x01d0 */ 24 psw_t mcck_new_psw; /* 0x01e0 */ [all …]
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| /kernel/linux/linux-5.10/drivers/mtd/nand/onenand/ |
| D | samsung.h | 12 #define MEM_CFG_OFFSET 0x0000 13 #define BURST_LEN_OFFSET 0x0010 14 #define MEM_RESET_OFFSET 0x0020 15 #define INT_ERR_STAT_OFFSET 0x0030 16 #define INT_ERR_MASK_OFFSET 0x0040 17 #define INT_ERR_ACK_OFFSET 0x0050 18 #define ECC_ERR_STAT_OFFSET 0x0060 19 #define MANUFACT_ID_OFFSET 0x0070 20 #define DEVICE_ID_OFFSET 0x0080 21 #define DATA_BUF_SIZE_OFFSET 0x0090 [all …]
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| /kernel/linux/linux-6.6/drivers/mtd/nand/onenand/ |
| D | samsung.h | 12 #define MEM_CFG_OFFSET 0x0000 13 #define BURST_LEN_OFFSET 0x0010 14 #define MEM_RESET_OFFSET 0x0020 15 #define INT_ERR_STAT_OFFSET 0x0030 16 #define INT_ERR_MASK_OFFSET 0x0040 17 #define INT_ERR_ACK_OFFSET 0x0050 18 #define ECC_ERR_STAT_OFFSET 0x0060 19 #define MANUFACT_ID_OFFSET 0x0070 20 #define DEVICE_ID_OFFSET 0x0080 21 #define DATA_BUF_SIZE_OFFSET 0x0090 [all …]
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| /kernel/linux/linux-6.6/arch/s390/include/asm/ |
| D | lowcore.h | 25 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ 26 __u32 ipl_parmblock_ptr; /* 0x0014 */ 27 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ 28 __u32 ext_params; /* 0x0080 */ 31 __u16 ext_cpu_addr; /* 0x0084 */ 32 __u16 ext_int_code; /* 0x0086 */ 36 __u32 svc_int_code; /* 0x0088 */ 39 __u16 pgm_ilc; /* 0x008c */ 40 __u16 pgm_code; /* 0x008e */ 44 __u32 data_exc_code; /* 0x0090 */ [all …]
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| /kernel/linux/linux-5.10/arch/s390/include/asm/ |
| D | lowcore.h | 21 __u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */ 22 __u32 ipl_parmblock_ptr; /* 0x0014 */ 23 __u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */ 24 __u32 ext_params; /* 0x0080 */ 25 __u16 ext_cpu_addr; /* 0x0084 */ 26 __u16 ext_int_code; /* 0x0086 */ 27 __u16 svc_ilc; /* 0x0088 */ 28 __u16 svc_code; /* 0x008a */ 29 __u16 pgm_ilc; /* 0x008c */ 30 __u16 pgm_code; /* 0x008e */ [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/ti/ |
| D | k3-am6548-iot2050-advanced-common.dtsi | 20 reg = <0x00000000 0x80000000 0x00000000 0x80000000>; 27 AM65X_IOPAD(0x01a8, PIN_INPUT_PULLDOWN, 0) /* (B25) MMC0_CLK */ 28 AM65X_IOPAD(0x01ac, PIN_INPUT_PULLUP, 0) /* (B27) MMC0_CMD */ 29 AM65X_IOPAD(0x01a4, PIN_INPUT_PULLUP, 0) /* (A26) MMC0_DAT0 */ 30 AM65X_IOPAD(0x01a0, PIN_INPUT_PULLUP, 0) /* (E25) MMC0_DAT1 */ 31 AM65X_IOPAD(0x019c, PIN_INPUT_PULLUP, 0) /* (C26) MMC0_DAT2 */ 32 AM65X_IOPAD(0x0198, PIN_INPUT_PULLUP, 0) /* (A25) MMC0_DAT3 */ 33 AM65X_IOPAD(0x0194, PIN_INPUT_PULLUP, 0) /* (E24) MMC0_DAT4 */ 34 AM65X_IOPAD(0x0190, PIN_INPUT_PULLUP, 0) /* (A24) MMC0_DAT5 */ 35 AM65X_IOPAD(0x018c, PIN_INPUT_PULLUP, 0) /* (B26) MMC0_DAT6 */ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | wm8903.txt | 21 default is 0. 28 performed. If any entry has the value 0xffffffff, that GPIO's 62 reg = <0x1a>; 73 micdet-cfg = <0>; 76 0x0600 /* DMIC_LR, output */ 77 0x0680 /* DMIC_DAT, input */ 78 0x0000 /* GPIO, output, low */ 79 0x0200 /* Interrupt, output */ 80 0x01a0 /* BCLK, input, active high */
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| /kernel/linux/linux-5.10/drivers/media/dvb-frontends/ |
| D | si2165_priv.h | 15 * possible values: 0x64,0x65,0x66,0x67 34 #define REG_CHIP_MODE 0x0000 35 #define REG_CHIP_REVCODE 0x0023 36 #define REV_CHIP_TYPE 0x0118 37 #define REG_CHIP_INIT 0x0050 38 #define REG_INIT_DONE 0x0054 39 #define REG_START_INIT 0x0096 40 #define REG_PLL_DIVL 0x00a0 41 #define REG_RST_ALL 0x00c0 42 #define REG_LOCK_TIMEOUT 0x00c4 [all …]
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| /kernel/linux/linux-6.6/drivers/media/dvb-frontends/ |
| D | si2165_priv.h | 15 * possible values: 0x64,0x65,0x66,0x67 34 #define REG_CHIP_MODE 0x0000 35 #define REG_CHIP_REVCODE 0x0023 36 #define REV_CHIP_TYPE 0x0118 37 #define REG_CHIP_INIT 0x0050 38 #define REG_INIT_DONE 0x0054 39 #define REG_START_INIT 0x0096 40 #define REG_PLL_DIVL 0x00a0 41 #define REG_RST_ALL 0x00c0 42 #define REG_LOCK_TIMEOUT 0x00c4 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | wlf,wm8903.yaml | 48 default: 0 63 If any entry has the value 0xffffffff, that GPIO's 91 #size-cells = <0>; 95 reg = <0x1a>; 106 micdet-cfg = <0>; 109 0x0600 /* DMIC_LR, output */ 110 0x0680 /* DMIC_DAT, input */ 111 0x0000 /* GPIO, output, low */ 112 0x0200 /* Interrupt, output */ 113 0x01a0 /* BCLK, input, active high */
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx93-pinfunc.h | 13 #define MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x01B0 0x03D8 0x0 0x0 14 #define MX93_PAD_DAP_TDI__MQS2_LEFT 0x0000 0x01B0 0x0000 0x1 0x0 15 #define MX93_PAD_DAP_TDI__CAN2_TX 0x0000 0x01B0 0x0000 0x3 0x0 16 #define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30 0x0000 0x01B0 0x0000 0x4 0x0 17 #define MX93_PAD_DAP_TDI__GPIO3_IO28 0x0000 0x01B0 0x0000 0x5 0x0 18 #define MX93_PAD_DAP_TDI__LPUART5_RX 0x0000 0x01B0 0x0430 0x6 0x0 19 #define MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x01B4 0x03DC 0x0 0x0 20 #define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31 0x0004 0x01B4 0x0000 0x4 0x0 21 #define MX93_PAD_DAP_TMS_SWDIO__GPIO3_IO29 0x0004 0x01B4 0x0000 0x5 0x0 22 #define MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 0x01B4 0x0000 0x6 0x0 [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/broadcom/b43/ |
| D | tables_phy_lcn.c | 30 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 31 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 32 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 33 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 34 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 35 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 36 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 37 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 38 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 39 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/broadcom/b43/ |
| D | tables_phy_lcn.c | 30 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 31 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 32 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 33 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 34 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 35 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 36 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 37 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 38 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 39 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, 0x014d, [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/ |
| D | nv40.c | 37 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma() 40 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv40_mpeg_mthd_dma() 44 if (!(dma0 & 0x00002000)) { in nv40_mpeg_mthd_dma() 50 if (mthd == 0x0190) { in nv40_mpeg_mthd_dma() 52 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); in nv40_mpeg_mthd_dma() 53 nvkm_wr32(device, 0x00b334, base); in nv40_mpeg_mthd_dma() 54 nvkm_wr32(device, 0x00b324, size); in nv40_mpeg_mthd_dma() 56 if (mthd == 0x01a0) { in nv40_mpeg_mthd_dma() 58 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); in nv40_mpeg_mthd_dma() 59 nvkm_wr32(device, 0x00b360, base); in nv40_mpeg_mthd_dma() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/ |
| D | nv40.c | 37 u32 dma0 = nvkm_instmem_rd32(imem, inst + 0); in nv40_mpeg_mthd_dma() 40 u32 base = (dma2 & 0xfffff000) | (dma0 >> 20); in nv40_mpeg_mthd_dma() 44 if (!(dma0 & 0x00002000)) { in nv40_mpeg_mthd_dma() 50 if (mthd == 0x0190) { in nv40_mpeg_mthd_dma() 52 nvkm_mask(device, 0x00b300, 0x00030000, (dma0 & 0x00030000)); in nv40_mpeg_mthd_dma() 53 nvkm_wr32(device, 0x00b334, base); in nv40_mpeg_mthd_dma() 54 nvkm_wr32(device, 0x00b324, size); in nv40_mpeg_mthd_dma() 56 if (mthd == 0x01a0) { in nv40_mpeg_mthd_dma() 58 nvkm_mask(device, 0x00b300, 0x000c0000, (dma0 & 0x00030000) << 2); in nv40_mpeg_mthd_dma() 59 nvkm_wr32(device, 0x00b360, base); in nv40_mpeg_mthd_dma() [all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/mediatek/mt76/ |
| D | sdio.h | 12 #define MCR_WCIR 0x0000 13 #define MCR_WHLPCR 0x0004 18 #define WHLPCR_INT_EN_SET BIT(0) 20 #define MCR_WSDIOCSR 0x0008 21 #define MCR_WHCR 0x000C 32 #define MCR_WHISR 0x0010 33 #define MCR_WHIER 0x0014 40 #define WHIER_TX_DONE_INT_EN BIT(0) 47 #define MCR_WASR 0x0020 48 #define MCR_WSICR 0x0024 [all …]
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