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/kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtw89/
Drtw8852c_rfk_table.c8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all …]
Drtw8852b_rfk_table.c8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
Drtw8851b_rfk_table.c8 RTW89_DECL_RFK_WM(0xc210, 0x003fc000, 0x80),
9 RTW89_DECL_RFK_WM(0xc224, 0x003fc000, 0x80),
10 RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x3),
11 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
12 RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0x1f),
13 RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x0),
14 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x0),
15 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1),
16 RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x0),
17 RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1),
[all …]
/kernel/linux/linux-6.6/drivers/clk/imx/
Dclk-pllv2.c17 #define MXC_PLL_DP_CTL 0x00
18 #define MXC_PLL_DP_CONFIG 0x04
19 #define MXC_PLL_DP_OP 0x08
20 #define MXC_PLL_DP_MFD 0x0C
21 #define MXC_PLL_DP_MFN 0x10
22 #define MXC_PLL_DP_MFNMINUS 0x14
23 #define MXC_PLL_DP_MFNPLUS 0x18
24 #define MXC_PLL_DP_HFS_OP 0x1C
25 #define MXC_PLL_DP_HFS_MFD 0x20
26 #define MXC_PLL_DP_HFS_MFN 0x24
[all …]
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-pllv2.c17 #define MXC_PLL_DP_CTL 0x00
18 #define MXC_PLL_DP_CONFIG 0x04
19 #define MXC_PLL_DP_OP 0x08
20 #define MXC_PLL_DP_MFD 0x0C
21 #define MXC_PLL_DP_MFN 0x10
22 #define MXC_PLL_DP_MFNMINUS 0x14
23 #define MXC_PLL_DP_MFNPLUS 0x18
24 #define MXC_PLL_DP_HFS_OP 0x1C
25 #define MXC_PLL_DP_HFS_MFD 0x20
26 #define MXC_PLL_DP_HFS_MFN 0x24
[all …]
/kernel/linux/linux-6.6/arch/powerpc/sysdev/
Ddart.h11 #define DART_CNTL 0
14 #define DART_EXCP_U3 0x10
16 #define DART_TAGS_U3 0x1000
19 #define DART_BASE_U4 0x10
20 #define DART_SIZE_U4 0x20
21 #define DART_EXCP_U4 0x30
22 #define DART_TAGS_U4 0x1000
27 #define DART_CNTL_U3_BASE_MASK 0xfffff
29 #define DART_CNTL_U3_FLUSHTLB 0x400
30 #define DART_CNTL_U3_ENABLE 0x200
[all …]
/kernel/linux/linux-5.10/arch/powerpc/sysdev/
Ddart.h11 #define DART_CNTL 0
14 #define DART_EXCP_U3 0x10
16 #define DART_TAGS_U3 0x1000
19 #define DART_BASE_U4 0x10
20 #define DART_SIZE_U4 0x20
21 #define DART_EXCP_U4 0x30
22 #define DART_TAGS_U4 0x1000
27 #define DART_CNTL_U3_BASE_MASK 0xfffff
29 #define DART_CNTL_U3_FLUSHTLB 0x400
30 #define DART_CNTL_U3_ENABLE 0x200
[all …]
/kernel/linux/linux-6.6/arch/sh/include/mach-common/mach/
Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/kernel/linux/linux-5.10/arch/sh/include/mach-common/mach/
Dsh7785lcr.h11 * 0x00000000 - 0x03ffffff(CS0) | NOR Flash | NOR Flash
12 * 0x04000000 - 0x05ffffff(CS1) | PLD | PLD
13 * 0x06000000 - 0x07ffffff(CS1) | I2C | I2C
14 * 0x08000000 - 0x0bffffff(CS2) | USB | DDR SDRAM
15 * 0x0c000000 - 0x0fffffff(CS3) | SD | DDR SDRAM
16 * 0x10000000 - 0x13ffffff(CS4) | SM107 | SM107
17 * 0x14000000 - 0x17ffffff(CS5) | reserved | USB
18 * 0x18000000 - 0x1bffffff(CS6) | reserved | SD
19 * 0x40000000 - 0x5fffffff | DDR SDRAM | (cannot use)
23 #define NOR_FLASH_ADDR 0x00000000
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/watchdog/
Dsnps,dw-wdt.yaml52 default: [0x0001000 0x0002000 0x0004000 0x0008000
53 0x0010000 0x0020000 0x0040000 0x0080000
54 0x0100000 0x0200000 0x0400000 0x0800000
55 0x1000000 0x2000000 0x4000000 0x8000000]
70 reg = <0xffd02000 0x1000>;
71 interrupts = <0 171 4>;
79 reg = <0xffd02000 0x1000>;
80 interrupts = <0 171 4>;
83 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
84 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/watchdog/
Dsnps,dw-wdt.yaml69 default: [0x0001000 0x0002000 0x0004000 0x0008000
70 0x0010000 0x0020000 0x0040000 0x0080000
71 0x0100000 0x0200000 0x0400000 0x0800000
72 0x1000000 0x2000000 0x4000000 0x8000000]
87 reg = <0xffd02000 0x1000>;
88 interrupts = <0 171 4>;
96 reg = <0xffd02000 0x1000>;
97 interrupts = <0 171 4>;
100 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
101 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/kernel/linux/linux-5.10/drivers/edac/
Dmv64x60_edac.h15 #define MV64x60_REVISION " Ver: 2.0.0"
25 #define MV64x60_CPU_ERR_ADDR_LO 0x00 /* 0x0070 */
26 #define MV64x60_CPU_ERR_ADDR_HI 0x08 /* 0x0078 */
27 #define MV64x60_CPU_ERR_DATA_LO 0x00 /* 0x0128 */
28 #define MV64x60_CPU_ERR_DATA_HI 0x08 /* 0x0130 */
29 #define MV64x60_CPU_ERR_PARITY 0x10 /* 0x0138 */
30 #define MV64x60_CPU_ERR_CAUSE 0x18 /* 0x0140 */
31 #define MV64x60_CPU_ERR_MASK 0x20 /* 0x0148 */
33 #define MV64x60_CPU_CAUSE_MASK 0x07ffffff
36 #define MV64X60_SRAM_ERR_CAUSE 0x08 /* 0x0388 */
[all …]
/kernel/linux/linux-5.10/drivers/scsi/
Dgvp11.c43 static int gvp11_xfer_mask = 0;
59 static int scsi_alloc_out_of_range = 0; in dma_setup()
63 wh->dma_bounce_len = (cmd->SCp.this_residual + 511) & ~0x1ff; in dma_setup()
78 wh->dma_bounce_len = 0; in dma_setup()
102 wh->dma_bounce_len = 0; in dma_setup()
135 bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0; in dma_setup()
143 return 0; in dma_setup()
170 wh->dma_bounce_len = 0; in dma_stop()
215 if (q & 0x08) /* bit 3 should always be clear */ in check_wd33c93()
226 if (*scmd_3393 != q) /* and so should the image at 0x1f */ in check_wd33c93()
[all …]
/kernel/linux/linux-6.6/drivers/scsi/
Dgvp11.c33 #define TO_DMA_MASK(m) (~((unsigned long long)m & 0xffffffff))
51 static int gvp11_xfer_mask = 0;
64 static int scsi_alloc_out_of_range = 0; in dma_setup()
83 wh->dma_bounce_len = (scsi_pointer->this_residual + 511) & ~0x1ff; in dma_setup()
98 wh->dma_bounce_len = 0; in dma_setup()
144 wh->dma_bounce_len = 0; in dma_setup()
175 bank_mask = (~wh->dma_xfer_mask >> 18) & 0x01c0; in dma_setup()
183 return 0; in dma_setup()
216 wh->dma_bounce_len = 0; in dma_stop()
262 if (q & 0x08) /* bit 3 should always be clear */ in check_wd33c93()
[all …]
/kernel/linux/linux-6.6/arch/powerpc/include/asm/
Ddbell.h19 #define PPC_DBELL_MSG_BRDCAST (0x04000000)
20 #define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
21 #define PPC_DBELL_TYPE_MASK PPC_DBELL_TYPE(0xf)
23 #define PPC_DBELL_PIR_MASK 0x3fff
25 PPC_DBELL = 0, /* doorbell */
39 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSND(%1), PPC_MSGSNDP(%1), %0) in _ppc_msgsnd()
53 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSYNC " ; lwsync", "", %0) in ppc_msgsync()
59 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGCLR(%1), PPC_MSGCLRP(%1), %0) in _ppc_msgclr()
76 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); in _ppc_msgsnd()
97 (tag & 0x07ffffff); in ppc_msgsnd()
[all …]
/kernel/linux/linux-5.10/arch/powerpc/include/asm/
Ddbell.h19 #define PPC_DBELL_MSG_BRDCAST (0x04000000)
20 #define PPC_DBELL_TYPE(x) (((x) & 0xf) << (63-36))
21 #define PPC_DBELL_TYPE_MASK PPC_DBELL_TYPE(0xf)
23 #define PPC_DBELL_PIR_MASK 0x3fff
25 PPC_DBELL = 0, /* doorbell */
39 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSND(%1), PPC_MSGSNDP(%1), %0) in _ppc_msgsnd()
53 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGSYNC " ; lwsync", "", %0) in ppc_msgsync()
59 __asm__ __volatile__ (ASM_FTR_IFSET(PPC_MSGCLR(%1), PPC_MSGCLRP(%1), %0) in _ppc_msgclr()
76 __asm__ __volatile__ (PPC_MSGSND(%0) : : "r" (msg)); in _ppc_msgsnd()
97 (tag & 0x07ffffff); in ppc_msgsnd()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Dsi.c59 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
60 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
61 mmDB_DEBUG, 0xffffffff, 0x00000000,
62 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
63 mmDB_DEBUG3, 0x0002021c, 0x00020200,
64 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
65 0x340c, 0x000000c0, 0x00800040,
66 0x360c, 0x000000c0, 0x00800040,
67 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
68 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
/kernel/linux/linux-5.10/drivers/media/platform/ti-vpe/
Dsc.h13 #define CFG_SC0 0x0
14 #define CFG_INTERLACE_O (1 << 0)
30 #define CFG_SC1 0x4
31 #define CFG_ROW_ACC_INC_MASK 0x07ffffff
32 #define CFG_ROW_ACC_INC_SHIFT 0
34 #define CFG_SC2 0x08
35 #define CFG_ROW_ACC_OFFSET_MASK 0x0fffffff
36 #define CFG_ROW_ACC_OFFSET_SHIFT 0
38 #define CFG_SC3 0x0c
39 #define CFG_ROW_ACC_OFFSET_B_MASK 0x0fffffff
[all …]
/kernel/linux/linux-6.6/drivers/media/platform/ti/vpe/
Dsc.h13 #define CFG_SC0 0x0
14 #define CFG_INTERLACE_O (1 << 0)
30 #define CFG_SC1 0x4
31 #define CFG_ROW_ACC_INC_MASK 0x07ffffff
32 #define CFG_ROW_ACC_INC_SHIFT 0
34 #define CFG_SC2 0x08
35 #define CFG_ROW_ACC_OFFSET_MASK 0x0fffffff
36 #define CFG_ROW_ACC_OFFSET_SHIFT 0
38 #define CFG_SC3 0x0c
39 #define CFG_ROW_ACC_OFFSET_B_MASK 0x0fffffff
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdgpu/
Dsi.c61 mmAZALIA_SCLK_CONTROL, 0x00000030, 0x00000011,
62 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
63 mmDB_DEBUG, 0xffffffff, 0x00000000,
64 mmDB_DEBUG2, 0xf00fffff, 0x00000400,
65 mmDB_DEBUG3, 0x0002021c, 0x00020200,
66 mmDCI_CLK_CNTL, 0x00000080, 0x00000000,
67 0x340c, 0x000000c0, 0x00800040,
68 0x360c, 0x000000c0, 0x00800040,
69 mmFBC_DEBUG_COMP, 0x000000f0, 0x00000070,
70 mmFBC_MISC, 0x00200000, 0x50100000,
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Dcarminefb_regs.h5 #define CARMINE_OVERLAY_EXT_MODE (0x00000002)
6 #define CARMINE_GRAPH_REG (0x00000000)
7 #define CARMINE_DISP0_REG (0x00100000)
8 #define CARMINE_DISP1_REG (0x00140000)
9 #define CARMINE_WB_REG (0x00180000)
10 #define CARMINE_DCTL_REG (0x00300000)
11 #define CARMINE_CTL_REG (0x00400000)
12 #define CARMINE_WINDOW_MODE (0x00000001)
19 #define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000)
20 #define CARMINE_DCTL_REG_MODE_ADD (0x00)
[all …]
/kernel/linux/linux-6.6/drivers/video/fbdev/
Dcarminefb_regs.h5 #define CARMINE_OVERLAY_EXT_MODE (0x00000002)
6 #define CARMINE_GRAPH_REG (0x00000000)
7 #define CARMINE_DISP0_REG (0x00100000)
8 #define CARMINE_DISP1_REG (0x00140000)
9 #define CARMINE_WB_REG (0x00180000)
10 #define CARMINE_DCTL_REG (0x00300000)
11 #define CARMINE_CTL_REG (0x00400000)
12 #define CARMINE_WINDOW_MODE (0x00000001)
19 #define CARMINE_EXT_CMODE_DIRECT24_RGBA (0xC0000000)
20 #define CARMINE_DCTL_REG_MODE_ADD (0x00)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dfaraday,ftpci100.txt9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
10 Technology) and product ID 0x4321.
23 - bus-range: set to <0x00 0xff>
45 - #address-cells: set to <0>
64 interrupt-map-mask = <0xf800 0 0 7>;
66 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
67 <0x4800 0 0 2 &pci_intc 1>,
68 <0x4800 0 0 3 &pci_intc 2>,
69 <0x4800 0 0 4 &pci_intc 3>,
70 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dfaraday,ftpci100.yaml18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
19 Technology) and product ID 0x4321.
34 interrupt-map-mask = <0xf800 0 0 7>;
36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
37 <0x4800 0 0 2 &pci_intc 1>,
38 <0x4800 0 0 3 &pci_intc 2>,
39 <0x4800 0 0 4 &pci_intc 3>,
40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
41 <0x5000 0 0 2 &pci_intc 2>,
42 <0x5000 0 0 3 &pci_intc 3>,
[all …]
/kernel/linux/linux-6.6/drivers/char/xilinx_hwicap/
Dxilinx_hwicap.h43 u32 write_buffer_in_use; /* Always in [0,3] */
45 u32 read_buffer_in_use; /* Always in [0,3] */
65 * Return 0 if successful.
70 * Return 0 if successful.
75 * D8 - 0 = configuration error
78 * D5 - 0 = abort in progress
101 #define XHI_PAD_FRAMES 0x1
104 #define XHI_WORD_COUNT_MASK_TYPE_1 0x7FFUL
105 #define XHI_WORD_COUNT_MASK_TYPE_2 0x1FFFFFUL
106 #define XHI_TYPE_MASK 0x7
[all …]

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