Searched +full:0 +full:x101b0000 (Results 1 – 9 of 9) sorted by relevance
56 reg = <0x101B0000 0x200>;64 pinctrl-0 = <&hdmi_cec>;
17 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */18 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */19 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */20 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */21 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */22 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */23 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */24 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */25 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */26 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */[all …]
30 #define NOMADIK_FSMC_BASE 0x10100000 /* FSMC registers */31 #define NOMADIK_SDRAMC_BASE 0x10110000 /* SDRAM Controller */32 #define NOMADIK_CLCDC_BASE 0x10120000 /* CLCD Controller */33 #define NOMADIK_MDIF_BASE 0x10120000 /* MDIF */34 #define NOMADIK_DMA0_BASE 0x10130000 /* DMA0 Controller */35 #define NOMADIK_IC_BASE 0x10140000 /* Vectored Irq Controller */36 #define NOMADIK_DMA1_BASE 0x10150000 /* DMA1 Controller */37 #define NOMADIK_USB_BASE 0x10170000 /* USB-OTG conf reg base */38 #define NOMADIK_CRYP_BASE 0x10180000 /* Crypto processor */39 #define NOMADIK_SHA1_BASE 0x10190000 /* SHA-1 Processor */[all …]
14 reg = <0x00000000 0x04000000>,15 <0x08000000 0x04000000>;20 reg = <0x10210000 0x1000>;37 reg = <0x101e2000 0x1000>;46 reg = <0x101e3000 0x1000>;55 reg = <0x101e4000 0x80>;62 gpio-bank = <0>;63 gpio-ranges = <&pinctrl 0 0 32>;69 reg = <0x101e5000 0x80>;77 gpio-ranges = <&pinctrl 0 32 32>;[all …]
51 #size-cells = <0>;53 cpu0: cpu@0 {56 reg = <0>;169 reg = <0x02020000 0x30000>;172 ranges = <0 0x02020000 0x30000>;174 smp-sram@0 {176 reg = <0x0 0x1000>;181 reg = <0x2f000 0x1000>;187 reg = <0x10044000 0x20>;188 #power-domain-cells = <0>;[all …]
162 reg = <0x10d20000 0x1000>;163 ranges = <0x0 0x10d20000 0x6000>;168 reg = <0x4000 0x1000>;173 reg = <0x5000 0x1000>;179 reg = <0x10010000 0x30000>;185 reg = <0x03810000 0x0C>;195 reg = <0x11000000 0x10000>;208 #size-cells = <0>;209 reg = <0x12200000 0x2000>;212 fifo-depth = <0x40>;[all …]
47 #size-cells = <0>;60 cpu0: cpu@0 {63 reg = <0>;80 cpu0_opp_table: opp-table-0 {176 reg = <0x02020000 0x30000>;179 ranges = <0 0x02020000 0x30000>;181 smp-sram@0 {183 reg = <0x0 0x1000>;188 reg = <0x2f000 0x1000>;194 reg = <0x10044000 0x20>;[all …]
153 cluster_a15_opp_table: opp-table-0 {270 reg = <0x10d20000 0x1000>;271 ranges = <0x0 0x10d20000 0x6000>;276 reg = <0x4000 0x1000>;281 reg = <0x5000 0x1000>;287 reg = <0x10010000 0x30000>;293 reg = <0x03810000 0x0c>;303 reg = <0x11000000 0x10000>;316 #size-cells = <0>;317 reg = <0x12200000 0x2000>;[all …]