| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | starfive,jh7110-usb-phy.yaml | 20 const: 0 45 reg = <0x10200000 0x10000>; 49 #phy-cells = <0>;
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| /kernel/linux/linux-6.6/arch/mips/boot/dts/xilfpga/ |
| D | nexys4ddr.dts | 19 reg = <0x0 0x08000000>; 23 #address-cells = <0>; 33 reg = <0x10200000 0x10000>; 34 xlnx,kind-of-intr = <0x0>; 35 xlnx,num-intr-inputs = <0x6>; 45 reg = <0x10600000 0x10000>; 46 xlnx,all-inputs = <0x0>; 47 xlnx,dout-default = <0x0>; 48 xlnx,gpio-width = <0x16>; 49 xlnx,interrupt-present = <0x0>; [all …]
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| /kernel/linux/linux-5.10/arch/mips/boot/dts/xilfpga/ |
| D | nexys4ddr.dts | 19 reg = <0x0 0x08000000>; 23 #address-cells = <0>; 33 reg = <0x10200000 0x10000>; 34 xlnx,kind-of-intr = <0x0>; 35 xlnx,num-intr-inputs = <0x6>; 45 reg = <0x10600000 0x10000>; 46 xlnx,all-inputs = <0x0>; 47 xlnx,dout-default = <0x0>; 48 xlnx,gpio-width = <0x16>; 49 xlnx,interrupt-present = <0x0>; [all …]
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| /kernel/linux/linux-6.6/drivers/staging/rtl8712/ |
| D | rtl8712_spec.h | 17 #define RTL8712_IOBASE_TXPKT 0x10200000 /*IOBASE_TXPKT*/ 18 #define RTL8712_IOBASE_RXPKT 0x10210000 /*IOBASE_RXPKT*/ 19 #define RTL8712_IOBASE_RXCMD 0x10220000 /*IOBASE_RXCMD*/ 20 #define RTL8712_IOBASE_TXSTATUS 0x10230000 /*IOBASE_TXSTATUS*/ 21 #define RTL8712_IOBASE_RXSTATUS 0x10240000 /*IOBASE_RXSTATUS*/ 22 #define RTL8712_IOBASE_IOREG 0x10250000 /*IOBASE_IOREG ADDR*/ 23 #define RTL8712_IOBASE_SCHEDULER 0x10260000 /*IOBASE_SCHEDULE*/ 25 #define RTL8712_IOBASE_TRXDMA 0x10270000 /*IOBASE_TRXDMA*/ 26 #define RTL8712_IOBASE_TXLLT 0x10280000 /*IOBASE_TXLLT*/ 27 #define RTL8712_IOBASE_WMAC 0x10290000 /*IOBASE_WMAC*/ [all …]
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| /kernel/linux/linux-5.10/drivers/staging/rtl8712/ |
| D | rtl8712_spec.h | 17 #define RTL8712_IOBASE_TXPKT 0x10200000 /*IOBASE_TXPKT*/ 18 #define RTL8712_IOBASE_RXPKT 0x10210000 /*IOBASE_RXPKT*/ 19 #define RTL8712_IOBASE_RXCMD 0x10220000 /*IOBASE_RXCMD*/ 20 #define RTL8712_IOBASE_TXSTATUS 0x10230000 /*IOBASE_TXSTATUS*/ 21 #define RTL8712_IOBASE_RXSTATUS 0x10240000 /*IOBASE_RXSTATUS*/ 22 #define RTL8712_IOBASE_IOREG 0x10250000 /*IOBASE_IOREG ADDR*/ 23 #define RTL8712_IOBASE_SCHEDULER 0x10260000 /*IOBASE_SCHEDULE*/ 25 #define RTL8712_IOBASE_TRXDMA 0x10270000 /*IOBASE_TRXDMA*/ 26 #define RTL8712_IOBASE_TXLLT 0x10280000 /*IOBASE_TXLLT*/ 27 #define RTL8712_IOBASE_WMAC 0x10290000 /*IOBASE_WMAC*/ [all …]
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| /kernel/linux/linux-5.10/arch/riscv/include/asm/ |
| D | parse_asm.h | 15 #define I_IMM_11_0_OFF 0 16 #define I_IMM_11_0_MASK GENMASK(11, 0) 27 #define J_IMM_10_1_MASK GENMASK(9, 0) 28 #define J_IMM_11_MASK GENMASK(0, 0) 29 #define J_IMM_19_12_MASK GENMASK(7, 0) 40 #define B_IMM_10_5_MASK GENMASK(5, 0) 41 #define B_IMM_4_1_MASK GENMASK(3, 0) 42 #define B_IMM_11_MASK GENMASK(0, 0) 66 #define RVC_J_IMM_4_MASK GENMASK(0, 0) 67 #define RVC_J_IMM_9_8_MASK GENMASK(1, 0) [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | atlas7.dtsi | 29 #size-cells = <0>; 31 cpu@0 { 34 reg = <0>; 46 #clock-cells = <0>; 52 #clock-cells = <0>; 60 interrupts = <0 29 4>, <0 82 4>; 67 ranges = <0x10000000 0x10000000 0xc0000000>; 73 reg = <0x10301000 0x1000>, 74 <0x10302000 0x0100>; 79 reg = <0x10E30020 0x4>; [all …]
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| D | exynos5260.dtsi | 35 #size-cells = <0>; 37 cpu@0 { 40 reg = <0x0>; 47 reg = <0x1>; 54 reg = <0x100>; 61 reg = <0x101>; 68 reg = <0x102>; 75 reg = <0x103>; 88 reg = <0x10010000 0x10000>; 94 reg = <0x10200000 0x10000>; [all …]
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| D | arm-realview-pb1176.dts | 45 /* 128 MiB memory @ 0x0 */ 46 reg = <0x00000000 0x08000000>; 67 #clock-cells = <0>; 73 #clock-cells = <0>; 81 #clock-cells = <0>; 89 #clock-cells = <0>; 97 #clock-cells = <0>; 105 #clock-cells = <0>; 113 pclk: pclk@0 { 114 #clock-cells = <0>; [all …]
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| D | rk3036.dtsi | 33 #size-cells = <0>; 39 reg = <0xf00>; 52 reg = <0xf01>; 65 reg = <0x20078000 0x4000>; 66 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 102 #clock-cells = <0>; 107 reg = <0x10080000 0x2000>; 110 ranges = <0 0x10080000 0x2000>; 112 smp-sram@0 { 114 reg = <0x00 0x10>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5260.dtsi | 35 #size-cells = <0>; 63 cpu0: cpu@0 { 66 reg = <0x0>; 73 reg = <0x1>; 80 reg = <0x100>; 87 reg = <0x101>; 94 reg = <0x102>; 101 reg = <0x103>; 114 reg = <0x10010000 0x10000>; 128 reg = <0x10200000 0x10000>; [all …]
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| /kernel/linux/linux-5.10/arch/mips/include/asm/mach-au1x00/ |
| D | au1000.h | 105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300 108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */ 109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */ 110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */ 111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */ 112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */ 113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */ 114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */ 115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */ 116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */ [all …]
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| /kernel/linux/linux-6.6/arch/mips/include/asm/mach-au1x00/ |
| D | au1000.h | 105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300 108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */ 109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */ 110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */ 111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */ 112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */ 113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */ 114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */ 115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */ 116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */ [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/arm/ |
| D | arm-realview-pb1176.dts | 45 /* 128 MiB memory @ 0x0 */ 46 reg = <0x00000000 0x08000000>; 67 #clock-cells = <0>; 73 #clock-cells = <0>; 81 #clock-cells = <0>; 89 #clock-cells = <0>; 97 #clock-cells = <0>; 105 #clock-cells = <0>; 113 pclk: pclk@0 { 114 #clock-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | ipq8074.dtsi | 17 #clock-cells = <0>; 23 #clock-cells = <0>; 28 #address-cells = <0x1>; 29 #size-cells = <0x0>; 31 CPU0: cpu@0 { 34 reg = <0x0>; 43 reg = <0x1>; 51 reg = <0x2>; 59 reg = <0x3>; 65 cache-level = <0x2>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/ |
| D | mt8365.dtsi | 21 #size-cells = <0>; 23 cluster0_opp: opp-table-0 { 125 cpu0: cpu@0 { 128 reg = <0x0>; 132 i-cache-size = <0x8000>; 135 d-cache-size = <0x8000>; 148 reg = <0x1>; 152 i-cache-size = <0x8000>; 155 d-cache-size = <0x8000>; 168 reg = <0x2>; [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/rockchip/ |
| D | rk3036.dtsi | 34 #size-cells = <0>; 40 reg = <0xf00>; 53 reg = <0xf01>; 84 #clock-cells = <0>; 89 reg = <0x10080000 0x2000>; 92 ranges = <0 0x10080000 0x2000>; 94 smp-sram@0 { 96 reg = <0x00 0x10>; 102 reg = <0x10090000 0x10000>; 122 reg = <0x10108000 0x800>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/ |
| D | ipq8074.dtsi | 21 #clock-cells = <0>; 27 #clock-cells = <0>; 33 #size-cells = <0>; 35 CPU0: cpu@0 { 38 reg = <0x0>; 47 reg = <0x1>; 55 reg = <0x2>; 63 reg = <0x3>; 90 reg = <0x0 0x4a600000 0x0 0x400000>; 95 reg = <0x0 0x4aa00000 0x0 0x100000>; [all …]
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| /kernel/linux/linux-6.6/arch/riscv/boot/dts/starfive/ |
| D | jh7110.dtsi | 20 #size-cells = <0>; 22 S7_0: cpu@0 { 24 reg = <0>; 185 cpu_opp: opp-table-0 { 245 #clock-cells = <0>; 250 #clock-cells = <0>; 256 #clock-cells = <0>; 262 #clock-cells = <0>; 268 #clock-cells = <0>; 274 #clock-cells = <0>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/tesla/ |
| D | fsd.dtsi | 39 #size-cells = <0>; 88 /* Cluster 0 */ 89 cpucl0_0: cpu@0 { 92 reg = <0x0 0x000>; 96 i-cache-size = <0xc000>; 99 d-cache-size = <0x8000>; 108 reg = <0x0 0x001>; 112 i-cache-size = <0xc000>; 115 d-cache-size = <0x8000>; 124 reg = <0x0 0x002>; [all …]
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| /kernel/linux/linux-6.6/arch/mips/alchemy/common/ |
| D | dbdma.c | 68 { AU1550_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, 69 { AU1550_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, 70 { AU1550_DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, 71 { AU1550_DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, 74 { AU1550_DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, 75 { AU1550_DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, 76 { AU1550_DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 }, 77 { AU1550_DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 }, 80 { AU1550_DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, 81 { AU1550_DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, [all …]
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| /kernel/linux/linux-5.10/arch/mips/alchemy/common/ |
| D | dbdma.c | 67 { AU1550_DSCR_CMD0_UART0_TX, DEV_FLAGS_OUT, 0, 8, 0x11100004, 0, 0 }, 68 { AU1550_DSCR_CMD0_UART0_RX, DEV_FLAGS_IN, 0, 8, 0x11100000, 0, 0 }, 69 { AU1550_DSCR_CMD0_UART3_TX, DEV_FLAGS_OUT, 0, 8, 0x11400004, 0, 0 }, 70 { AU1550_DSCR_CMD0_UART3_RX, DEV_FLAGS_IN, 0, 8, 0x11400000, 0, 0 }, 73 { AU1550_DSCR_CMD0_DMA_REQ0, 0, 0, 0, 0x00000000, 0, 0 }, 74 { AU1550_DSCR_CMD0_DMA_REQ1, 0, 0, 0, 0x00000000, 0, 0 }, 75 { AU1550_DSCR_CMD0_DMA_REQ2, 0, 0, 0, 0x00000000, 0, 0 }, 76 { AU1550_DSCR_CMD0_DMA_REQ3, 0, 0, 0, 0x00000000, 0, 0 }, 79 { AU1550_DSCR_CMD0_USBDEV_RX0, DEV_FLAGS_IN, 4, 8, 0x10200000, 0, 0 }, 80 { AU1550_DSCR_CMD0_USBDEV_TX0, DEV_FLAGS_OUT, 4, 8, 0x10200004, 0, 0 }, [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynosautov9.dtsi | 47 #size-cells = <0>; 81 cpu0: cpu@0 { 84 reg = <0x0>; 91 reg = <0x100>; 98 reg = <0x200>; 105 reg = <0x300>; 112 reg = <0x10000>; 119 reg = <0x10100>; 126 reg = <0x10200>; 133 reg = <0x10300>; [all …]
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| /kernel/linux/linux-6.6/lib/crypto/ |
| D | des.c | 31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14, 32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54, 33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16, 34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56, 35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c, 36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c, 37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e, 38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e, 39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34, 40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74, [all …]
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| /kernel/linux/linux-5.10/lib/crypto/ |
| D | des.c | 31 0x00, 0x00, 0x40, 0x04, 0x10, 0x10, 0x50, 0x14, 32 0x04, 0x40, 0x44, 0x44, 0x14, 0x50, 0x54, 0x54, 33 0x02, 0x02, 0x42, 0x06, 0x12, 0x12, 0x52, 0x16, 34 0x06, 0x42, 0x46, 0x46, 0x16, 0x52, 0x56, 0x56, 35 0x80, 0x08, 0xc0, 0x0c, 0x90, 0x18, 0xd0, 0x1c, 36 0x84, 0x48, 0xc4, 0x4c, 0x94, 0x58, 0xd4, 0x5c, 37 0x82, 0x0a, 0xc2, 0x0e, 0x92, 0x1a, 0xd2, 0x1e, 38 0x86, 0x4a, 0xc6, 0x4e, 0x96, 0x5a, 0xd6, 0x5e, 39 0x20, 0x20, 0x60, 0x24, 0x30, 0x30, 0x70, 0x34, 40 0x24, 0x60, 0x64, 0x64, 0x34, 0x70, 0x74, 0x74, [all …]
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