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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-mt65xx.txt40 reg = <0x1100d000 0x70>,
41 <0x11000300 0x80>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mtk-nor.yaml73 reg = <0 0x1100d000 0 0xe0>;
78 #size-cells = <0>;
80 flash@0 {
82 reg = <0>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mtk-nor.yaml86 reg = <0 0x1100d000 0 0xe0>;
92 #size-cells = <0>;
94 flash@0 {
96 reg = <0>;
Dmediatek,spi-mtk-snfi.yaml15 instructions with one continuous write and one read for up-to 0xa0
108 reg = <0 0x1100d000 0 0x1000>;
114 #size-cells = <0>;
116 flash@0 {
118 reg = <0>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Di2c-mt65xx.yaml119 reg = <0x1100d000 0x70>, <0x11000300 0x80>;
128 #size-cells = <0>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/
Dmediatek,mtk-nfc.yaml120 reg = <0 0x1100d000 0 0x1000>;
127 #size-cells = <0>;
129 nand@0 {
130 reg = <0>;
142 preloader@0 {
145 reg = <0x0 0x400000>;
149 reg = <0x400000 0x12c00000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/
Dmtk-nand.txt25 - #size-cells: Should be 0.
31 reg = <0 0x1100d000 0 0x1000>;
38 #size-cells = <0>;
45 - reg: Chip Select Signal, default 0.
46 Set as reg = <0>, <1> when need 2 CS.
86 - pinctrl-0: GPIO setting node.
123 pinctrl-0 = <&nand_pins_default>;
124 nand@0 {
125 reg = <0>;
137 nand@0 {
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt6797.dtsi25 #size-cells = <0>;
27 cpu0: cpu@0 {
31 reg = <0x000>;
38 reg = <0x001>;
45 reg = <0x002>;
52 reg = <0x003>;
59 reg = <0x100>;
66 reg = <0x101>;
73 reg = <0x102>;
80 reg = <0x103>;
[all …]
Dmt7622.dtsi69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0 0x0>;
89 reg = <0x0 0x1>;
111 #clock-cells = <0>;
116 #clock-cells = <0>;
140 reg = <0 0x43000000 0 0x30000>;
150 thermal-sensors = <&thermal 0>;
216 reg = <0 0x10000000 0 0x1000>;
223 reg = <0 0x10001000 0 0x250>;
[all …]
Dmt7986a.dtsi22 #clock-cells = <0>;
28 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
41 reg = <0x1>;
49 reg = <0x2>;
57 reg = <0x3>;
73 reg = <0 0x43000000 0 0x30000>;
79 reg = <0 0x4fc00000 0 0x00100000>;
83 reg = <0 0x4fd00000 0 0x40000>;
[all …]
Dmt8173.dtsi53 cluster0_opp: opp-table-0 {
129 #size-cells = <0>;
151 cpu0: cpu@0 {
154 reg = <0x000>;
169 reg = <0x001>;
184 reg = <0x100>;
199 reg = <0x101>;
214 CPU_SLEEP_0: cpu-sleep-0 {
220 arm,psci-suspend-param = <0x0010000>;
242 cpu_suspend = <0x84000001>;
[all …]
Dmt8186.dtsi327 #size-cells = <0>;
365 cpu0: cpu@0 {
368 reg = <0x000>;
392 reg = <0x100>;
416 reg = <0x200>;
440 reg = <0x300>;
464 reg = <0x400>;
488 reg = <0x500>;
512 reg = <0x600>;
536 reg = <0x700>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt6797.dtsi25 #size-cells = <0>;
27 cpu0: cpu@0 {
31 reg = <0x000>;
38 reg = <0x001>;
45 reg = <0x002>;
52 reg = <0x003>;
59 reg = <0x100>;
66 reg = <0x101>;
73 reg = <0x102>;
80 reg = <0x103>;
[all …]
Dmt7622.dtsi69 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0 0x0>;
88 reg = <0x0 0x1>;
103 #clock-cells = <0>;
108 #clock-cells = <0>;
132 reg = <0 0x43000000 0 0x30000>;
142 thermal-sensors = <&thermal 0>;
208 reg = <0 0x10000000 0 0x1000>;
215 reg = <0 0x10001000 0 0x250>;
[all …]
Dmt8173.dtsi136 #size-cells = <0>;
158 cpu0: cpu@0 {
161 reg = <0x000>;
176 reg = <0x001>;
191 reg = <0x100>;
206 reg = <0x101>;
221 CPU_SLEEP_0: cpu-sleep-0 {
227 arm,psci-suspend-param = <0x0010000>;
249 cpu_suspend = <0x84000001>;
250 cpu_off = <0x84000002>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt2701.dtsi25 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x0>;
36 reg = <0x1>;
41 reg = <0x2>;
46 reg = <0x3>;
57 reg = <0 0x80002000 0 0x1000>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
73 clk26m: oscillator@0 {
[all …]
Dmt7623.dtsi73 #size-cells = <0>;
76 cpu0: cpu@0 {
79 reg = <0x0>;
91 reg = <0x1>;
103 reg = <0x2>;
115 reg = <0x3>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
147 clk26m: oscillator-0 {
149 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt2701.dtsi25 #size-cells = <0>;
28 cpu@0 {
31 reg = <0x0>;
36 reg = <0x1>;
41 reg = <0x2>;
46 reg = <0x3>;
57 reg = <0 0x80002000 0 0x1000>;
64 #clock-cells = <0>;
70 #clock-cells = <0>;
73 clk26m: oscillator@0 {
[all …]
Dmt7623.dtsi73 #size-cells = <0>;
76 cpu0: cpu@0 {
79 reg = <0x0>;
91 reg = <0x1>;
103 reg = <0x2>;
115 reg = <0x3>;
137 #clock-cells = <0>;
142 #clock-cells = <0>;
147 clk26m: oscillator-0 {
149 #clock-cells = <0>;
[all …]