| /kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/ |
| D | imx8mn-var-som-symphony.dts | 18 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 53 gpios = <&pca9534 0 GPIO_ACTIVE_LOW>; 66 pinctrl-0 = <&pinctrl_i2c2>; 71 reg = <0x20>; 74 pinctrl-0 = <&pinctrl_pca9534>; 105 reg = <0x3d>; 109 pinctrl-0 = <&pinctrl_ptn5150>; 118 reg = <0x38>; 120 pinctrl-0 = <&pinctrl_captouch>; 132 reg = <0x68>; [all …]
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| D | imx8mn-var-som.dtsi | 20 reg = <0x0 0x40000000 0 0x40000000>; 26 pinctrl-0 = <&pinctrl_reg_eth_phy>; 53 pinctrl-0 = <&pinctrl_ecspi1>; 55 <&gpio1 0 GPIO_ACTIVE_LOW>; 61 touchscreen@0 { 62 reg = <0>; 65 pinctrl-0 = <&pinctrl_restouch>; 89 pinctrl-0 = <&pinctrl_fec1>; 99 #size-cells = <0>; 119 pinctrl-0 = <&pinctrl_i2c1>; [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/ |
| D | imx8mn-var-som.dtsi | 20 reg = <0x0 0x40000000 0 0x40000000>; 26 pinctrl-0 = <&pinctrl_reg_eth_phy>; 54 pinctrl-0 = <&pinctrl_ecspi1>; 56 <&gpio1 0 GPIO_ACTIVE_LOW>; 62 touchscreen@0 { 63 reg = <0>; 66 pinctrl-0 = <&pinctrl_restouch>; 90 pinctrl-0 = <&pinctrl_fec1>; 100 #size-cells = <0>; 120 pinctrl-0 = <&pinctrl_i2c1>; [all …]
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| /kernel/linux/linux-6.6/Documentation/dev-tools/ |
| D | ubsan.rst | 22 CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.0-rc1+ #26 27 [<ffffffff815e6cd6>] dump_stack+0x45/0x5f 28 [<ffffffff8163a5ed>] ubsan_epilogue+0xd/0x40 29 [<ffffffff8163ac2b>] __ubsan_handle_shift_out_of_bounds+0xeb/0x130 30 [<ffffffff815f0001>] ? radix_tree_gang_lookup_slot+0x51/0x150 31 [<ffffffff8173c586>] _mix_pool_bytes+0x1e6/0x480 32 [<ffffffff83105653>] ? dmi_walk_early+0x48/0x5c 33 [<ffffffff8173c881>] add_device_randomness+0x61/0x130 34 [<ffffffff83105b35>] ? dmi_save_one_device+0xaa/0xaa 35 [<ffffffff83105653>] dmi_walk_early+0x48/0x5c [all …]
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| /kernel/linux/linux-5.10/Documentation/dev-tools/ |
| D | ubsan.rst | 22 CPU: 0 PID: 0 Comm: swapper Not tainted 4.4.0-rc1+ #26 27 [<ffffffff815e6cd6>] dump_stack+0x45/0x5f 28 [<ffffffff8163a5ed>] ubsan_epilogue+0xd/0x40 29 [<ffffffff8163ac2b>] __ubsan_handle_shift_out_of_bounds+0xeb/0x130 30 [<ffffffff815f0001>] ? radix_tree_gang_lookup_slot+0x51/0x150 31 [<ffffffff8173c586>] _mix_pool_bytes+0x1e6/0x480 32 [<ffffffff83105653>] ? dmi_walk_early+0x48/0x5c 33 [<ffffffff8173c881>] add_device_randomness+0x61/0x130 34 [<ffffffff83105b35>] ? dmi_save_one_device+0xaa/0xaa 35 [<ffffffff83105653>] dmi_walk_early+0x48/0x5c [all …]
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| /kernel/linux/linux-6.6/drivers/clk/mediatek/ |
| D | clk-mt7622.c | 217 .set_ofs = 0x120, 218 .clr_ofs = 0x120, 219 .sta_ofs = 0x120, 223 .set_ofs = 0x128, 224 .clr_ofs = 0x128, 225 .sta_ofs = 0x128, 229 .set_ofs = 0x8, 230 .clr_ofs = 0x10, 231 .sta_ofs = 0x18, 235 .set_ofs = 0xC, [all …]
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| D | clk-mt6795-topckgen.c | 17 * So we model these clocks' rate as 0, to denote it's not an actual rate. 19 #define DUMMY_RATE 0 23 (_reg + 0x4), (_reg + 0x8), _shift, _width, \ 24 _gate, 0, -1, _flags) 362 FACTOR_FLAGS(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2, 0), 363 FACTOR_FLAGS(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3, 0), 364 FACTOR_FLAGS(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5, 0), 365 FACTOR_FLAGS(CLK_TOP_MAIN_H156M, "main_h156m", "mainpll", 1, 7, 0), 370 FACTOR_FLAGS(CLK_TOP_UNIV_624M, "univ_624m", "univpll", 1, 2, 0), 371 FACTOR_FLAGS(CLK_TOP_UNIV_416M, "univ_416m", "univpll", 1, 3, 0), [all …]
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| D | clk-mt8173-topckgen.c | 18 * So we model these clocks' rate as 0, to denote it's not an actual rate. 20 #define DUMMY_RATE 0 24 (_reg + 0x4), (_reg + 0x8), _shift, _width, \ 25 _gate, 0, -1, _flags) 437 FACTOR_FLAGS(CLK_TOP_MAIN_H546M, "main_h546m", "mainpll", 1, 2, 0), 438 FACTOR_FLAGS(CLK_TOP_MAIN_H364M, "main_h364m", "mainpll", 1, 3, 0), 439 FACTOR_FLAGS(CLK_TOP_MAIN_H218P4M, "main_h218p4m", "mainpll", 1, 5, 0), 440 FACTOR_FLAGS(CLK_TOP_MAIN_H156M, "main_h156m", "mainpll", 1, 7, 0), 445 FACTOR_FLAGS(CLK_TOP_UNIV_624M, "univ_624m", "univpll", 1, 2, 0), 446 FACTOR_FLAGS(CLK_TOP_UNIV_416M, "univ_416m", "univpll", 1, 3, 0), [all …]
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| /kernel/linux/linux-5.10/drivers/clk/renesas/ |
| D | r8a774a1-cpg-mssr.c | 75 DEF_GEN3_Z("z2", R8A774A1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 96 DEF_GEN3_SD("sd0", R8A774A1_CLK_SD0, CLK_SDSRC, 0x074), 97 DEF_GEN3_SD("sd1", R8A774A1_CLK_SD1, CLK_SDSRC, 0x078), 98 DEF_GEN3_SD("sd2", R8A774A1_CLK_SD2, CLK_SDSRC, 0x268), 99 DEF_GEN3_SD("sd3", R8A774A1_CLK_SD3, CLK_SDSRC, 0x26c), 105 DEF_DIV6P1("canfd", R8A774A1_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 106 DEF_DIV6P1("csi0", R8A774A1_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), 107 DEF_DIV6P1("mso", R8A774A1_CLK_MSO, CLK_PLL1_DIV4, 0x014), 108 DEF_DIV6P1("hdmi", R8A774A1_CLK_HDMI, CLK_PLL1_DIV4, 0x250), 121 DEF_MOD("fdp1-0", 119, R8A774A1_CLK_S0D1), [all …]
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| D | r8a7796-cpg-mssr.c | 87 DEF_GEN3_Z("z2", R8A7796_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 109 DEF_GEN3_SD("sd0", R8A7796_CLK_SD0, CLK_SDSRC, 0x074), 110 DEF_GEN3_SD("sd1", R8A7796_CLK_SD1, CLK_SDSRC, 0x078), 111 DEF_GEN3_SD("sd2", R8A7796_CLK_SD2, CLK_SDSRC, 0x268), 112 DEF_GEN3_SD("sd3", R8A7796_CLK_SD3, CLK_SDSRC, 0x26c), 119 DEF_DIV6P1("canfd", R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 120 DEF_DIV6P1("csi0", R8A7796_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), 121 DEF_DIV6P1("mso", R8A7796_CLK_MSO, CLK_PLL1_DIV4, 0x014), 122 DEF_DIV6P1("hdmi", R8A7796_CLK_HDMI, CLK_PLL1_DIV4, 0x250), 130 DEF_MOD("fdp1-0", 119, R8A7796_CLK_S0D1), [all …]
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| D | r8a774e1-cpg-mssr.c | 82 DEF_GEN3_Z("z2", R8A774E1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 103 DEF_GEN3_SD("sd0", R8A774E1_CLK_SD0, CLK_SDSRC, 0x074), 104 DEF_GEN3_SD("sd1", R8A774E1_CLK_SD1, CLK_SDSRC, 0x078), 105 DEF_GEN3_SD("sd2", R8A774E1_CLK_SD2, CLK_SDSRC, 0x268), 106 DEF_GEN3_SD("sd3", R8A774E1_CLK_SD3, CLK_SDSRC, 0x26c), 113 DEF_DIV6P1("canfd", R8A774E1_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 114 DEF_DIV6P1("csi0", R8A774E1_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), 115 DEF_DIV6P1("mso", R8A774E1_CLK_MSO, CLK_PLL1_DIV4, 0x014), 116 DEF_DIV6P1("hdmi", R8A774E1_CLK_HDMI, CLK_PLL1_DIV4, 0x250), 125 DEF_MOD("fdp1-0", 119, R8A774E1_CLK_S0D1), [all …]
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| D | r8a7795-cpg-mssr.c | 85 DEF_GEN3_Z("z2", R8A7795_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 107 DEF_GEN3_SD("sd0", R8A7795_CLK_SD0, CLK_SDSRC, 0x074), 108 DEF_GEN3_SD("sd1", R8A7795_CLK_SD1, CLK_SDSRC, 0x078), 109 DEF_GEN3_SD("sd2", R8A7795_CLK_SD2, CLK_SDSRC, 0x268), 110 DEF_GEN3_SD("sd3", R8A7795_CLK_SD3, CLK_SDSRC, 0x26c), 117 DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 118 DEF_DIV6P1("csi0", R8A7795_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), 119 DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014), 120 DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV4, 0x250), 130 DEF_MOD("fdp1-0", 119, R8A7795_CLK_S0D1), [all …]
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| D | r8a774b1-cpg-mssr.c | 93 DEF_GEN3_SD("sd0", R8A774B1_CLK_SD0, CLK_SDSRC, 0x074), 94 DEF_GEN3_SD("sd1", R8A774B1_CLK_SD1, CLK_SDSRC, 0x078), 95 DEF_GEN3_SD("sd2", R8A774B1_CLK_SD2, CLK_SDSRC, 0x268), 96 DEF_GEN3_SD("sd3", R8A774B1_CLK_SD3, CLK_SDSRC, 0x26c), 102 DEF_DIV6P1("canfd", R8A774B1_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 103 DEF_DIV6P1("csi0", R8A774B1_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), 104 DEF_DIV6P1("mso", R8A774B1_CLK_MSO, CLK_PLL1_DIV4, 0x014), 105 DEF_DIV6P1("hdmi", R8A774B1_CLK_HDMI, CLK_PLL1_DIV4, 0x250), 118 DEF_MOD("fdp1-0", 119, R8A774B1_CLK_S0D1), 248 * 0 0 0 0 16.66 x 1 x180 x192 x192 x144 /16 [all …]
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| D | r8a77965-cpg-mssr.c | 104 DEF_GEN3_SD("sd0", R8A77965_CLK_SD0, CLK_SDSRC, 0x074), 105 DEF_GEN3_SD("sd1", R8A77965_CLK_SD1, CLK_SDSRC, 0x078), 106 DEF_GEN3_SD("sd2", R8A77965_CLK_SD2, CLK_SDSRC, 0x268), 107 DEF_GEN3_SD("sd3", R8A77965_CLK_SD3, CLK_SDSRC, 0x26c), 114 DEF_DIV6P1("canfd", R8A77965_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 115 DEF_DIV6P1("csi0", R8A77965_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), 116 DEF_DIV6P1("mso", R8A77965_CLK_MSO, CLK_PLL1_DIV4, 0x014), 117 DEF_DIV6P1("hdmi", R8A77965_CLK_HDMI, CLK_PLL1_DIV4, 0x250), 125 DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1), 278 * 0 0 0 0 16.66 x 1 x180 x192 x192 x144 /16 [all …]
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| /kernel/linux/linux-6.6/drivers/clk/renesas/ |
| D | r8a774a1-cpg-mssr.c | 78 DEF_GEN3_Z("z2", R8A774A1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 100 DEF_GEN3_SDH("sd0h", R8A774A1_CLK_SD0H, CLK_SDSRC, 0x074), 101 DEF_GEN3_SDH("sd1h", R8A774A1_CLK_SD1H, CLK_SDSRC, 0x078), 102 DEF_GEN3_SDH("sd2h", R8A774A1_CLK_SD2H, CLK_SDSRC, 0x268), 103 DEF_GEN3_SDH("sd3h", R8A774A1_CLK_SD3H, CLK_SDSRC, 0x26c), 104 DEF_GEN3_SD("sd0", R8A774A1_CLK_SD0, R8A774A1_CLK_SD0H, 0x074), 105 DEF_GEN3_SD("sd1", R8A774A1_CLK_SD1, R8A774A1_CLK_SD1H, 0x078), 106 DEF_GEN3_SD("sd2", R8A774A1_CLK_SD2, R8A774A1_CLK_SD2H, 0x268), 107 DEF_GEN3_SD("sd3", R8A774A1_CLK_SD3, R8A774A1_CLK_SD3H, 0x26c), 116 DEF_DIV6P1("canfd", R8A774A1_CLK_CANFD, CLK_PLL1_DIV4, 0x244), [all …]
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| D | r8a774e1-cpg-mssr.c | 78 DEF_GEN3_Z("z2", R8A774E1_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 100 DEF_GEN3_SDH("sd0h", R8A774E1_CLK_SD0H, CLK_SDSRC, 0x074), 101 DEF_GEN3_SDH("sd1h", R8A774E1_CLK_SD1H, CLK_SDSRC, 0x078), 102 DEF_GEN3_SDH("sd2h", R8A774E1_CLK_SD2H, CLK_SDSRC, 0x268), 103 DEF_GEN3_SDH("sd3h", R8A774E1_CLK_SD3H, CLK_SDSRC, 0x26c), 104 DEF_GEN3_SD("sd0", R8A774E1_CLK_SD0, R8A774E1_CLK_SD0H, 0x074), 105 DEF_GEN3_SD("sd1", R8A774E1_CLK_SD1, R8A774E1_CLK_SD1H, 0x078), 106 DEF_GEN3_SD("sd2", R8A774E1_CLK_SD2, R8A774E1_CLK_SD2H, 0x268), 107 DEF_GEN3_SD("sd3", R8A774E1_CLK_SD3, R8A774E1_CLK_SD3H, 0x26c), 117 DEF_DIV6P1("canfd", R8A774E1_CLK_CANFD, CLK_PLL1_DIV4, 0x244), [all …]
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| D | r8a7795-cpg-mssr.c | 81 DEF_GEN3_Z("z2", R8A7795_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 104 DEF_GEN3_SDH("sd0h", R8A7795_CLK_SD0H, CLK_SDSRC, 0x074), 105 DEF_GEN3_SDH("sd1h", R8A7795_CLK_SD1H, CLK_SDSRC, 0x078), 106 DEF_GEN3_SDH("sd2h", R8A7795_CLK_SD2H, CLK_SDSRC, 0x268), 107 DEF_GEN3_SDH("sd3h", R8A7795_CLK_SD3H, CLK_SDSRC, 0x26c), 108 DEF_GEN3_SD("sd0", R8A7795_CLK_SD0, R8A7795_CLK_SD0H, 0x074), 109 DEF_GEN3_SD("sd1", R8A7795_CLK_SD1, R8A7795_CLK_SD1H, 0x078), 110 DEF_GEN3_SD("sd2", R8A7795_CLK_SD2, R8A7795_CLK_SD2H, 0x268), 111 DEF_GEN3_SD("sd3", R8A7795_CLK_SD3, R8A7795_CLK_SD3H, 0x26c), 121 DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244), [all …]
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| D | r8a7796-cpg-mssr.c | 83 DEF_GEN3_Z("z2", R8A7796_CLK_Z2, CLK_TYPE_GEN3_Z, CLK_PLL2, 2, 0), 106 DEF_GEN3_SDH("sd0h", R8A7796_CLK_SD0H, CLK_SDSRC, 0x074), 107 DEF_GEN3_SDH("sd1h", R8A7796_CLK_SD1H, CLK_SDSRC, 0x078), 108 DEF_GEN3_SDH("sd2h", R8A7796_CLK_SD2H, CLK_SDSRC, 0x268), 109 DEF_GEN3_SDH("sd3h", R8A7796_CLK_SD3H, CLK_SDSRC, 0x26c), 110 DEF_GEN3_SD("sd0", R8A7796_CLK_SD0, R8A7796_CLK_SD0H, 0x074), 111 DEF_GEN3_SD("sd1", R8A7796_CLK_SD1, R8A7796_CLK_SD1H, 0x078), 112 DEF_GEN3_SD("sd2", R8A7796_CLK_SD2, R8A7796_CLK_SD2H, 0x268), 113 DEF_GEN3_SD("sd3", R8A7796_CLK_SD3, R8A7796_CLK_SD3H, 0x26c), 123 DEF_DIV6P1("canfd", R8A7796_CLK_CANFD, CLK_PLL1_DIV4, 0x244), [all …]
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| D | r8a774b1-cpg-mssr.c | 97 DEF_GEN3_SDH("sd0h", R8A774B1_CLK_SD0H, CLK_SDSRC, 0x074), 98 DEF_GEN3_SDH("sd1h", R8A774B1_CLK_SD1H, CLK_SDSRC, 0x078), 99 DEF_GEN3_SDH("sd2h", R8A774B1_CLK_SD2H, CLK_SDSRC, 0x268), 100 DEF_GEN3_SDH("sd3h", R8A774B1_CLK_SD3H, CLK_SDSRC, 0x26c), 101 DEF_GEN3_SD("sd0", R8A774B1_CLK_SD0, R8A774B1_CLK_SD0H, 0x074), 102 DEF_GEN3_SD("sd1", R8A774B1_CLK_SD1, R8A774B1_CLK_SD1H, 0x078), 103 DEF_GEN3_SD("sd2", R8A774B1_CLK_SD2, R8A774B1_CLK_SD2H, 0x268), 104 DEF_GEN3_SD("sd3", R8A774B1_CLK_SD3, R8A774B1_CLK_SD3H, 0x26c), 113 DEF_DIV6P1("canfd", R8A774B1_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 114 DEF_DIV6P1("csi0", R8A774B1_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), [all …]
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| D | r8a77965-cpg-mssr.c | 101 DEF_GEN3_SDH("sd0h", R8A77965_CLK_SD0H, CLK_SDSRC, 0x074), 102 DEF_GEN3_SDH("sd1h", R8A77965_CLK_SD1H, CLK_SDSRC, 0x078), 103 DEF_GEN3_SDH("sd2h", R8A77965_CLK_SD2H, CLK_SDSRC, 0x268), 104 DEF_GEN3_SDH("sd3h", R8A77965_CLK_SD3H, CLK_SDSRC, 0x26c), 105 DEF_GEN3_SD("sd0", R8A77965_CLK_SD0, R8A77965_CLK_SD0H, 0x074), 106 DEF_GEN3_SD("sd1", R8A77965_CLK_SD1, R8A77965_CLK_SD1H, 0x078), 107 DEF_GEN3_SD("sd2", R8A77965_CLK_SD2, R8A77965_CLK_SD2H, 0x268), 108 DEF_GEN3_SD("sd3", R8A77965_CLK_SD3, R8A77965_CLK_SD3H, 0x26c), 118 DEF_DIV6P1("canfd", R8A77965_CLK_CANFD, CLK_PLL1_DIV4, 0x244), 119 DEF_DIV6P1("csi0", R8A77965_CLK_CSI0, CLK_PLL1_DIV4, 0x00c), [all …]
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| /kernel/linux/linux-5.10/drivers/clk/mediatek/ |
| D | clk-mt7622.c | 295 .set_ofs = 0x8, 296 .clr_ofs = 0x8, 297 .sta_ofs = 0x8, 301 .set_ofs = 0x40, 302 .clr_ofs = 0x44, 303 .sta_ofs = 0x48, 307 .set_ofs = 0x120, 308 .clr_ofs = 0x120, 309 .sta_ofs = 0x120, 313 .set_ofs = 0x128, [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-mmp/ |
| D | mmp2.c | 32 #define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000) 36 MFP_ADDR_X(GPIO0, GPIO58, 0x54), 37 MFP_ADDR_X(GPIO59, GPIO73, 0x280), 38 MFP_ADDR_X(GPIO74, GPIO101, 0x170), 40 MFP_ADDR(GPIO102, 0x0), 41 MFP_ADDR(GPIO103, 0x4), 42 MFP_ADDR(GPIO104, 0x1fc), 43 MFP_ADDR(GPIO105, 0x1f8), 44 MFP_ADDR(GPIO106, 0x1f4), 45 MFP_ADDR(GPIO107, 0x1f0), [all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/syscon/ |
| D | atmel-matrix.h | 11 #define AT91SAM9260_MATRIX_MCFG 0x00 12 #define AT91SAM9260_MATRIX_SCFG 0x40 13 #define AT91SAM9260_MATRIX_PRS 0x80 14 #define AT91SAM9260_MATRIX_MRCR 0x100 15 #define AT91SAM9260_MATRIX_EBICSA 0x11c 17 #define AT91SAM9261_MATRIX_MRCR 0x0 18 #define AT91SAM9261_MATRIX_SCFG 0x4 19 #define AT91SAM9261_MATRIX_TCR 0x24 20 #define AT91SAM9261_MATRIX_EBICSA 0x30 21 #define AT91SAM9261_MATRIX_USBPUCR 0x34 [all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/syscon/ |
| D | atmel-matrix.h | 11 #define AT91SAM9260_MATRIX_MCFG 0x00 12 #define AT91SAM9260_MATRIX_SCFG 0x40 13 #define AT91SAM9260_MATRIX_PRS 0x80 14 #define AT91SAM9260_MATRIX_MRCR 0x100 15 #define AT91SAM9260_MATRIX_EBICSA 0x11c 17 #define AT91SAM9261_MATRIX_MRCR 0x0 18 #define AT91SAM9261_MATRIX_SCFG 0x4 19 #define AT91SAM9261_MATRIX_TCR 0x24 20 #define AT91SAM9261_MATRIX_EBICSA 0x30 21 #define AT91SAM9261_MATRIX_USBPUCR 0x34 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpufreq/ |
| D | cpufreq-mediatek-hw.yaml | 47 #size-cells = <0>; 49 cpu0: cpu@0 { 53 performance-domains = <&performance 0>; 54 reg = <0x000>; 66 reg = <0 0x0011bc10 0 0x120>, <0 0x0011bd30 0 0x120>;
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