Home
last modified time | relevance | path

Searched +full:0 +full:x1806 (Results 1 – 25 of 28) sorted by relevance

12

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/slimbus/
Dqcom,slim-ngd.yaml32 const: 0
49 "^slim@[0-9a-f]+$":
79 reg = <0x171c0000 0x2c000>;
84 iommus = <&apps_smmu 0x1806 0x0>;
86 #size-cells = <0>;
91 #size-cells = <0>;
93 codec@1,0 {
95 reg = <1 0>;
104 #clock-cells = <0>;
/kernel/linux/linux-6.6/drivers/net/ethernet/hisilicon/hns3/hns3_common/
Dhclge_comm_cmd.h10 #define HCLGE_COMM_CMD_FLAG_IN BIT(0)
18 #define HCLGE_COMM_LINK_EVENT_REPORT_EN_B 0
28 #define HCLGE_COMM_TYPE_CRQ 0
34 #define HCLGE_COMM_NIC_CSQ_BASEADDR_L_REG 0x27000
35 #define HCLGE_COMM_NIC_CSQ_BASEADDR_H_REG 0x27004
36 #define HCLGE_COMM_NIC_CSQ_DEPTH_REG 0x27008
37 #define HCLGE_COMM_NIC_CSQ_TAIL_REG 0x27010
38 #define HCLGE_COMM_NIC_CSQ_HEAD_REG 0x27014
39 #define HCLGE_COMM_NIC_CRQ_BASEADDR_L_REG 0x27018
40 #define HCLGE_COMM_NIC_CRQ_BASEADDR_H_REG 0x2701C
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/hisilicon/hns3/hns3pf/
Dhclge_cmd.h19 #define HCLGE_CMDQ_RX_INVLD_B 0
44 HCLGE_CMD_EXEC_SUCCESS = 0,
59 HCLGE_STATUS_SUCCESS = 0,
78 #define HCLGE_CMD_FLAG_IN BIT(0)
87 HCLGE_OPC_QUERY_FW_VER = 0x0001,
88 HCLGE_OPC_CFG_RST_TRIGGER = 0x0020,
89 HCLGE_OPC_GBL_RST_STATUS = 0x0021,
90 HCLGE_OPC_QUERY_FUNC_STATUS = 0x0022,
91 HCLGE_OPC_QUERY_PF_RSRC = 0x0023,
92 HCLGE_OPC_QUERY_VF_RSRC = 0x0024,
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/kernel/linux/linux-6.6/drivers/scsi/
Dsense_codes.h7 SENSE_CODE(0x0000, "No additional sense information")
8 SENSE_CODE(0x0001, "Filemark detected")
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
10 SENSE_CODE(0x0003, "Setmark detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
13 SENSE_CODE(0x0006, "I/O process terminated")
14 SENSE_CODE(0x0007, "Programmable early warning detected")
15 SENSE_CODE(0x0011, "Audio play operation in progress")
16 SENSE_CODE(0x0012, "Audio play operation paused")
[all …]
/kernel/linux/linux-5.10/drivers/scsi/
Dsense_codes.h7 SENSE_CODE(0x0000, "No additional sense information")
8 SENSE_CODE(0x0001, "Filemark detected")
9 SENSE_CODE(0x0002, "End-of-partition/medium detected")
10 SENSE_CODE(0x0003, "Setmark detected")
11 SENSE_CODE(0x0004, "Beginning-of-partition/medium detected")
12 SENSE_CODE(0x0005, "End-of-data detected")
13 SENSE_CODE(0x0006, "I/O process terminated")
14 SENSE_CODE(0x0007, "Programmable early warning detected")
15 SENSE_CODE(0x0011, "Audio play operation in progress")
16 SENSE_CODE(0x0012, "Audio play operation paused")
[all …]
/kernel/linux/linux-6.6/drivers/net/dsa/
Dlan9303-core.c19 /* For the LAN9303 and LAN9354, only port 0 is an XMII port. */
20 #define IS_PORT_XMII(port) ((port) == 0)
27 #define LAN9303_CHIP_REV 0x14
28 # define LAN9303_CHIP_ID 0x9303
29 # define LAN9352_CHIP_ID 0x9352
30 # define LAN9353_CHIP_ID 0x9353
31 # define LAN9354_CHIP_ID 0x9354
32 # define LAN9355_CHIP_ID 0x9355
33 #define LAN9303_IRQ_CFG 0x15
36 # define LAN9303_IRQ_CFG_IRQ_TYPE BIT(0)
[all …]
/kernel/linux/linux-5.10/drivers/net/dsa/
Dlan9303-core.c22 #define LAN9303_CHIP_REV 0x14
23 # define LAN9303_CHIP_ID 0x9303
24 #define LAN9303_IRQ_CFG 0x15
27 # define LAN9303_IRQ_CFG_IRQ_TYPE BIT(0)
28 #define LAN9303_INT_STS 0x16
31 #define LAN9303_INT_EN 0x17
34 #define LAN9303_HW_CFG 0x1D
38 #define LAN9303_PMI_DATA 0x29
39 #define LAN9303_PMI_ACCESS 0x2A
40 # define LAN9303_PMI_ACCESS_PHY_ADDR(x) (((x) & 0x1f) << 11)
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi73 reg = <0 0x80000000 0 0>;
82 reg = <0 0x85700000 0 0x600000>;
87 reg = <0 0x85e00000 0 0x100000>;
92 reg = <0 0x85fc0000 0 0x20000>;
98 reg = <0x0 0x85fe0000 0 0x20000>;
103 reg = <0x0 0x86000000 0 0x200000>;
108 reg = <0 0x86200000 0 0x2d00000>;
114 reg = <0 0x88f00000 0 0x200000>;
122 reg = <0 0x8ab00000 0 0x1400000>;
127 reg = <0 0x8bf00000 0 0x500000>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi76 #clock-cells = <0>;
83 #clock-cells = <0>;
90 #size-cells = <0>;
92 CPU0: cpu@0 {
95 reg = <0x0 0x0>;
96 clocks = <&cpufreq_hw 0>;
100 qcom,freq-domain = <&cpufreq_hw 0>;
124 reg = <0x0 0x100>;
125 clocks = <&cpufreq_hw 0>;
129 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
/kernel/linux/linux-6.6/sound/usb/
Dmidi.c139 #define STATE_UNKNOWN 0
147 } ports[0x10];
159 } ports[0x10];
170 0, 0, 2, 3, 3, 1, 2, 3, 3, 3, 3, 3, 2, 2, 3, 1
179 if (err < 0 && err != -ENODEV) in snd_usbmidi_submit_urb()
203 return 0; /* continue */ in snd_usbmidi_urb_error()
228 for (; length > 0; ++data, --length) in dump_urb()
243 if (urb->status == 0) { in snd_usbmidi_in_urb_complete()
249 if (err < 0) { in snd_usbmidi_in_urb_complete()
278 if (urb->status < 0) { in snd_usbmidi_out_urb_complete()
[all …]
/kernel/linux/linux-5.10/sound/usb/
Dmidi.c155 #define STATE_UNKNOWN 0
163 } ports[0x10];
175 } ports[0x10];
186 0, 0, 2, 3, 3, 1, 2, 3, 3, 3, 3, 3, 2, 2, 3, 1
195 if (err < 0 && err != -ENODEV) in snd_usbmidi_submit_urb()
219 return 0; /* continue */ in snd_usbmidi_urb_error()
244 for (; length > 0; ++data, --length) in dump_urb()
259 if (urb->status == 0) { in snd_usbmidi_in_urb_complete()
265 if (err < 0) { in snd_usbmidi_in_urb_complete()
294 if (urb->status < 0) { in snd_usbmidi_out_urb_complete()
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/intel/ixgbe/
Dixgbe_type.h12 #define IXGBE_DEV_ID_82598 0x10B6
13 #define IXGBE_DEV_ID_82598_BX 0x1508
14 #define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
15 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
16 #define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
17 #define IXGBE_DEV_ID_82598AT 0x10C8
18 #define IXGBE_DEV_ID_82598AT2 0x150B
19 #define IXGBE_DEV_ID_82598EB_CX4 0x10DD
20 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
21 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
[all …]
/kernel/linux/linux-5.10/drivers/net/ethernet/intel/ixgbe/
Dixgbe_type.h12 #define IXGBE_DEV_ID_82598 0x10B6
13 #define IXGBE_DEV_ID_82598_BX 0x1508
14 #define IXGBE_DEV_ID_82598AF_DUAL_PORT 0x10C6
15 #define IXGBE_DEV_ID_82598AF_SINGLE_PORT 0x10C7
16 #define IXGBE_DEV_ID_82598EB_SFP_LOM 0x10DB
17 #define IXGBE_DEV_ID_82598AT 0x10C8
18 #define IXGBE_DEV_ID_82598AT2 0x150B
19 #define IXGBE_DEV_ID_82598EB_CX4 0x10DD
20 #define IXGBE_DEV_ID_82598_CX4_DUAL_PORT 0x10EC
21 #define IXGBE_DEV_ID_82598_DA_DUAL_PORT 0x10F1
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmDCFEV0_PG_CONFIG 0x2db
[all …]
Ddce_10_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
Ddce_11_2_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_11_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmDCFEV0_PG_CONFIG 0x2db
[all …]
Ddce_10_0_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
Ddce_11_2_d.h27 #define mmPIPE0_PG_CONFIG 0x2c0
28 #define mmPIPE0_PG_ENABLE 0x2c1
29 #define mmPIPE0_PG_STATUS 0x2c2
30 #define mmPIPE1_PG_CONFIG 0x2c3
31 #define mmPIPE1_PG_ENABLE 0x2c4
32 #define mmPIPE1_PG_STATUS 0x2c5
33 #define mmPIPE2_PG_CONFIG 0x2c6
34 #define mmPIPE2_PG_ENABLE 0x2c7
35 #define mmPIPE2_PG_STATUS 0x2c8
36 #define mmPIPE3_PG_CONFIG 0x2c9
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h24 …SQ_DEBUG_STS_GLOBAL 0x10A9
25 …ne mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0
26 …SQ_DEBUG_STS_GLOBAL2 0x10B0
27 …ne mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0
30 // base address: 0x4980
31 …SDMA0_DEC_START 0x0000
32 …ne mmSDMA0_DEC_START_BASE_IDX 0
33 …SDMA0_PG_CNTL 0x0016
34 …ne mmSDMA0_PG_CNTL_BASE_IDX 0
35 …SDMA0_PG_CTX_LO 0x0017
[all …]
Dgc_11_0_3_offset.h29 // base address: 0x4980
30 …SDMA0_DEC_START 0x0000
31 …e regSDMA0_DEC_START_BASE_IDX 0
32 …SDMA0_F32_MISC_CNTL 0x000b
33 …e regSDMA0_F32_MISC_CNTL_BASE_IDX 0
34 …SDMA0_GLOBAL_TIMESTAMP_LO 0x000f
35 …e regSDMA0_GLOBAL_TIMESTAMP_LO_BASE_IDX 0
36 …SDMA0_GLOBAL_TIMESTAMP_HI 0x0010
37 …e regSDMA0_GLOBAL_TIMESTAMP_HI_BASE_IDX 0
38 …SDMA0_POWER_CNTL 0x001a
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h24 …SQ_DEBUG_STS_GLOBAL 0x10A9
25 …ne mmSQ_DEBUG_STS_GLOBAL_BASE_IDX 0
26 …SQ_DEBUG_STS_GLOBAL2 0x10B0
27 …ne mmSQ_DEBUG_STS_GLOBAL2_BASE_IDX 0
30 // base address: 0x4980
31 …SDMA0_DEC_START 0x0000
32 …ne mmSDMA0_DEC_START_BASE_IDX 0
33 …SDMA0_PG_CNTL 0x0016
34 …ne mmSDMA0_PG_CNTL_BASE_IDX 0
35 …SDMA0_PG_CTX_LO 0x0017
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_1_0_offset.h27 // base address: 0x1300000
31 // base address: 0x1300000
35 // base address: 0x1300000
39 // base address: 0x1300000
43 // base address: 0x1300000
47 // base address: 0x1300020
51 // base address: 0x1300040
55 // base address: 0x1300060
59 // base address: 0x1300080
63 // base address: 0x13000a0
[all …]

12