Searched +full:0 +full:x26008 (Results 1 – 12 of 12) sorted by relevance
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/remoteproc/ |
| D | qcom,sc7280-mss-pil.yaml | 216 reg = <0x04080000 0x10000>, <0x04180000 0x48>;
219 iommus = <&apps_smmu 0x124 0x0>, <&apps_smmu 0x488 0x7>;
221 interconnects = <&mc_virt MASTER_LLCC 0 &mc_virt SLAVE_EBI1 0>;
224 <&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
248 qcom,smem-states = <&modem_smp2p_out 0>;
255 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
256 qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
257 qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
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| /kernel/linux/linux-6.6/drivers/clk/qcom/ |
| D | gcc-sc7280.c | 44 .offset = 0x0,
47 .enable_reg = 0x52010,
48 .enable_mask = BIT(0),
61 { 0x1, 2 },
66 .offset = 0x0,
83 { 0x3, 3 },
88 .offset = 0x0,
105 .offset = 0x1000,
108 .enable_reg = 0x52010,
122 .offset = 0x1e000,
[all …]
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| D | gcc-sm8550.c | 56 .offset = 0x0,
59 .enable_reg = 0x52018,
60 .enable_mask = BIT(0),
73 { 0x1, 2 },
78 .offset = 0x0,
95 .offset = 0x4000,
98 .enable_reg = 0x52018,
112 .offset = 0x7000,
115 .enable_reg = 0x52018,
129 .offset = 0x9000,
[all …]
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| D | gcc-sdm660.c | 51 .offset = 0x0,
54 .enable_reg = 0x52000,
55 .enable_mask = BIT(0),
81 .offset = 0x00000,
94 .offset = 0x1000,
97 .enable_reg = 0x52000,
124 .offset = 0x1000,
137 .offset = 0x77000,
140 .enable_reg = 0x52000,
154 .offset = 0x77000,
[all …]
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| D | gcc-sm8350.c | 44 .offset = 0x0,
47 .enable_reg = 0x52018,
48 .enable_mask = BIT(0),
61 { 0x1, 2 },
66 .offset = 0x0,
83 .offset = 0x76000,
86 .enable_reg = 0x52018,
101 .offset = 0x1c000,
104 .enable_reg = 0x52018,
119 { P_BI_TCXO, 0 },
[all …]
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| D | gcc-msm8996.c | 49 .offset = 0x00000,
52 .enable_reg = 0x52000,
53 .enable_mask = BIT(0),
79 .offset = 0x00000,
94 .enable_reg = 0x5200c,
95 .enable_mask = BIT(0),
111 .enable_reg = 0x5200c,
126 .offset = 0x77000,
129 .enable_reg = 0x52000,
143 .offset = 0x77000,
[all …]
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| D | gcc-msm8998.c | 27 #define GCC_MMSS_MISC 0x0902C
28 #define GCC_GPU_MISC 0x71028
31 { 250000000, 2000000000, 0 },
36 .offset = 0x0,
41 .enable_reg = 0x52000,
42 .enable_mask = BIT(0),
55 .offset = 0x0,
68 .offset = 0x0,
81 .offset = 0x0,
94 .offset = 0x0,
[all …]
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| D | gcc-sdm845.c | 38 .offset = 0x0,
41 .enable_reg = 0x52000,
42 .enable_mask = BIT(0),
55 .offset = 0x76000,
58 .enable_reg = 0x52000,
72 .offset = 0x13000,
75 .enable_reg = 0x52000,
89 { 0x0, 1 },
90 { 0x1, 2 },
91 { 0x3, 4 },
[all …]
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| D | gcc-sc8280xp.c | 113 .offset = 0x0,
116 .enable_reg = 0x52028,
117 .enable_mask = BIT(0),
128 { 0x1, 2 },
133 .offset = 0x0,
150 .offset = 0x2000,
153 .enable_reg = 0x52028,
165 .offset = 0x76000,
168 .enable_reg = 0x52028,
180 .offset = 0x1a000,
[all …]
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| /kernel/linux/linux-5.10/drivers/clk/qcom/ |
| D | gcc-sdm660.c | 41 { P_XO, 0 },
53 { P_XO, 0 },
63 { P_XO, 0 },
77 { P_XO, 0 },
87 { P_XO, 0 },
97 { P_XO, 0 },
115 { P_XO, 0 },
129 { P_XO, 0 },
154 .offset = 0x0,
157 .enable_reg = 0x52000,
[all …]
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| D | gcc-msm8998.c | 39 { P_XO, 0 },
53 { P_XO, 0 },
65 { P_XO, 0 },
81 { P_XO, 0 },
93 { P_XO, 0 },
107 { P_XO, 0 },
132 { 250000000, 2000000000, 0 },
137 .offset = 0x0,
142 .enable_reg = 0x52000,
143 .enable_mask = BIT(0),
[all …]
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| D | gcc-msm8996.c | 50 { P_XO, 0 },
60 { P_XO, 0 },
70 { P_XO, 0 },
82 { P_XO, 0 },
94 { P_XO, 0 },
106 { P_XO, 0 },
120 { P_XO, 0 },
134 { P_XO, 0 },
152 { P_XO, 0 },
183 .offset = 0x00000,
[all …]
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