Home
last modified time | relevance | path

Searched +full:0 +full:x58000000 (Results 1 – 25 of 73) sorted by relevance

123

/kernel/linux/linux-6.6/arch/arm64/boot/dts/freescale/
Dimx8-ss-img.dtsi10 ranges = <0x58000000 0x0 0x58000000 0x1000000>;
14 #clock-cells = <0>;
20 reg = <0x58400000 0x00050000>;
39 reg = <0x58450000 0x00050000>;
59 reg = <0x585d0000 0x10000>;
71 reg = <0x585f0000 0x10000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/
Dfaraday,ftpci100.txt9 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
10 Technology) and product ID 0x4321.
23 - bus-range: set to <0x00 0xff>
45 - #address-cells: set to <0>
64 interrupt-map-mask = <0xf800 0 0 7>;
66 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
67 <0x4800 0 0 2 &pci_intc 1>,
68 <0x4800 0 0 3 &pci_intc 2>,
69 <0x4800 0 0 4 &pci_intc 3>,
70 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/
Dfaraday,ftpci100.yaml18 The host controller appear on the PCI bus with vendor ID 0x159b (Faraday
19 Technology) and product ID 0x4321.
34 interrupt-map-mask = <0xf800 0 0 7>;
36 <0x4800 0 0 1 &pci_intc 0>, /* Slot 9 */
37 <0x4800 0 0 2 &pci_intc 1>,
38 <0x4800 0 0 3 &pci_intc 2>,
39 <0x4800 0 0 4 &pci_intc 3>,
40 <0x5000 0 0 1 &pci_intc 1>, /* Slot 10 */
41 <0x5000 0 0 2 &pci_intc 2>,
42 <0x5000 0 0 3 &pci_intc 3>,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt46 reg = <0x0 0x57000000 0x0 0x01000000>,
47 <0x0 0x58000000 0x0 0x01000000>;
64 reg = <0x0 0x57000000 0x0 0x01000000>,
65 <0x0 0x58000000 0x0 0x01000000>;
82 reg = <0x0 0x17000000 0x0 0x1000000>,
83 <0x0 0x18000000 0x0 0x1000000>;
100 reg = <0x17000000 0x10000000>,
101 <0x18000000 0x10000000>;
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/
Dnvidia,gk20a.txt46 reg = <0x0 0x57000000 0x0 0x01000000>,
47 <0x0 0x58000000 0x0 0x01000000>;
64 reg = <0x0 0x57000000 0x0 0x01000000>,
65 <0x0 0x58000000 0x0 0x01000000>;
82 reg = <0x0 0x17000000 0x0 0x1000000>,
83 <0x0 0x18000000 0x0 0x1000000>;
100 reg = <0x17000000 0x1000000>,
101 <0x18000000 0x1000000>;
/kernel/linux/linux-6.6/arch/arm/mach-pxa/
Daddr-map.h8 #define PXA_CS0_PHYS 0x00000000
9 #define PXA_CS1_PHYS 0x04000000
10 #define PXA_CS2_PHYS 0x08000000
11 #define PXA_CS3_PHYS 0x0C000000
12 #define PXA_CS4_PHYS 0x10000000
13 #define PXA_CS5_PHYS 0x14000000
15 #define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
16 #define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
17 #define PXA3xx_CS2_PHYS 0x10000000
18 #define PXA3xx_CS3_PHYS 0x14000000
[all …]
Dpxa-regs.h14 #define UNCACHED_PHYS_0 0xfe000000
15 #define UNCACHED_PHYS_0_SIZE 0x00100000
20 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
21 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
22 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
23 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
24 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
25 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
26 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
31 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-pxa/include/mach/
Daddr-map.h8 #define PXA_CS0_PHYS 0x00000000
9 #define PXA_CS1_PHYS 0x04000000
10 #define PXA_CS2_PHYS 0x08000000
11 #define PXA_CS3_PHYS 0x0C000000
12 #define PXA_CS4_PHYS 0x10000000
13 #define PXA_CS5_PHYS 0x14000000
15 #define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
16 #define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
17 #define PXA3xx_CS2_PHYS 0x10000000
18 #define PXA3xx_CS3_PHYS 0x14000000
[all …]
Dhardware.h19 #define UNCACHED_PHYS_0 0xfe000000
20 #define UNCACHED_PHYS_0_SIZE 0x00100000
25 * 0x40000000 - 0x41ffffff <--> 0xf2000000 - 0xf3ffffff
26 * 0x44000000 - 0x45ffffff <--> 0xf4000000 - 0xf5ffffff
27 * 0x48000000 - 0x49ffffff <--> 0xf6000000 - 0xf7ffffff
28 * 0x4c000000 - 0x4dffffff <--> 0xf8000000 - 0xf9ffffff
29 * 0x50000000 - 0x51ffffff <--> 0xfa000000 - 0xfbffffff
30 * 0x54000000 - 0x55ffffff <--> 0xfc000000 - 0xfdffffff
31 * 0x58000000 - 0x59ffffff <--> 0xfe000000 - 0xffffffff
36 #define io_v2p(x) (0x3c000000 + ((x) & 0x01ffffff) + (((x) & 0x0e000000) << 1))
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dgemini.dtsi23 pinctrl-0 = <&pflash_default_pins>;
33 reg = <0x40000000 0x1000>;
41 offset = <0x0c>;
43 mask = <0xC0000000>;
51 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
161 reg = <0x41000000 0x1000>;
170 reg = <0x42000000 0x100>;
175 pinctrl-0 = <&uart_default_pins>;
181 reg = <0x43000000 0x1000>;
195 reg = <0x45000000 0x100>;
[all …]
Dpicoxcell-pc3x2.dtsi12 #address-cells = <0>;
13 #size-cells = <0>;
31 pclk: clock@0 {
43 ranges = <0 0x80000000 0x400000>;
47 reg = <0x30000 0x10000>;
54 reg = <0x40000 0x10000>;
61 reg = <0x50000 0x10000>;
69 reg = <0x60000 0x1000>;
76 reg = <0x64000 0x1000>;
82 reg = <0x80000 0x10000>;
[all …]
Domap5.dtsi45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0>;
69 reg = <0x1>;
113 reg = <0 0x48211000 0 0x1000>,
114 <0 0x48212000 0 0x2000>,
115 <0 0x48214000 0 0x2000>,
116 <0 0x48216000 0 0x2000>;
124 reg = <0 0x48281000 0 0x1000>;
152 ranges = <0 0 0 0xc0000000>;
[all …]
Domap4.dtsi40 #size-cells = <0>;
42 cpu@0 {
46 reg = <0x0>;
57 reg = <0x1>;
76 reg = <0x48241000 0x1000>,
77 <0x48240100 0x0100>;
83 reg = <0x48242000 0x1000>;
91 reg = <0x48240600 0x20>;
100 reg = <0x48281000 0x1000>;
135 reg = <0x44000000 0x1000>,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-mc.txt15 - #iommu-cells: Should be 0. This cell represents the number of cells in an
23 reg = <0x7000f000 0x400 /* controller registers */
24 0x58000000 0x02000000>; /* GART aperture */
27 interrupts = <GIC_SPI 77 0x04>;
29 #iommu-cells = <0>;
/kernel/linux/linux-6.6/arch/arm/boot/dts/gemini/
Dgemini.dtsi23 pinctrl-0 = <&pflash_default_pins>;
31 reg = <0x40000000 0x1000>;
39 offset = <0x0c>;
41 mask = <0xC0000000>;
49 pinctrl-0 = <&dram_default_pins>, <&system_default_pins>,
159 reg = <0x41000000 0x1000>;
168 reg = <0x42000000 0x100>;
173 pinctrl-0 = <&uart_default_pins>;
179 reg = <0x43000000 0x1000>;
193 reg = <0x45000000 0x100>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Dnvidia,tegra20-mc.yaml48 const: 0
69 reg = <0x7000f000 0x400>, /* Controller registers */
70 <0x58000000 0x02000000>; /* GART aperture */
74 interrupts = <0 77 4>;
76 #iommu-cells = <0>;
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Domap24xx.h19 #define L4_24XX_BASE 0x48000000
20 #define L4_WK_243X_BASE 0x49000000
21 #define L3_24XX_BASE 0x68000000
24 #define OMAP24XX_IC_BASE (L4_24XX_BASE + 0xfe000)
25 #define OMAP24XX_IVA_INTC_BASE 0x40000000
28 #define OMAP2420_32KSYNCT_BASE (L4_24XX_BASE + 0x4000)
29 #define OMAP2420_PRCM_BASE (L4_24XX_BASE + 0x8000)
30 #define OMAP2420_CM_BASE (L4_24XX_BASE + 0x8000)
32 #define OMAP2420_SDRC_BASE (L3_24XX_BASE + 0x9000)
33 #define OMAP2420_SMS_BASE 0x68008000
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-s3c/
Dmap-s3c24xx.h19 #define S3C2410_PA_IRQ (0x4A000000)
23 #define S3C2410_PA_MEMCTRL (0x48000000)
27 #define S3C2410_PA_TIMER (0x51000000)
34 #define S3C2410_PA_USBDEV (0x52000000)
38 #define S3C2410_PA_WATCHDOG (0x53000000)
52 #define S3C2410_PA_USBHOST (0x49000000)
55 #define S3C2416_PA_HSUDC (0x49800000)
59 #define S3C2410_PA_DMA (0x4B000000)
63 #define S3C2410_PA_CLKPWR (0x4C000000)
66 #define S3C2410_PA_LCD (0x4D000000)
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ti/
Dti,omap-dss.txt50 reg = <0x58000000 0x80>;
61 reg = <0x58001000 0x1000>;
70 reg = <0x58006000 0x200>,
71 <0x58006200 0x100>,
72 <0x58006300 0x100>,
73 <0x58006400 0x1000>;
99 tfp410: encoder@0 {
101 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */
104 pinctrl-0 = <&tfp410_pins>;
108 #size-cells = <0>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ti/
Dti,omap-dss.txt50 reg = <0x58000000 0x80>;
61 reg = <0x58001000 0x1000>;
70 reg = <0x58006000 0x200>,
71 <0x58006200 0x100>,
72 <0x58006300 0x100>,
73 <0x58006400 0x1000>;
99 tfp410: encoder@0 {
101 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; /* 0, power-down */
104 pinctrl-0 = <&tfp410_pins>;
108 #size-cells = <0>;
[all …]
/kernel/linux/linux-5.10/arch/nds32/kernel/
Dftrace.c22 unsigned long ip = (unsigned long)__builtin_return_address(0); in _mcount()
60 * first arg : __builtin_return_address(0) - MCOUNT_INSN_SIZE in _ftrace_caller()
64 "move $r1, %0 \n\t" in _ftrace_caller()
67 : "r" (parent_ip), "r" (__builtin_return_address(0))); in _ftrace_caller()
89 return 0; in ftrace_dyn_arch_init()
94 unsigned long opcode = 0x46000000; in gen_sethi_insn()
96 unsigned long rt_num = 0xf << 20; in gen_sethi_insn()
103 unsigned long opcode = 0x58000000; in gen_ori_insn()
104 unsigned long imm = addr & 0x0000fff; in gen_ori_insn()
105 unsigned long rt_num = 0xf << 20; in gen_ori_insn()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/etnaviv/
Dcmdstream.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
42 #define FE_OPCODE_LOAD_STATE 0x00000001
43 #define FE_OPCODE_END 0x00000002
44 #define FE_OPCODE_NOP 0x00000003
45 #define FE_OPCODE_DRAW_2D 0x00000004
46 #define FE_OPCODE_DRAW_PRIMITIVES 0x00000005
47 #define FE_OPCODE_DRAW_INDEXED_PRIMITIVES 0x00000006
48 #define FE_OPCODE_WAIT 0x00000007
49 #define FE_OPCODE_LINK 0x00000008
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/etnaviv/
Dcmdstream.xml.h7 http://0x04.net/cgit/index.cgi/rules-ng-ng
8 git clone git://0x04.net/rules-ng-ng
42 #define FE_OPCODE_LOAD_STATE 0x00000001
43 #define FE_OPCODE_END 0x00000002
44 #define FE_OPCODE_NOP 0x00000003
45 #define FE_OPCODE_DRAW_2D 0x00000004
46 #define FE_OPCODE_DRAW_PRIMITIVES 0x00000005
47 #define FE_OPCODE_DRAW_INDEXED_PRIMITIVES 0x00000006
48 #define FE_OPCODE_WAIT 0x00000007
49 #define FE_OPCODE_LINK 0x00000008
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dr9a09g011-v2mevk2.dts33 #size-cells = <0>;
35 port@0 {
36 reg = <0>;
57 reg = <0x0 0x58000000 0x0 0x28000000>;
62 reg = <0x1 0x80000000 0x0 0x80000000>;
90 gpios = <&pwc 0 GPIO_ACTIVE_HIGH>;
92 states = <3300000 0>, <1800000 1>;
102 phy0: ethernet-phy@0 {
105 reg = <0>;
110 pinctrl-0 = <&emmc_pins>;
[all …]

123