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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/crypto/
Dqcom-qce.yaml145 reg = <0xfd45a000 0x6000>;
152 iommus = <&apps_smmu 0x584 0x0011>,
153 <&apps_smmu 0x586 0x0011>,
154 <&apps_smmu 0x594 0x0011>,
155 <&apps_smmu 0x596 0x0011>;
/kernel/linux/linux-5.10/drivers/media/i2c/
Dsaa717x.c36 MODULE_PARM_DESC(debug, "Debug level (0-1)");
76 #define TUNER_AUDIO_MONO 0 /* LL */
90 int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488; in saa717x_write()
94 msg.flags = 0; in saa717x_write()
96 mm1[0] = (reg >> 8) & 0xff; in saa717x_write()
97 mm1[1] = reg & 0xff; in saa717x_write()
100 mm1[4] = (value >> 16) & 0xff; in saa717x_write()
101 mm1[3] = (value >> 8) & 0xff; in saa717x_write()
102 mm1[2] = value & 0xff; in saa717x_write()
104 mm1[2] = value & 0xff; in saa717x_write()
[all …]
/kernel/linux/linux-6.6/drivers/media/i2c/
Dsaa717x.c36 MODULE_PARM_DESC(debug, "Debug level (0-1)");
76 #define TUNER_AUDIO_MONO 0 /* LL */
90 int fw_addr = reg == 0x454 || (reg >= 0x464 && reg <= 0x478) || reg == 0x480 || reg == 0x488; in saa717x_write()
94 msg.flags = 0; in saa717x_write()
96 mm1[0] = (reg >> 8) & 0xff; in saa717x_write()
97 mm1[1] = reg & 0xff; in saa717x_write()
100 mm1[4] = (value >> 16) & 0xff; in saa717x_write()
101 mm1[3] = (value >> 8) & 0xff; in saa717x_write()
102 mm1[2] = value & 0xff; in saa717x_write()
104 mm1[2] = value & 0xff; in saa717x_write()
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/mt6358/
Dregisters.h10 #define MT6358_SWCID 0xa
11 #define MT6358_MISC_TOP_INT_CON0 0x188
12 #define MT6358_MISC_TOP_INT_STATUS0 0x194
13 #define MT6358_TOP_INT_STATUS0 0x19e
14 #define MT6358_SCK_TOP_INT_CON0 0x52e
15 #define MT6358_SCK_TOP_INT_STATUS0 0x53a
16 #define MT6358_EOSC_CALI_CON0 0x540
17 #define MT6358_EOSC_CALI_CON1 0x542
18 #define MT6358_RTC_MIX_CON0 0x544
19 #define MT6358_RTC_MIX_CON1 0x546
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/mt6358/
Dregisters.h10 #define MT6358_SWCID 0xa
11 #define MT6358_TOPSTATUS 0x28
12 #define MT6358_TOP_RST_MISC 0x14c
13 #define MT6358_MISC_TOP_INT_CON0 0x188
14 #define MT6358_MISC_TOP_INT_STATUS0 0x194
15 #define MT6358_TOP_INT_STATUS0 0x19e
16 #define MT6358_SCK_TOP_INT_CON0 0x52e
17 #define MT6358_SCK_TOP_INT_STATUS0 0x53a
18 #define MT6358_EOSC_CALI_CON0 0x540
19 #define MT6358_EOSC_CALI_CON1 0x542
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/mt6359/
Dregisters.h10 #define MT6359_SWCID 0xa
11 #define MT6359_TOPSTATUS 0x2a
12 #define MT6359_TOP_RST_MISC 0x14c
13 #define MT6359_MISC_TOP_INT_CON0 0x188
14 #define MT6359_MISC_TOP_INT_STATUS0 0x194
15 #define MT6359_TOP_INT_STATUS0 0x19e
16 #define MT6359_SCK_TOP_INT_CON0 0x528
17 #define MT6359_SCK_TOP_INT_STATUS0 0x534
18 #define MT6359_EOSC_CALI_CON0 0x53a
19 #define MT6359_EOSC_CALI_CON1 0x53c
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/saa7134/
Dsaa7134-reg.h12 # define PCI_DEVICE_ID_PHILIPS_SAA7130 0x7130
15 # define PCI_DEVICE_ID_PHILIPS_SAA7133 0x7133
18 # define PCI_DEVICE_ID_PHILIPS_SAA7134 0x7134
21 # define PCI_DEVICE_ID_PHILIPS_SAA7135 0x7135
29 /* DMA channels, n = 0 ... 6 */
30 #define SAA7134_RS_BA1(n) ((0x200 >> 2) + 4*n)
31 #define SAA7134_RS_BA2(n) ((0x204 >> 2) + 4*n)
32 #define SAA7134_RS_PITCH(n) ((0x208 >> 2) + 4*n)
33 #define SAA7134_RS_CONTROL(n) ((0x20c >> 2) + 4*n)
34 #define SAA7134_RS_CONTROL_WSWAP (0x01 << 25)
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/saa7134/
Dsaa7134-reg.h12 # define PCI_DEVICE_ID_PHILIPS_SAA7130 0x7130
15 # define PCI_DEVICE_ID_PHILIPS_SAA7133 0x7133
18 # define PCI_DEVICE_ID_PHILIPS_SAA7134 0x7134
21 # define PCI_DEVICE_ID_PHILIPS_SAA7135 0x7135
29 /* DMA channels, n = 0 ... 6 */
30 #define SAA7134_RS_BA1(n) ((0x200 >> 2) + 4*n)
31 #define SAA7134_RS_BA2(n) ((0x204 >> 2) + 4*n)
32 #define SAA7134_RS_PITCH(n) ((0x208 >> 2) + 4*n)
33 #define SAA7134_RS_CONTROL(n) ((0x20c >> 2) + 4*n)
34 #define SAA7134_RS_CONTROL_WSWAP (0x01 << 25)
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/mt6357/
Dregisters.h10 #define MT6357_TOP0_ID 0x0
11 #define MT6357_TOP0_REV0 0x2
12 #define MT6357_TOP0_DSN_DBI 0x4
13 #define MT6357_TOP0_DSN_DXI 0x6
14 #define MT6357_HWCID 0x8
15 #define MT6357_SWCID 0xa
16 #define MT6357_PONSTS 0xc
17 #define MT6357_POFFSTS 0xe
18 #define MT6357_PSTSCTL 0x10
19 #define MT6357_PG_DEB_STS0 0x12
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dwm8996.h29 #define WM8996_SOFTWARE_RESET 0x00
30 #define WM8996_POWER_MANAGEMENT_1 0x01
31 #define WM8996_POWER_MANAGEMENT_2 0x02
32 #define WM8996_POWER_MANAGEMENT_3 0x03
33 #define WM8996_POWER_MANAGEMENT_4 0x04
34 #define WM8996_POWER_MANAGEMENT_5 0x05
35 #define WM8996_POWER_MANAGEMENT_6 0x06
36 #define WM8996_POWER_MANAGEMENT_7 0x07
37 #define WM8996_POWER_MANAGEMENT_8 0x08
38 #define WM8996_LEFT_LINE_INPUT_VOLUME 0x10
[all …]
Dwm8995.h18 #define WM8995_SOFTWARE_RESET 0x00
19 #define WM8995_POWER_MANAGEMENT_1 0x01
20 #define WM8995_POWER_MANAGEMENT_2 0x02
21 #define WM8995_POWER_MANAGEMENT_3 0x03
22 #define WM8995_POWER_MANAGEMENT_4 0x04
23 #define WM8995_POWER_MANAGEMENT_5 0x05
24 #define WM8995_LEFT_LINE_INPUT_1_VOLUME 0x10
25 #define WM8995_RIGHT_LINE_INPUT_1_VOLUME 0x11
26 #define WM8995_LEFT_LINE_INPUT_CONTROL 0x12
27 #define WM8995_DAC1_LEFT_VOLUME 0x18
[all …]
Dwm5100.h26 #define WM5100_CLKSRC_MCLK1 0
34 #define WM5100_CLKSRC_ASYNCCLK 0x100
39 #define WM5100_FLL_SRC_MCLK1 0x0
40 #define WM5100_FLL_SRC_MCLK2 0x1
41 #define WM5100_FLL_SRC_FLL1 0x4
42 #define WM5100_FLL_SRC_FLL2 0x5
43 #define WM5100_FLL_SRC_AIF1BCLK 0x8
44 #define WM5100_FLL_SRC_AIF2BCLK 0x9
45 #define WM5100_FLL_SRC_AIF3BCLK 0xa
50 #define WM5100_SOFTWARE_RESET 0x00
[all …]
/kernel/linux/linux-6.6/sound/soc/codecs/
Dwm8996.h29 #define WM8996_SOFTWARE_RESET 0x00
30 #define WM8996_POWER_MANAGEMENT_1 0x01
31 #define WM8996_POWER_MANAGEMENT_2 0x02
32 #define WM8996_POWER_MANAGEMENT_3 0x03
33 #define WM8996_POWER_MANAGEMENT_4 0x04
34 #define WM8996_POWER_MANAGEMENT_5 0x05
35 #define WM8996_POWER_MANAGEMENT_6 0x06
36 #define WM8996_POWER_MANAGEMENT_7 0x07
37 #define WM8996_POWER_MANAGEMENT_8 0x08
38 #define WM8996_LEFT_LINE_INPUT_VOLUME 0x10
[all …]
Dwm8995.h18 #define WM8995_SOFTWARE_RESET 0x00
19 #define WM8995_POWER_MANAGEMENT_1 0x01
20 #define WM8995_POWER_MANAGEMENT_2 0x02
21 #define WM8995_POWER_MANAGEMENT_3 0x03
22 #define WM8995_POWER_MANAGEMENT_4 0x04
23 #define WM8995_POWER_MANAGEMENT_5 0x05
24 #define WM8995_LEFT_LINE_INPUT_1_VOLUME 0x10
25 #define WM8995_RIGHT_LINE_INPUT_1_VOLUME 0x11
26 #define WM8995_LEFT_LINE_INPUT_CONTROL 0x12
27 #define WM8995_DAC1_LEFT_VOLUME 0x18
[all …]
Dwm5100.h26 #define WM5100_CLKSRC_MCLK1 0
34 #define WM5100_CLKSRC_ASYNCCLK 0x100
39 #define WM5100_FLL_SRC_MCLK1 0x0
40 #define WM5100_FLL_SRC_MCLK2 0x1
41 #define WM5100_FLL_SRC_FLL1 0x4
42 #define WM5100_FLL_SRC_FLL2 0x5
43 #define WM5100_FLL_SRC_AIF1BCLK 0x8
44 #define WM5100_FLL_SRC_AIF2BCLK 0x9
45 #define WM5100_FLL_SRC_AIF3BCLK 0xa
50 #define WM5100_SOFTWARE_RESET 0x00
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/kernel/linux/linux-6.6/drivers/mfd/
Dcs47l15-tables.c19 { 0x8C, 0x5555 },
20 { 0x8C, 0xAAAA },
21 { 0x314, 0x0080 },
22 { 0x4A8, 0x6023 },
23 { 0x4A9, 0x6023 },
24 { 0x4D4, 0x0008 },
25 { 0x4CF, 0x0F00 },
26 { 0x4D7, 0x1B2B },
27 { 0x8C, 0xCCCC },
28 { 0x8C, 0x3333 },
[all …]
Dcs47l35-tables.c18 { 0x460, 0x0c40 },
19 { 0x461, 0xcd1a },
20 { 0x462, 0x0c40 },
21 { 0x463, 0xb53b },
22 { 0x464, 0x0c40 },
23 { 0x465, 0x7503 },
24 { 0x466, 0x0c40 },
25 { 0x467, 0x4a41 },
26 { 0x468, 0x0041 },
27 { 0x469, 0x3491 },
[all …]
Dcs47l92-tables.c21 { 0x3A2, 0x2C29 },
22 { 0x3A3, 0x0E00 },
23 { 0x281, 0x0000 },
24 { 0x282, 0x0000 },
25 { 0x4EA, 0x0100 },
26 { 0x22B, 0x0000 },
27 { 0x4A0, 0x0080 },
28 { 0x4A1, 0x0000 },
29 { 0x4A2, 0x0000 },
30 { 0x180B, 0x033F },
[all …]
/kernel/linux/linux-5.10/drivers/mfd/
Dcs47l15-tables.c19 { 0x8C, 0x5555 },
20 { 0x8C, 0xAAAA },
21 { 0x314, 0x0080 },
22 { 0x4A8, 0x6023 },
23 { 0x4A9, 0x6023 },
24 { 0x4D4, 0x0008 },
25 { 0x4CF, 0x0F00 },
26 { 0x4D7, 0x1B2B },
27 { 0x8C, 0xCCCC },
28 { 0x8C, 0x3333 },
[all …]
Dcs47l35-tables.c18 { 0x460, 0x0c40 },
19 { 0x461, 0xcd1a },
20 { 0x462, 0x0c40 },
21 { 0x463, 0xb53b },
22 { 0x464, 0x0c40 },
23 { 0x465, 0x7503 },
24 { 0x466, 0x0c40 },
25 { 0x467, 0x4a41 },
26 { 0x468, 0x0041 },
27 { 0x469, 0x3491 },
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsm8250.dtsi81 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #size-cells = <0>;
97 CPU0: cpu@0 {
100 reg = <0x0 0x0>;
101 clocks = <&cpufreq_hw 0>;
108 qcom,freq-domain = <&cpufreq_hw 0>;
110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
116 cache-size = <0x20000>;
122 cache-size = <0x400000>;
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/madera/
Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/kernel/linux/linux-6.6/include/linux/mfd/wm8994/
Dregisters.h16 #define WM8994_SOFTWARE_RESET 0x00
17 #define WM8994_POWER_MANAGEMENT_1 0x01
18 #define WM8994_POWER_MANAGEMENT_2 0x02
19 #define WM8994_POWER_MANAGEMENT_3 0x03
20 #define WM8994_POWER_MANAGEMENT_4 0x04
21 #define WM8994_POWER_MANAGEMENT_5 0x05
22 #define WM8994_POWER_MANAGEMENT_6 0x06
23 #define WM8994_INPUT_MIXER_1 0x15
24 #define WM8994_LEFT_LINE_INPUT_1_2_VOLUME 0x18
25 #define WM8994_LEFT_LINE_INPUT_3_4_VOLUME 0x19
[all …]
/kernel/linux/linux-5.10/include/linux/mfd/wm8994/
Dregisters.h16 #define WM8994_SOFTWARE_RESET 0x00
17 #define WM8994_POWER_MANAGEMENT_1 0x01
18 #define WM8994_POWER_MANAGEMENT_2 0x02
19 #define WM8994_POWER_MANAGEMENT_3 0x03
20 #define WM8994_POWER_MANAGEMENT_4 0x04
21 #define WM8994_POWER_MANAGEMENT_5 0x05
22 #define WM8994_POWER_MANAGEMENT_6 0x06
23 #define WM8994_INPUT_MIXER_1 0x15
24 #define WM8994_LEFT_LINE_INPUT_1_2_VOLUME 0x18
25 #define WM8994_LEFT_LINE_INPUT_3_4_VOLUME 0x19
[all …]

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