| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/ |
| D | qcom,glink.txt | 67 reg = <0x9820000 0x1000>; 74 reg = <0x68000 0x6000>; 84 mboxes = <&apcs_glb 0>; 90 qcom,intents = <0x400 5 91 0x800 1>;
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| /kernel/linux/linux-6.6/drivers/net/wireless/intel/iwlwifi/cfg/ |
| D | 8000.c | 20 #define IWL8000_NVM_VERSION 0x0a1d 23 #define IWL8260_DCCM_OFFSET 0x800000 24 #define IWL8260_DCCM_LEN 0x18000 25 #define IWL8260_DCCM2_OFFSET 0x880000 26 #define IWL8260_DCCM2_LEN 0x8000 27 #define IWL8260_SMEM_OFFSET 0x400000 28 #define IWL8260_SMEM_LEN 0x68000 97 .min_umac_error_event_table = 0x800000
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| D | 9000.c | 19 #define IWL9000_NVM_VERSION 0x0a1d 22 #define IWL9000_DCCM_OFFSET 0x800000 23 #define IWL9000_DCCM_LEN 0x18000 24 #define IWL9000_DCCM2_OFFSET 0x880000 25 #define IWL9000_DCCM2_LEN 0x8000 26 #define IWL9000_SMEM_OFFSET 0x400000 27 #define IWL9000_SMEM_LEN 0x68000 92 .mac_addr_from_csr = 0x380, \ 95 .min_umac_error_event_table = 0x800000, \ 96 .d3_debug_data_base_addr = 0x401000, \ [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | qcom,lpass-cpu.yaml | 66 const: 0 69 "^dai-link@[0-9a-f]$": 187 reg = <0 0x62d87000 0 0x68000>, 188 <0 0x62f00000 0 0x29000>; 191 iommus = <&apps_smmu 0x1020 0>, 192 <&apps_smmu 0x1032 0>; 193 power-domains = <&lpass_hm 0>; 206 interrupts = <0 160 1>, 207 <0 268 1>; 213 #size-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-ux500/ |
| D | db8500-regs.h | 10 #define U8500_ESRAM_BASE 0x40000000 11 #define U8500_ESRAM_BANK_SIZE 0x00020000 21 #define U8500_ESRAM_DMA_LCPA_OFFSET 0x10000 28 #define U8500_PER3_BASE 0x80000000 29 #define U8500_STM_BASE 0x80100000 30 #define U8500_STM_REG_BASE (U8500_STM_BASE + 0xF000) 31 #define U8500_PER2_BASE 0x80110000 32 #define U8500_PER1_BASE 0x80120000 33 #define U8500_B2R2_BASE 0x80130000 34 #define U8500_HSEM_BASE 0x80140000 [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | qcom,lpass-cpu.yaml | 78 const: 0 81 "^dai-link@[0-9a-f]+$": 254 reg = <0 0x62d87000 0 0x68000>, 255 <0 0x62f00000 0 0x29000>; 258 iommus = <&apps_smmu 0x1020 0>, 259 <&apps_smmu 0x1032 0>; 260 power-domains = <&lpass_hm 0>; 273 interrupts = <0 160 1>, 274 <0 268 1>; 280 #size-cells = <0>; [all …]
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| /kernel/linux/linux-5.10/drivers/net/wireless/intel/iwlwifi/cfg/ |
| D | 8000.c | 77 #define IWL8000_NVM_VERSION 0x0a1d 80 #define IWL8260_DCCM_OFFSET 0x800000 81 #define IWL8260_DCCM_LEN 0x18000 82 #define IWL8260_DCCM2_OFFSET 0x880000 83 #define IWL8260_DCCM2_LEN 0x8000 84 #define IWL8260_SMEM_OFFSET 0x400000 85 #define IWL8260_SMEM_LEN 0x68000 154 .min_umac_error_event_table = 0x800000
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| D | 9000.c | 67 #define IWL9000_NVM_VERSION 0x0a1d 70 #define IWL9000_DCCM_OFFSET 0x800000 71 #define IWL9000_DCCM_LEN 0x18000 72 #define IWL9000_DCCM2_OFFSET 0x880000 73 #define IWL9000_DCCM2_LEN 0x8000 74 #define IWL9000_SMEM_OFFSET 0x400000 75 #define IWL9000_SMEM_LEN 0x68000 143 .min_umac_error_event_table = 0x800000, \ 144 .d3_debug_data_base_addr = 0x401000, \ 162 .mask = 0xffffffff, \ [all …]
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| /kernel/linux/linux-6.6/drivers/accel/habanalabs/include/gaudi/asic_reg/ |
| D | mme0_qm_regs.h | 22 #define mmMME0_QM_GLBL_CFG0 0x68000 24 #define mmMME0_QM_GLBL_CFG1 0x68004 26 #define mmMME0_QM_GLBL_PROT 0x68008 28 #define mmMME0_QM_GLBL_ERR_CFG 0x6800C 30 #define mmMME0_QM_GLBL_SECURE_PROPS_0 0x68010 32 #define mmMME0_QM_GLBL_SECURE_PROPS_1 0x68014 34 #define mmMME0_QM_GLBL_SECURE_PROPS_2 0x68018 36 #define mmMME0_QM_GLBL_SECURE_PROPS_3 0x6801C 38 #define mmMME0_QM_GLBL_SECURE_PROPS_4 0x68020 40 #define mmMME0_QM_GLBL_NON_SECURE_PROPS_0 0x68024 [all …]
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| /kernel/linux/linux-5.10/drivers/misc/habanalabs/include/gaudi/asic_reg/ |
| D | mme0_qm_regs.h | 22 #define mmMME0_QM_GLBL_CFG0 0x68000 24 #define mmMME0_QM_GLBL_CFG1 0x68004 26 #define mmMME0_QM_GLBL_PROT 0x68008 28 #define mmMME0_QM_GLBL_ERR_CFG 0x6800C 30 #define mmMME0_QM_GLBL_SECURE_PROPS_0 0x68010 32 #define mmMME0_QM_GLBL_SECURE_PROPS_1 0x68014 34 #define mmMME0_QM_GLBL_SECURE_PROPS_2 0x68018 36 #define mmMME0_QM_GLBL_SECURE_PROPS_3 0x6801C 38 #define mmMME0_QM_GLBL_SECURE_PROPS_4 0x68020 40 #define mmMME0_QM_GLBL_NON_SECURE_PROPS_0 0x68024 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/hdcp/ |
| D | hdcp_msg.c | 79 [HDCP_MESSAGE_ID_READ_BKSV] = 0x0, 80 [HDCP_MESSAGE_ID_READ_RI_R0] = 0x8, 81 [HDCP_MESSAGE_ID_READ_PJ] = 0xA, 82 [HDCP_MESSAGE_ID_WRITE_AKSV] = 0x10, 83 [HDCP_MESSAGE_ID_WRITE_AINFO] = 0x15, 84 [HDCP_MESSAGE_ID_WRITE_AN] = 0x18, 85 [HDCP_MESSAGE_ID_READ_VH_X] = 0x20, 86 [HDCP_MESSAGE_ID_READ_VH_0] = 0x20, 87 [HDCP_MESSAGE_ID_READ_VH_1] = 0x24, 88 [HDCP_MESSAGE_ID_READ_VH_2] = 0x28, [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/hdcp/ |
| D | hdcp_msg.c | 79 [HDCP_MESSAGE_ID_READ_BKSV] = 0x0, 80 [HDCP_MESSAGE_ID_READ_RI_R0] = 0x8, 81 [HDCP_MESSAGE_ID_READ_PJ] = 0xA, 82 [HDCP_MESSAGE_ID_WRITE_AKSV] = 0x10, 83 [HDCP_MESSAGE_ID_WRITE_AINFO] = 0x15, 84 [HDCP_MESSAGE_ID_WRITE_AN] = 0x18, 85 [HDCP_MESSAGE_ID_READ_VH_X] = 0x20, 86 [HDCP_MESSAGE_ID_READ_VH_0] = 0x20, 87 [HDCP_MESSAGE_ID_READ_VH_1] = 0x24, 88 [HDCP_MESSAGE_ID_READ_VH_2] = 0x28, [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/i915/display/ |
| D | intel_tv_regs.h | 12 #define TV_CTL _MMIO(0x68000) 20 # define TV_ENC_OUTPUT_COMPOSITE (0 << 28) 31 # define TV_OVERSAMPLE_4X (0 << 18) 54 # define TV_CTL_SAVE ((1 << 11) | (3 << 9) | (7 << 6) | 0xf) 57 # define TV_FUSE_STATE_ENABLED (0 << 4) 63 # define TV_TEST_MODE_NORMAL (0 << 0) 65 # define TV_TEST_MODE_PATTERN_1 (1 << 0) 67 # define TV_TEST_MODE_PATTERN_2 (2 << 0) 69 # define TV_TEST_MODE_PATTERN_3 (3 << 0) 71 # define TV_TEST_MODE_PATTERN_4 (4 << 0) [all …]
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| /kernel/linux/linux-5.10/drivers/parisc/ |
| D | superio.c | 32 * Function 0 is an IDE controller. It is identical to a PC87415 IDE 54 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92 55 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM 100 outb (OCW3_POLL,IC_PIC1+0); in superio_interrupt() 102 results = inb(IC_PIC1+0); in superio_interrupt() 105 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending in superio_interrupt() 107 * Bits 2-0: highest priority, active requesting interrupt ID (0-7) in superio_interrupt() 109 if ((results & 0x80) == 0) { in superio_interrupt() 118 local_irq = results & 0x0f; in superio_interrupt() 129 outb(OCW3_ISR,IC_PIC1+0); in superio_interrupt() [all …]
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| /kernel/linux/linux-6.6/drivers/parisc/ |
| D | superio.c | 32 * Function 0 is an IDE controller. It is identical to a PC87415 IDE 54 * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92 55 * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM 100 outb (OCW3_POLL,IC_PIC1+0); in superio_interrupt() 102 results = inb(IC_PIC1+0); in superio_interrupt() 105 * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending in superio_interrupt() 107 * Bits 2-0: highest priority, active requesting interrupt ID (0-7) in superio_interrupt() 109 if ((results & 0x80) == 0) { in superio_interrupt() 118 local_irq = results & 0x0f; in superio_interrupt() 129 outb(OCW3_ISR,IC_PIC1+0); in superio_interrupt() [all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | t4240si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 54 interrupts = <25 2 0 0>; 57 /* controller at 0x240000 */ 59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 63 bus-range = <0x0 0xff>; 64 interrupts = <20 2 0 0>; 65 pcie@0 { 70 reg = <0 0 0 0 0>; [all …]
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| /kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/ |
| D | t4240si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 54 interrupts = <25 2 0 0>; 57 /* controller at 0x240000 */ 59 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0"; 63 bus-range = <0x0 0xff>; 64 interrupts = <20 2 0 0>; 65 pcie@0 { 70 reg = <0 0 0 0 0>; [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/modules/hdcp/ |
| D | hdcp_ddc.c | 29 #define HDCP_I2C_ADDR 0x3a /* 0x74 >> 1*/ 30 #define KSV_READ_SIZE 0xf /* 0x6803b - 0x6802c */ 40 MOD_HDCP_MESSAGE_ID_READ_BKSV = 0, 81 [MOD_HDCP_MESSAGE_ID_READ_BKSV] = 0x0, 82 [MOD_HDCP_MESSAGE_ID_READ_RI_R0] = 0x8, 83 [MOD_HDCP_MESSAGE_ID_WRITE_AKSV] = 0x10, 84 [MOD_HDCP_MESSAGE_ID_WRITE_AINFO] = 0x15, 85 [MOD_HDCP_MESSAGE_ID_WRITE_AN] = 0x18, 86 [MOD_HDCP_MESSAGE_ID_READ_VH_X] = 0x20, 87 [MOD_HDCP_MESSAGE_ID_READ_VH_0] = 0x20, [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/modules/hdcp/ |
| D | hdcp_ddc.c | 29 #define HDCP_I2C_ADDR 0x3a /* 0x74 >> 1*/ 30 #define KSV_READ_SIZE 0xf /* 0x6803b - 0x6802c */ 40 MOD_HDCP_MESSAGE_ID_READ_BKSV = 0, 81 [MOD_HDCP_MESSAGE_ID_READ_BKSV] = 0x0, 82 [MOD_HDCP_MESSAGE_ID_READ_RI_R0] = 0x8, 83 [MOD_HDCP_MESSAGE_ID_WRITE_AKSV] = 0x10, 84 [MOD_HDCP_MESSAGE_ID_WRITE_AINFO] = 0x15, 85 [MOD_HDCP_MESSAGE_ID_WRITE_AN] = 0x18, 86 [MOD_HDCP_MESSAGE_ID_READ_VH_X] = 0x20, 87 [MOD_HDCP_MESSAGE_ID_READ_VH_0] = 0x20, [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| D | mmhub_3_0_2_offset.h | 29 // base address: 0x68000 30 …DAGB0_RDCLI0 0x0000 31 …e regDAGB0_RDCLI0_BASE_IDX 0 32 …DAGB0_RDCLI1 0x0001 33 …e regDAGB0_RDCLI1_BASE_IDX 0 34 …DAGB0_RDCLI2 0x0002 35 …e regDAGB0_RDCLI2_BASE_IDX 0 36 …DAGB0_RDCLI3 0x0003 37 …e regDAGB0_RDCLI3_BASE_IDX 0 38 …DAGB0_RDCLI4 0x0004 [all …]
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| D | mmhub_3_0_0_offset.h | 29 // base address: 0x68000 30 …DAGB0_RDCLI0 0x0000 31 …e regDAGB0_RDCLI0_BASE_IDX 0 32 …DAGB0_RDCLI1 0x0001 33 …e regDAGB0_RDCLI1_BASE_IDX 0 34 …DAGB0_RDCLI2 0x0002 35 …e regDAGB0_RDCLI2_BASE_IDX 0 36 …DAGB0_RDCLI3 0x0003 37 …e regDAGB0_RDCLI3_BASE_IDX 0 38 …DAGB0_RDCLI4 0x0004 [all …]
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| D | mmhub_2_0_0_offset.h | 27 // base address: 0x68000 28 …DAGB0_RDCLI0 0x0000 29 …ne mmDAGB0_RDCLI0_BASE_IDX 0 30 …DAGB0_RDCLI1 0x0001 31 …ne mmDAGB0_RDCLI1_BASE_IDX 0 32 …DAGB0_RDCLI2 0x0002 33 …ne mmDAGB0_RDCLI2_BASE_IDX 0 34 …DAGB0_RDCLI3 0x0003 35 …ne mmDAGB0_RDCLI3_BASE_IDX 0 36 …DAGB0_RDCLI4 0x0004 [all …]
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| D | mmhub_3_0_1_offset.h | 29 // base address: 0x68000 30 …DAGB0_RDCLI0 0x0000 32 …DAGB0_RDCLI1 0x0001 34 …DAGB0_RDCLI2 0x0002 36 …DAGB0_RDCLI3 0x0003 38 …DAGB0_RDCLI4 0x0004 40 …DAGB0_RDCLI5 0x0005 42 …DAGB0_RDCLI6 0x0006 44 …DAGB0_RDCLI7 0x0007 46 …DAGB0_RDCLI8 0x0008 [all …]
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| D | mmhub_9_1_offset.h | 27 // base address: 0x68000 28 …DAGB0_RDCLI0 0x0000 29 …ne mmDAGB0_RDCLI0_BASE_IDX 0 30 …DAGB0_RDCLI1 0x0001 31 …ne mmDAGB0_RDCLI1_BASE_IDX 0 32 …DAGB0_RDCLI2 0x0002 33 …ne mmDAGB0_RDCLI2_BASE_IDX 0 34 …DAGB0_RDCLI3 0x0003 35 …ne mmDAGB0_RDCLI3_BASE_IDX 0 36 …DAGB0_RDCLI4 0x0004 [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/include/asic_reg/mmhub/ |
| D | mmhub_2_0_0_offset.h | 27 // base address: 0x68000 28 …DAGB0_RDCLI0 0x0000 29 …ne mmDAGB0_RDCLI0_BASE_IDX 0 30 …DAGB0_RDCLI1 0x0001 31 …ne mmDAGB0_RDCLI1_BASE_IDX 0 32 …DAGB0_RDCLI2 0x0002 33 …ne mmDAGB0_RDCLI2_BASE_IDX 0 34 …DAGB0_RDCLI3 0x0003 35 …ne mmDAGB0_RDCLI3_BASE_IDX 0 36 …DAGB0_RDCLI4 0x0004 [all …]
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