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/kernel/linux/linux-6.6/include/uapi/linux/
Drpmsg.h12 #define RPMSG_ADDR_ANY 0xFFFFFFFF
29 #define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
34 #define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
39 #define RPMSG_CREATE_DEV_IOCTL _IOW(0xb5, 0x3, struct rpmsg_endpoint_info)
44 #define RPMSG_RELEASE_DEV_IOCTL _IOW(0xb5, 0x4, struct rpmsg_endpoint_info)
49 #define RPMSG_GET_OUTGOING_FLOWCONTROL _IOR(0xb5, 0x5, int)
54 #define RPMSG_SET_INCOMING_FLOWCONTROL _IOR(0xb5, 0x6, int)
/kernel/linux/linux-6.6/drivers/net/wireless/intersil/p54/
Dp54spi_eeprom.h19 0x47, 0x4d, 0x55, 0xaa, /* magic */
20 0x00, 0x00, /* pad */
21 0x00, 0x00, /* eeprom_pda_data_wrap length */
22 0x00, 0x00, 0x00, 0x00, /* arm opcode */
25 0x04, 0x00, 0x01, 0x01, /* PDR_MAC_ADDRESS */
26 0x00, 0x02, 0xee, 0xc0, 0xff, 0xee,
29 0x06, 0x00, 0x01, 0x10, /* PDR_INTERFACE_LIST */
30 0x00, 0x00, /* role */
31 0x0f, 0x00, /* if_id */
32 0x85, 0x00, /* variant = Longbow RF, 2GHz */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/intersil/p54/
Dp54spi_eeprom.h19 0x47, 0x4d, 0x55, 0xaa, /* magic */
20 0x00, 0x00, /* pad */
21 0x00, 0x00, /* eeprom_pda_data_wrap length */
22 0x00, 0x00, 0x00, 0x00, /* arm opcode */
25 0x04, 0x00, 0x01, 0x01, /* PDR_MAC_ADDRESS */
26 0x00, 0x02, 0xee, 0xc0, 0xff, 0xee,
29 0x06, 0x00, 0x01, 0x10, /* PDR_INTERFACE_LIST */
30 0x00, 0x00, /* role */
31 0x0f, 0x00, /* if_id */
32 0x85, 0x00, /* variant = Longbow RF, 2GHz */
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/panel/
Dpanel-samsung-ld9040.c26 #define MCS_MANPWR 0xb0
27 #define MCS_ELVSS_ON 0xb1
28 #define MCS_USER_SETTING 0xf0
29 #define MCS_DISPCTL 0xf2
30 #define MCS_POWER_CTRL 0xf4
31 #define MCS_GTCON 0xf7
32 #define MCS_PANEL_CONDITION 0xf8
33 #define MCS_GAMMA_SET1 0xf9
34 #define MCS_GAMMA_CTRL 0xfb
38 { 0xf9, 0x00, 0x13, 0xb2, 0xba, 0xd2, 0x00, 0x30, 0x00, 0xaf, 0xc0,
[all …]
Dpanel-boe-himax8279d.c63 gpiod_set_value(pinfo->enable_gpio, 0); in disable_gpios()
64 gpiod_set_value(pinfo->pp33_gpio, 0); in disable_gpios()
65 gpiod_set_value(pinfo->pp18_gpio, 0); in disable_gpios()
71 unsigned int i = 0; in send_mipi_cmds()
74 for (i = 0; i < pinfo->desc->on_cmds_num; i++) { in send_mipi_cmds()
78 if (err < 0) in send_mipi_cmds()
82 return 0; in send_mipi_cmds()
91 return 0; in boe_panel_disable()
94 if (err < 0) { in boe_panel_disable()
101 return 0; in boe_panel_disable()
[all …]
Dpanel-samsung-s6e8aa0.c34 #define PANELCTL_SS_1_800 (0 << 5)
41 #define PANELCTL_CLK1_000 (0 << 3)
43 #define PANELCTL_CLK2_CON_MASK (7 << 0)
44 #define PANELCTL_CLK2_000 (0 << 0)
45 #define PANELCTL_CLK2_001 (1 << 0)
48 #define PANELCTL_INT1_000 (0 << 3)
50 #define PANELCTL_INT2_CON_MASK (7 << 0)
51 #define PANELCTL_INT2_000 (0 << 0)
52 #define PANELCTL_INT2_001 (1 << 0)
55 #define PANELCTL_BICTL_000 (0 << 3)
[all …]
Dpanel-boe-tv101wum-nl6.c80 _INIT_DCS_CMD(0xB0, 0x05),
81 _INIT_DCS_CMD(0xB1, 0xE5),
82 _INIT_DCS_CMD(0xB3, 0x52),
83 _INIT_DCS_CMD(0xB0, 0x00),
84 _INIT_DCS_CMD(0xB3, 0x88),
85 _INIT_DCS_CMD(0xB0, 0x04),
86 _INIT_DCS_CMD(0xB8, 0x00),
87 _INIT_DCS_CMD(0xB0, 0x00),
88 _INIT_DCS_CMD(0xB6, 0x03),
89 _INIT_DCS_CMD(0xBA, 0x8B),
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/panel/
Dpanel-samsung-ld9040.c27 #define MCS_MANPWR 0xb0
28 #define MCS_ELVSS_ON 0xb1
29 #define MCS_USER_SETTING 0xf0
30 #define MCS_DISPCTL 0xf2
31 #define MCS_POWER_CTRL 0xf4
32 #define MCS_GTCON 0xf7
33 #define MCS_PANEL_CONDITION 0xf8
34 #define MCS_GAMMA_SET1 0xf9
35 #define MCS_GAMMA_CTRL 0xfb
39 { 0xf9, 0x00, 0x13, 0xb2, 0xba, 0xd2, 0x00, 0x30, 0x00, 0xaf, 0xc0,
[all …]
Dpanel-boe-himax8279d.c62 gpiod_set_value(pinfo->enable_gpio, 0); in disable_gpios()
63 gpiod_set_value(pinfo->pp33_gpio, 0); in disable_gpios()
64 gpiod_set_value(pinfo->pp18_gpio, 0); in disable_gpios()
70 unsigned int i = 0; in send_mipi_cmds()
73 for (i = 0; i < pinfo->desc->on_cmds_num; i++) { in send_mipi_cmds()
77 if (err < 0) in send_mipi_cmds()
81 return 0; in send_mipi_cmds()
90 return 0; in boe_panel_disable()
93 if (err < 0) { in boe_panel_disable()
100 return 0; in boe_panel_disable()
[all …]
Dpanel-samsung-s6e8aa0.c34 #define PANELCTL_SS_1_800 (0 << 5)
41 #define PANELCTL_CLK1_000 (0 << 3)
43 #define PANELCTL_CLK2_CON_MASK (7 << 0)
44 #define PANELCTL_CLK2_000 (0 << 0)
45 #define PANELCTL_CLK2_001 (1 << 0)
48 #define PANELCTL_INT1_000 (0 << 3)
50 #define PANELCTL_INT2_CON_MASK (7 << 0)
51 #define PANELCTL_INT2_000 (0 << 0)
52 #define PANELCTL_INT2_001 (1 << 0)
55 #define PANELCTL_BICTL_000 (0 << 3)
[all …]
/kernel/linux/linux-5.10/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
101 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
190 "\x90\xEF\xA0\x0D\xF3\x77\x4A\x25\x9F\x2E\x62\xB4\xC5\xD9\x9C\xB5"
247 "\x74\x1b\x55\xac\x47\xb5\x08\x0a\x6e\x2b\x2d\xf7\x94\xb8\x8a\x95"
265 "\xC6\x67\xFF\x1D\x1E\x3C\x1D\xC1\xB5\x5F\x6C\xC0\xB2\x07\x3A\x6D"
310 "\xfc\xf2\x10\x92\xf3\xc1\xbf\x84\x7f\xfd\x2c\xae\xc8\xb5\xf6\x41"
319 "\x7d\x3d\xb5\xb9\x56\x41\x15\x67\x0f\x94\x3c\x93\x65\x27\xe0\x21"
329 "\xC6\x67\xFF\x1D\x1E\x3C\x1D\xC1\xB5\x5F\x6C\xC0\xB2\x07\x3A\x6D"
352 "\xfc\xf2\x10\x92\xf3\xc1\xbf\x84\x7f\xfd\x2c\xae\xc8\xb5\xf6\x41"
361 "\x7d\x3d\xb5\xb9\x56\x41\x15\x67\x0f\x94\x3c\x93\x65\x27\xe0\x21"
[all …]
/kernel/linux/linux-6.6/crypto/
Dtestmgr.h33 * @ksize: Length of @key in bytes (0 if no key)
103 * @crypt_error: When @novrfy=0, the expected error from encrypt(). When
192 "\x90\xEF\xA0\x0D\xF3\x77\x4A\x25\x9F\x2E\x62\xB4\xC5\xD9\x9C\xB5"
203 "\x00\xD8\x40\xB4\x16\x66\xB4\x2E\x92\xEA\x0D\xA3\xB4\x32\x04\xB5"
255 "\x00\xEE\xCF\xAE\x81\xB1\xB9\xB3\xC9\x08\x81\x0B\x10\xA1\xB5\x60"
263 "\x86\x98\x40\xB4\x16\x66\xB4\x2E\x92\xEA\x0D\xA3\xB4\x32\x04\xB5"
285 "\x74\x1b\x55\xac\x47\xb5\x08\x0a\x6e\x2b\x2d\xf7\x94\xb8\x8a\x95"
303 "\xC6\x67\xFF\x1D\x1E\x3C\x1D\xC1\xB5\x5F\x6C\xC0\xB2\x07\x3A\x6D"
339 "\x68\x27\xE2\x96\xB5\x72\xC9\xC3\xD4\x42\xAA\xAA\xCA\x95\x8F\xFF"
348 "\xB5\x67\xFA\x37\xA8\xB8\xCF\x61\xE8\x63\xD8\x38\x06\x21\x2B\x92"
[all …]
Ddh.c27 memset(ctx, 0, sizeof(*ctx)); in dh_clear_ctx()
50 return (p_len < 2048) ? -EINVAL : 0; in dh_check_params_length()
52 return (p_len < 1536) ? -EINVAL : 0; in dh_check_params_length()
68 return 0; in dh_set_params()
80 if (crypto_dh_decode_key(buf, len, &params) < 0) in dh_set_secret()
83 if (dh_set_params(ctx, &params) < 0) in dh_set_secret()
90 return 0; in dh_set_secret()
120 if (mpi_cmp_ui(y, 1) < 1 || mpi_cmp(y, ctx->p) >= 0) in dh_is_pubkey_valid()
132 val = mpi_alloc(0); in dh_is_pubkey_valid()
159 if (ret != 0) in dh_is_pubkey_valid()
[all …]
/kernel/linux/linux-6.6/lib/crypto/
Daesgcm.c43 * Returns: 0 on success, or -EINVAL if @keysize or @authsize contain values
60 return 0; in aesgcm_expandkey()
67 while (len > 0) { in aesgcm_ghash()
101 while (len > 0) { in aesgcm_crypt()
213 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
235 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
267 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
291 "\x26\x5b\x98\xb5\xd4\x8a\xb9\x19";
299 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
321 "\x2f\xcf\x0e\x24\x49\xa6\xb5\x25"
[all …]
Dblake2s-selftest.c28 * for (i = 0; i < len; i++) {
29 * if (i && (i % 12) == 0)
31 * printf("0x%02x, ", vec[i]);
43 * key[0] = key[1] = 1;
47 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
52 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
62 * return 0;
66 { 0xa1, },
67 { 0x7c, 0x89, },
68 { 0x74, 0x0e, 0xd4, },
[all …]
/kernel/linux/linux-6.6/crypto/asymmetric_keys/
Dselftest.c43 "\x7b\x4d\xb5\x95\x58\xb2\x52\x2e\xc6\x24\x4b\x71\x63\x80\x32\x77"
52 "\xee\x75\x55\xbb\x18\x67\x5c\xff\x3f\xb5\xdd\x33\x1b\x0c\xe9\x78"
59 "\x29\xfe\xf1\x72\xb5\x5c\x0b\x12\xcf\x9c\x15\xf6\x11\x4c\x7a\x45"
65 "\x4c\x53\x3a\xa2\xb5\x84\x1d\x4b\x65\x7e\xdc\xf7\xdb\x36\x7d\xbe"
90 "\x1c\x1b\x54\x2d\x46\xd8\xe5\x71\xb9\x60\xd1\x45\xb5\x92\x89\x8a"
94 "\xb6\x6c\x76\x65\xb5\xb2\x62\xda\x8b\xe9\x73\xe3\xdb\x33\xdd\x13"
146 "\xb5\x56\x4f\xef\xf4\x72\x07\x58\x65\xa9\xeb\x1f\x75\x1c\x5f\x0c"
167 "\x2d\x86\x21\x2a\xcf\xc6\x54\xf5\xc9\xad\xfa\xb5\x12\xb4\xf3\x51"
199 if (ret < 0) in fips_signature_selftest()
202 for (i = 0; i < ARRAY_SIZE(certs_tests); i++) { in fips_signature_selftest()
[all …]
/kernel/linux/linux-5.10/lib/crypto/
Dblake2s-selftest.c26 * for (i = 0; i < len; i++) {
27 * if (i && (i % 12) == 0)
29 * printf("0x%02x, ", vec[i]);
41 * key[0] = key[1] = 1;
45 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i)
50 * for (i = 0; i < BLAKE2S_TESTVEC_COUNT; ++i) {
60 * return 0;
64 { 0xa1, },
65 { 0x7c, 0x89, },
66 { 0x74, 0x0e, 0xd4, },
[all …]
/kernel/linux/patches/linux-4.19/prebuilts/usr/include/linux/
Drpmsg.h15 #define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
16 #define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
/kernel/linux/linux-5.10/include/uapi/linux/
Drpmsg.h24 #define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
25 #define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
/kernel/linux/linux-6.6/arch/m68k/68000/
Dscreen.h6 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
7 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
8 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
9 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
10 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
11 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
12 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
13 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
14 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
15 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/kernel/linux/patches/linux-6.6/prebuilts/usr/include/linux/
Drpmsg.h28 #define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
29 #define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
/kernel/linux/patches/linux-5.10/prebuilts/usr/include/linux/
Drpmsg.h28 #define RPMSG_CREATE_EPT_IOCTL _IOW(0xb5, 0x1, struct rpmsg_endpoint_info)
29 #define RPMSG_DESTROY_EPT_IOCTL _IO(0xb5, 0x2)
/kernel/linux/linux-6.6/drivers/media/pci/saa7146/
Dhexium_orion.c21 module_param(debug, int, 0);
34 { 0, "CVBS 1", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
35 { 1, "CVBS 2", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
36 { 2, "CVBS 3", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
37 { 3, "CVBS 4", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
38 { 4, "CVBS 5", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
39 { 5, "CVBS 6", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
40 { 6, "Y/C 1", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
41 { 7, "Y/C 2", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
42 { 8, "Y/C 3", V4L2_INPUT_TYPE_CAMERA, 0, 0, HEXIUM_STD, 0, V4L2_IN_CAP_STD },
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/saa7146/
Dhexium_orion.c21 module_param(debug, int, 0);
33 { 0, "CVBS 1", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
34 { 1, "CVBS 2", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
35 { 2, "CVBS 3", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
36 { 3, "CVBS 4", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
37 { 4, "CVBS 5", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
38 { 5, "CVBS 6", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
39 { 6, "Y/C 1", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
40 { 7, "Y/C 2", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
41 { 8, "Y/C 3", V4L2_INPUT_TYPE_CAMERA, 0, 0, V4L2_STD_ALL, 0, V4L2_IN_CAP_STD },
[all …]
/kernel/linux/linux-5.10/drivers/staging/fbtft/
Dfb_ssd1351.c15 #define DEFAULT_GAMMA "0 2 2 2 2 2 2 2 " \
36 write_reg(par, 0xfd, 0x12); /* Command Lock */ in init_display()
37 write_reg(par, 0xfd, 0xb1); /* Command Lock */ in init_display()
38 write_reg(par, 0xae); /* Display Off */ in init_display()
39 write_reg(par, 0xb3, 0xf1); /* Front Clock Div */ in init_display()
40 write_reg(par, 0xca, 0x7f); /* Set Mux Ratio */ in init_display()
41 write_reg(par, 0x15, 0x00, 0x7f); /* Set Column Address */ in init_display()
42 write_reg(par, 0x75, 0x00, 0x7f); /* Set Row Address */ in init_display()
43 write_reg(par, 0xa1, 0x00); /* Set Display Start Line */ in init_display()
44 write_reg(par, 0xa2, 0x00); /* Set Display Offset */ in init_display()
[all …]

12345678910>>...36